void GBMemoryReset(struct GB* gb) {
if (gb->memory.wram) {
mappedMemoryFree(gb->memory.wram, GB_SIZE_WORKING_RAM);
}
gb->memory.wram = anonymousMemoryMap(GB_SIZE_WORKING_RAM);
if (gb->model >= GB_MODEL_CGB) {
uint32_t* base = (uint32_t*) gb->memory.wram;
size_t i;
uint32_t pattern = 0;
for (i = 0; i < GB_SIZE_WORKING_RAM / 4; i += 4) {
if ((i & 0x1FF) == 0) {
pattern = ~pattern;
}
base[i + 0] = pattern;
base[i + 1] = pattern;
base[i + 2] = ~pattern;
base[i + 3] = ~pattern;
}
}
GBMemorySwitchWramBank(&gb->memory, 1);
gb->memory.romBank = &gb->memory.rom[GB_SIZE_CART_BANK0];
gb->memory.currentBank = 1;
gb->memory.sramCurrentBank = 0;
gb->memory.ime = false;
gb->memory.ie = 0;
gb->memory.dmaNext = INT_MAX;
gb->memory.dmaRemaining = 0;
gb->memory.dmaSource = 0;
gb->memory.dmaDest = 0;
gb->memory.hdmaNext = INT_MAX;
gb->memory.hdmaRemaining = 0;
gb->memory.hdmaSource = 0;
gb->memory.hdmaDest = 0;
gb->memory.isHdma = false;
gb->memory.sramAccess = false;
gb->memory.rtcAccess = false;
gb->memory.activeRtcReg = 0;
gb->memory.rtcLatched = false;
memset(&gb->memory.rtcRegs, 0, sizeof(gb->memory.rtcRegs));
memset(&gb->memory.hram, 0, sizeof(gb->memory.hram));
memset(&gb->memory.mbcState, 0, sizeof(gb->memory.mbcState));
GBMBCInit(gb);
gb->memory.sramBank = gb->memory.sram;
if (!gb->memory.wram) {
GBMemoryDeinit(gb);
}
}
void GBMemoryReset(struct GB* gb) {
if (gb->memory.wram) {
mappedMemoryFree(gb->memory.wram, GB_SIZE_WORKING_RAM);
}
gb->memory.wram = anonymousMemoryMap(GB_SIZE_WORKING_RAM);
if (gb->model >= GB_MODEL_CGB) {
uint32_t* base = (uint32_t*) gb->memory.wram;
size_t i;
uint32_t pattern = 0;
for (i = 0; i < GB_SIZE_WORKING_RAM / 4; i += 4) {
if ((i & 0x1FF) == 0) {
pattern = ~pattern;
}
base[i + 0] = pattern;
base[i + 1] = pattern;
base[i + 2] = ~pattern;
base[i + 3] = ~pattern;
}
}
GBMemorySwitchWramBank(&gb->memory, 1);
gb->memory.romBank = &gb->memory.rom[GB_SIZE_CART_BANK0];
gb->memory.currentBank = 1;
gb->memory.sramCurrentBank = 0;
gb->memory.ime = false;
gb->memory.ie = 0;
gb->memory.dmaRemaining = 0;
gb->memory.dmaSource = 0;
gb->memory.dmaDest = 0;
gb->memory.hdmaRemaining = 0;
gb->memory.hdmaSource = 0;
gb->memory.hdmaDest = 0;
gb->memory.isHdma = false;
gb->memory.dmaEvent.context = gb;
gb->memory.dmaEvent.name = "GB DMA";
gb->memory.dmaEvent.callback = _GBMemoryDMAService;
gb->memory.dmaEvent.priority = 0x40;
gb->memory.hdmaEvent.context = gb;
gb->memory.hdmaEvent.name = "GB HDMA";
gb->memory.hdmaEvent.callback = _GBMemoryHDMAService;
gb->memory.hdmaEvent.priority = 0x41;
memset(&gb->memory.hram, 0, sizeof(gb->memory.hram));
switch (gb->memory.mbcType) {
case GB_MBC1:
gb->memory.mbcState.mbc1.mode = 0;
break;
default:
memset(&gb->memory.mbcState, 0, sizeof(gb->memory.mbcState));
}
GBMBCInit(gb);
gb->memory.sramBank = gb->memory.sram;
if (!gb->memory.wram) {
GBMemoryDeinit(gb);
}
}
