/*!
*******************************************************************************
**
** \brief Configure GPIO for PWM
**
** This function configure GPIO for PWM.
**
** \param channel The PWM channel that specified.
** \param ioNumber The GPIO number configured for this PWM channel.
**
** \return
** - #GD_OK if successful
******************************************************************************/
GERR GD_PWM_Open(U8 channel,U32 ioNumber)
{
#ifdef DEBUG_PRINT
printf("Set PWM%d ON \n",channel);
#endif
switch(channel)
{
case 0:
GD_GPIO_Open(ioNumber,GD_GPIO_TYPE_OUTPUT_PWM0_OUT,NULL,&Gpiohandle[channel]);
break;
case 1:
GD_GPIO_Open(ioNumber,GD_GPIO_TYPE_OUTPUT_PWM1_OUT,NULL,&Gpiohandle[channel]);
break;
case 2:
GD_GPIO_Open(ioNumber,GD_GPIO_TYPE_OUTPUT_PWM2_OUT,NULL,&Gpiohandle[channel]);
break;
case 3:
GD_GPIO_Open(ioNumber,GD_GPIO_TYPE_OUTPUT_PWM3_OUT,NULL,&Gpiohandle[channel]);
break;
default:
break;
}
return GD_OK;
}
/*!
*******************************************************************************
**
** \brief Controls LED550 and LED551 near ICC card connector.
**
** \param index Index of the LED to be controlled: 0 = LED550, 1 = 551.
** \param flgOffOn Type of control signal.
** \param pOption Optional parameters (not used yet).
**
** \return Possible return codes:
** - #GD_OK
** - return codes from subroutines
**
** \sa gd_fhw_ControlLed_SMARTMPEG_STB01
**
******************************************************************************/
static GERR gd_fhw_ControlLed_SMARTMPEG_STB01 (S32 index,
GD_GHW_LED_CONTROL_E flgOffOn,
void *pOption)
{
GERR retVal = GD_OK;
if (index == 0)
{
/* This controls LED550 (VPPEN of ICC card) */
if (Gpio3Handle == NULL)
{
retVal = GD_GPIO_Open(GD_GPIO_3, GD_GPIO_TYPE_OUTPUT_PUSH_PULL, NULL, &Gpio3Handle);
if (retVal != GD_OK)
{
#ifdef GD_FHW_SMARTMPEG_STB01_DEBUG
if (retVal == GD_ERR_ALREADY_OPEN)
GM_PrStr("\n[gd_fhw_ControlLed_SMARTMPEG_STB01] ERR: GPIO3 already open\n");
else
GM_PrStr("\n[gd_fhw_ControlLed_SMARTMPEG_STB01] ERR: GPIO3 could not be opened\n");
#endif
return (retVal);
}
}
if (flgOffOn == GD_GHW_LED_OFF)
retVal = GD_GPIO_Write(Gpio3Handle, 0);
else
retVal = GD_GPIO_Write(Gpio3Handle, 1);
} /* if (index ... */
else
{
/* This controls LED551 (VCCEN of ICC card) */
if (Gpio6Handle == NULL)
{
retVal = GD_GPIO_Open(GD_GPIO_6, GD_GPIO_TYPE_OUTPUT_PUSH_PULL, NULL, &Gpio6Handle);
if (retVal != GD_OK)
{
#ifdef GD_FHW_SMARTMPEG_STB01_DEBUG
if (retVal == GD_ERR_ALREADY_OPEN)
GM_PrStr("\n[gd_fhw_ControlLed_SMARTMPEG_STB01] ERR: GPIO6 already open\n");
else
GM_PrStr("\n[gd_fhw_ControlLed_SMARTMPEG_STB01] ERR: GPIO6 could not be opened\n");
#endif
return (retVal);
}
}
if (flgOffOn == GD_GHW_LED_OFF)
retVal = GD_GPIO_Write(Gpio6Handle, 0);
else
retVal = GD_GPIO_Write(Gpio6Handle, 1);
} /* if (index == 0) ... else */
return (retVal);
}
/*!
*******************************************************************************
**
** \brief Controls the reset for the front ends.
**
** \param index Index of the front end to be resetted.
** \param cntrlVal Type of reset signal.
** \param pOption Optional parameters (not used yet).
**
** \return Possible return codes:
** - #GD_OK
** - #GD_ERR_BAD_PARAMETER
**
** \sa gd_fhw_ControlFeReset_SMARTMPEG_M_EVB
**
******************************************************************************/
static GERR gd_fhw_ControlFeReset_SMARTMPEG_M_EVB(S32 index, GD_GHW_RESET_CONTROL_E cntrlVal, void *pOption)
{
GERR retVal = GD_OK;
GD_HANDLE h;
U32 delay;
U8 pinNum;
/* on this board the front ends use separate reset signals, we need to distinguish according to index */
switch (index)
{
case 0:
/* reset Front end 1 */
pinNum = GD_FHW_SMARTMPEG_M_EVB_FE1PIN;
break;
case 1:
/* reset Front end 2 */
pinNum = GD_FHW_SMARTMPEG_M_EVB_FE2PIN;
break;
default:
return (GD_ERR_BAD_PARAMETER);
}
switch(cntrlVal)
{
case(GD_GHW_RESET_INACTIVE):
retVal = GD_GPIO_Open(GD_GPIO_39, GD_GPIO_TYPE_OUTPUT_1, NULL, &h);
retVal = GD_GPIO_Write(h, 1); // FE reset high
GD_GPIO_Close(&h);
break;
case(GD_GHW_RESET_ACTIVE):
retVal = GD_GPIO_Open(GD_GPIO_39, GD_GPIO_TYPE_OUTPUT_1, NULL, &h);
retVal = GD_GPIO_Write(h, 0); // FE reset low
GD_GPIO_Close(&h);
break;
case(GD_GHW_RESET_PULSE):
retVal = GD_GPIO_Open(GD_GPIO_39, GD_GPIO_TYPE_OUTPUT_1, NULL, &h);
retVal = GD_GPIO_Write(h, 0); // FE reset low
if (retVal != GD_OK)
return (retVal);
delay = GD_FHW_SIMPLE_RESET_DELAY;
while (delay--);
retVal = GD_GPIO_Write(h, 1); // FE reset high
GD_GPIO_Close(&h);
break;
default:
/* do nothing */
retVal = GD_ERR_BAD_PARAMETER;
}
return retVal;
}
static GERR gd_fhw_ControlTsMuxing_SMARTMPEG_STB01(S32 index, GD_GHW_EXT_TS656_MUX_E cntrlVal, void *pOption)
{
GD_HANDLE h;
U8 *pSel;
int Option;
pSel = pOption;
Option = *pSel;
if ((cntrlVal==GD_GHW_EXT_656_INP_P_MUX)||(cntrlVal==GD_GHW_EXT_656_INP_N_MUX)) {
cntrlVal = GD_GHW_EXT_TS_INP_MUX; // this is the same
}
if (cntrlVal==GD_GHW_EXT_TS_INP_MUX) {
if (Option==GD_FHW_TS656_EXT_MUX_DIRECT_TS_INDEX)
{
// XD_PrStr("\n->Configure TS-B-Input via LVDS-Interface");
GD_GPIO_Open(GD_GPIO_9, GD_GPIO_TYPE_OUTPUT_PUSH_PULL, NULL, &h);
GD_GPIO_Write(h, 0);
GD_GPIO_Close(&h);
#if defined(GK6106)
GD_TSD_InputSelector(GD_TSD_INPUT_FROM_OTHER_TSD, GD_TSD_INPUT_FROM_OTHER_TSD, GD_TSD_INPUT_FROM_OTHER_TSD, GD_TSD_INPUT_FROM_OTHER_TSD);
#else
GD_TSD_InputSelector(GD_TSD_INPUT_FROM_OTHER_TSD, GD_TSD_INPUT_FROM_OTHER_TSD);
#endif
}
else if (Option==GD_FHW_TS656_EXT_MUX_FE0_INDEX)
{
// XD_PrStr("\n->Configure TS-A-Input from FE");
GD_GPIO_Open(GD_GPIO_9, GD_GPIO_TYPE_OUTPUT_PUSH_PULL, NULL, &h);
GD_GPIO_Write(h, 1);
GD_GPIO_Close(&h);
#if defined(GK6106)
GD_TSD_InputSelector(GD_TSD_INPUT_FROM_DEFAULT, GD_TSD_INPUT_FROM_DEFAULT, GD_TSD_INPUT_FROM_DEFAULT, GD_TSD_INPUT_FROM_DEFAULT);
#else
GD_TSD_InputSelector(GD_TSD_INPUT_FROM_DEFAULT, GD_TSD_INPUT_FROM_DEFAULT);
#endif
}
}
else if (cntrlVal==GD_GHW_EXT_656_OUT_P_MUX)
{
// XD_PrStr("\n->Configure TS-B 656 Output");
GD_GPIO_Open(GD_GPIO_9, GD_GPIO_TYPE_INPUT, NULL, &h);
GD_GPIO_Close(&h);
}
return (GD_OK);
}
GERR GD_FE_DIB7070X_Open(U8 index, GD_FE_DEVICE_DATA_S* pDeviceData)
{
GERR error = GD_OK; //Modified by David Cao 2008-07-30
if (index >= GD_FE_MAX_NUM) return GD_ERR_BAD_PARAMETER;
if (pDeviceData == NULL) return GD_ERR_BAD_PARAMETER;
/* check device data */
if (pDeviceData->pSystemParams == NULL) return GD_ERR_BAD_PARAMETER;
if (pDeviceData->systemType != GD_FE_SYSTEM_TYPE_TERRESTRIAL) return GD_ERR_BAD_PARAMETER;
/* store pointer to device data */
pData[index] = pDeviceData;
/* reset the dibcom chip */
#if 0
if (pDeviceData->ghwIndex >= 0)
{
#if defined(SMARTMPEG_C)
error = GD_GPIO_Open(pDeviceData->ghwIndex, GD_GPIO_TYPE_OUTPUT_1, NULL,&pData[index]->handleI2C);
#endif
if(error != GD_OK)
{
#ifdef GD_FE_MB86667_DEBUG01
GM_Printf("MB86667_Tune(%i) = 0x%X\n",index,(U32)error);
#endif
return(error);
}
GD_GPIO_Write(pData[index]->handleI2C, 1);
FE_SleepTime(10);
GD_GPIO_Write(pData[index]->handleI2C, 0);
FE_SleepTime(10);
GD_GPIO_Write(pData[index]->handleI2C, 1);
FE_SleepTime(10);
}
#endif
/* Initial dibcom 7070 chip */
// test_dibcom_7070();
error = dib_init();
if( error != GD_OK )
GM_Printf("dib_init error!\n");
/* fill device data structure with call back functions */
pData[index]->feCloseFct = GD_FE_DIB7070X_Close;
pData[index]->feSetSystemParamsFct = GD_FE_DIB7070X_SetSystemParams;
pData[index]->feResetFct = GD_FE_DIB7070X_Reset;
pData[index]->feTuneFct = GD_FE_DIB7070X_Tune;
pData[index]->feScanFct = NULL;
pData[index]->feSendDiseqcCommandFct = NULL;
pData[index]->feGetStatusFct = GD_FE_DIB7070X_GetStatus;
pData[index]->feGetFECFct = NULL;
pData[index]->feGetAFCFct = GD_FE_DIB7070X_GetAFC;
pData[index]->feGetBERFct = GD_FE_DIB7070X_GetBER;
pData[index]->feGetSignalQualityFct = GD_FE_DIB7070X_GetSignalQuality;
pData[index]->feGetSignalStrengthFct = GD_FE_DIB7070X_GetSignalStrength;
pData[index]->feGetTuneParamsFct = GD_FE_DIB7070X_GetTuneParams;
pData[index]->feSetAntennaPowerFct = NULL;
return GD_OK;
}
/*!
*******************************************************************************
**
** \brief reconfigures a GPIO.
**
** \param number GPIO number.
** \param type Type of gpio (output, input, ...).
** \param pHandle Pointer to previous handle of the GPIO, can also be
** NULL if this GPIO was not opened before.
**
** \return Possible return codes:
** - #GD_OK
** - return codes from subroutines
**
** \sa gd_fhw_SMARTMPEG_STB01_reconfigGpio
**
******************************************************************************/
static GERR gd_fhw_SMARTMPEG_STB01_reconfigGpio (U8 number,
GD_GPIO_TYPE_E type,
GD_HANDLE* pHandle)
{
GERR retVal;
/* it would be nicer if we could open the GPIOs in the init function just once.
But to be able to reconfigure it from output to input we must close and open it again. */
if (*pHandle != NULL)
{
retVal = GD_GPIO_Close(pHandle);
if (retVal != GD_OK)
{
#ifdef GD_FHW_SMARTMPEG_STB01_DEBUG
GM_PrStr("\n[gh_fhw_SMARTMPEG_STB01_reconfigGpio] ERR: GPIO could not be closed\n");
#endif
return (retVal);
}
}
retVal = GD_GPIO_Open(number, type, NULL, pHandle);
if (retVal != GD_OK)
{
#ifdef GD_FHW_SMARTMPEG_STB01_DEBUG
GM_PrStr("\n[gh_fhw_SMARTMPEG_STB01_reconfigGpio] ERR: GPIO could not be opened\n");
#endif
return (retVal);
}
return (GD_OK);
}
GERR GD_FE_A17_Init()
{
GERR retVal = GD_OK;
GD_HANDLE h;
if ( AntennaPowerInitial == GFALSE )
{
retVal = GD_GPIO_Open(GD_GPIO_30, GD_GPIO_TYPE_OUTPUT_1, NULL, &h);
if (retVal != GD_OK)
{
//GM_PrStr("\n[GD_FE_A17_Open] ERR: GPIO_30 could not be opened\n");
return (retVal);
}
//MB86A17_sleep(10);
GD_GPIO_Write(h, 0);
//MB86A17_sleep(10);
GD_GPIO_Write(h, 1);
}
#if 0
retVal = MB86A17_init();
if ( retVal != GD_OK )
return GD_ERR_FE_OTHER;
#endif
return retVal;
}
/******************************************************************************
**
** \brief Resets the front-end.
**
** \param index Internal index of front-end.
**
** \return Possible return codes:
** - #GD_OK
** - #GD_ERR_BAD_PARAMETER
** - #GD_ERR_FEATURE_NOT_SUPPORTED
**
******************************************************************************/
GERR GD_FE_Altobeam_Reset(U8 index)
{
#if 0
int i;
//U32 data;
GD_HANDLE handle;
if (index >= GD_FE_MAX_NUM)
return GD_ERR_BAD_PARAMETER;
GD_GPIO_Open(GD_GPIO_2, GD_GPIO_TYPE_OUTPUT_1, NULL, &handle);
GK5101_Delay(100);
GD_GPIO_SetType(handle, GD_GPIO_TYPE_OUTPUT_0);
//GK5101_Delay(100);
//GD_GPIO_SetType(handle, GD_GPIO_TYPE_OUTPUT_1);
//GK5101_Delay(100);
GD_GPIO_Close(&handle);
/*if(pTSD2Handle==NULL)
return GD_ERR_NOT_INITIALIZED;
data=GH_VE_getm_ITRU656DirData();
GD_GPIO_WriteTsd2(pTSD2Handle,(U16)data&0xFD);
A1108_IBSP_Delay(10);
GD_GPIO_WriteTsd2(pTSD2Handle,(U16)data|0x02);
A1108_IBSP_Delay(10);
*/
#endif
return GD_OK;
}
/*!
*******************************************************************************
**
** \brief Cancel the write/read process of I2C bus.
**
** \sa GD_I2C_Read() <br>
** GD_I2C_Write()
**
******************************************************************************/
void GD_I2C_CancelProcess(void)
{
GERR ferr;
int i;
if (i2c_initialized == GFALSE)
return; // GD_ERR_NOT_INITIALIZED;
GD_GPIO_Close(&i2c_sda_handle);
GD_GPIO_Close(&i2c_scl_handle);
ferr = GD_GPIO_Open(i2c_sda_pin, I2C_GPIO_TYPE_OUTPUT, NULL, &i2c_sda_handle);
ferr = GD_GPIO_Open(i2c_scl_pin, I2C_GPIO_TYPE_OUTPUT, NULL, &i2c_scl_handle);
GD_GPIO_Write(i2c_sda_handle, 1); // set SDA to high
GD_GPIO_Write(i2c_scl_handle, 1); // set SCL to high
for (i = 0;i < SI2C_BUS_FREE_TIME;i++); // delay loop
}
/*---------------------------------------------------------------------------*/
GERR GND_I2C_Init(GD_I2C_INIT_PARAMS_S* paramsP)
{
GD_HANDLE gpioHd;
/* Reset the SCL & SDA pin of I2C */
GD_GPIO_Open(GD_GPIO_INOUT_I2C_CLK , GD_GPIO_TYPE_INOUT_I2C_CLK, 0, &gpioHd );
GD_GPIO_Open(GD_GPIO_INOUT_I2C_DATA , GD_GPIO_TYPE_INOUT_I2C_DATA, 0, &gpioHd );
/* initialize I2c registers */
/*
GH_I2C_set_ControlReg0(0L);
GH_I2C_set_ControlReg0_USE_ADD(1);
GH_I2C_set_ControlReg0_AM_ON(1);
GH_I2C_set_ControlReg0_SPIKE_FILT(1);
GH_I2C_set_ControlReg0_OI_DLY_AL(1);
CtrlReg0Shadow = GH_I2C_get_ControlReg0();
*/
CtrlReg0Shadow = BIT7|BIT4|BIT10|BIT11;
GNH_EXT_SetRegister(REG_I2C_CONTROLREG0,CtrlReg0Shadow);
/*
GH_I2C_set_ControlReg1(0L);
GH_I2C_set_ControlReg1_SL_SLA_ADD(MPEG_SLAADD>>1);
CtrlReg1Shadow = GH_I2C_get_ControlReg1();
*/
CtrlReg1Shadow = MPEG_SLAADD;
GNH_EXT_SetRegister(REG_I2C_CONTROLREG1,CtrlReg1Shadow);
/*
GH_I2C_set_IRQMask0(0L);
GH_I2C_set_IRQMask1(0L);
*/
GNH_EXT_SetRegister(REG_I2C_IRQMASK0,0);
GNH_EXT_SetRegister(REG_I2C_IRQMASK1,0);
/* Open the I2C interrupt */
GD_INT_OPEN_PARAMS_S paramsInt;
paramsInt.active = GD_INT_INVERT_IRQ;
paramsInt.priority = GD_INT_LOW_PRIORITY;
paramsInt.sensitivity = GD_INT_LEVEL_SENSITIVE;
paramsInt.type = GD_INT_IIC_IRQ;
paramsInt.isrFct.lowPrio = GND_ISR_I2C_Handler;
GD_INT_Open(¶msInt, NULL);
return GD_OK;
}
/*!
*******************************************************************************
**
** \brief Initializes the driver.
**
** This function initializes the driver. It is called only once
** during boot time. It sets the ISR and the dedicated GPIO pins
** for SDA and SCL.
**
** The GPIO pins must be i2c_initialized in this function for each channel.
** With the open function you are able to select different channels
** driving multiple devices on each channel using different slave
** adresses.
**
** Currently the driver supports only one channel.
**
** \note If you are using the software I2C driver (\c gd_i2c_sw.c) you have
** to assign GPIO pins for SDA and SCL of the dedicated channel.
** If you are using the hardware driver (\c gd_i2c.c) the GPIO pins
** are autmatically assigned (only SmartMPEG and SmartMPEG-E).
**
** \note SmartMPEG-L has no hardware I2C and therefore can not not use the
** driver (\c gd_i2c.c).
**
** \param paramsP Pointer to init parameter structure.
**
** \return Possible return codes:
** - \c #GD_OK
** - \c #GD_ERR_ALREADY_INITIALIZED
** - \c #GD_ERR_I2C_INT_ERR
** - \c #GD_ERR_BAD_PARAMETER
**
** \sa GD_I2C_Open()
** \sa \c GD_I2C_INIT_PARAMS_S
**
******************************************************************************/
GERR GD_I2C_Init(GD_I2C_INIT_PARAMS_S* paramsP)
{
int i;
GERR ferr;
if( i2c_initialized == GTRUE )
return GD_ERR_ALREADY_INITIALIZED;
i2c_initialized = GTRUE;
if ((paramsP->mode != GD_I2C_AUTO_MASTER_MODE)&&
(paramsP->mode != GD_I2C_GENERIC_MASTER_MODE))
return GD_ERR_BAD_PARAMETER;
#if defined(SMARTMPEG) || defined(SMARTMPEG_E)
i2c_sda_pin = GD_GPIO_I2C_SDA;
i2c_scl_pin = GD_GPIO_I2C_SCL;
#endif
#if defined(SMARTMPEG_L) || defined(SMARTMPEG_C) || defined(SMARTMPEG_M) || defined(SMARTMPEG_D) || defined(GK6105S) || defined(GK6106)
i2c_sda_pin = paramsP->gpioSdaPinCh1;
i2c_scl_pin = paramsP->gpioSclPinCh1;
#endif
/* Reset the SCL & SDA pin of I2C */
// GD_GPIO_Close(&i2c_sda_handle);
// GD_GPIO_Close(&i2c_scl_handle);
ferr = GD_GPIO_Open(i2c_sda_pin, I2C_GPIO_TYPE_OUTPUT, NULL, &i2c_sda_handle);
if (ferr != GD_OK)
return GD_ERR_I2C_INT_ERR;
ferr = GD_GPIO_Open(i2c_scl_pin, I2C_GPIO_TYPE_OUTPUT, NULL, &i2c_scl_handle);
if (ferr != GD_OK)
return GD_ERR_I2C_INT_ERR;
GD_GPIO_Write(i2c_sda_handle, 1); // set SDA to high
GD_GPIO_Write(i2c_scl_handle, 1); // set SCL to high
for (i = 0;i < SI2C_BUS_FREE_TIME;i++); // delay loop
i2cMutexFunctionRegister(paramsP->mutexWaitFunc, paramsP->mutexReleaseFunc);
return GD_OK;
}
int XD_UaInitUart(GD_UART_BAUDRATE_E BaudRate)
{
volatile T_SMARTMPEG_UART_PORT *pUART;
OpU8 RxChar;
U32 mode;
// Steven Yu
GD_HANDLE gpioHd;
#ifdef DEBUG
GD_HANDLE uartHd;
#endif
GD_GPIO_Open(GD_GPIO_28 , GD_GPIO_TYPE_INPUT_UART_RX, 0, &gpioHd );
GD_GPIO_Open(GD_GPIO_29 , GD_GPIO_TYPE_OUTPUT_UART_TX, 0, &gpioHd );
//XD_CiSetMpegSRegBits(SHR16IDX_GPIO_SELECT_LOW, GPIO_L_UART_TX|GPIO_L_UART_RX); // enable UART operation
#ifdef DEBUG
OSAddTask((void (*)(void *))UartTask, TASK_UART_PRIO, STACK_UART, UART_TASK_STK_SIZE);
GD_INT_OPEN_PARAMS_S intparams;
intparams.type = GD_INT_UART_IRQ;
intparams.sensitivity = GD_INT_LEVEL_SENSITIVE;
intparams.active = GD_INT_INVERT_IRQ;
intparams.priority = GD_INT_LOW_PRIORITY;
intparams.isrFct.lowPrio = ISR_UART_Handler;
GNH_EXT_SetRegister(REG_UART_IRQCLEAR,0x03); /* clear interrupt */
GD_INT_Open(&intparams, &uartHd);
#endif
mode = getDataRateMode(BaudRate);
pUART = (volatile T_SMARTMPEG_UART_PORT*) REG_UART_DATA; // Init Pointer to UART Control Registers
pUART->LineControl = 0x00F0; // 8 Databits, 1 Stop, no parity
pUART->Enable = 0x0003; // Internal clock, RX enable
pUART->Delta1 = BaudRateTable[mode * 4 + 2] & 0xff; //0x53;
pUART->ClkBound = BaudRateTable[mode * 4 + 1] & 0xffff; //0x0D; // DPLL bound
pUART->DifDelt = BaudRateTable[mode * 4 + 3] & 0x3ff; //0x2D;
pUART->DmaReqCtrl = 0x0000;
//pUART->IrqMaskReg = BIT1; // enable RxInt. just for Test
pUART->IrqMaskReg = 0; // disable RxInt.
RxChar = pUART->Data; // empty receive register
return RxChar;
}
GERR GD_FP_Init_FD650()
{
GERR Error = GD_OK;
U8 testOne = 0x01;
U8 testTwo = 0x80;
if( initialised == GTRUE )
return GD_ERR_ALREADY_INITIALIZED;
initialised = GTRUE;
//IO³õʼ»¯
Error = GD_GPIO_Open(GD_GPIO_43, GD_GPIO_TYPE_OUTPUT_1, NULL, &FD650ClockHandle);
if(Error != GD_OK)
return Error;
Error = GD_GPIO_Open(GD_GPIO_45, GD_GPIO_TYPE_OUTPUT_1, NULL, &FD650DataHandle);
if(Error != GD_OK)
return Error;
GD_FP_FD650_WriteCmd_Data( 0x48, &testOne);
GD_FP_FD650_WriteCmd_Data( FRONT_LED_THREE, &testTwo);
return GD_OK;
}
GERR GD_FE_LGS8GA6_Reset(U8 index)
{
GERR ferr = GD_OK;
if ( index >= GD_FE_MAX_NUM )
{
return GD_ERR_BAD_PARAMETER;
}
/* reset the LGS8GA6 chip */
if ( pData[index]->ghwIndex>= 0 )
{
/* error = GD_GPIO_Open(pData[index]->ghwIndex,
GD_GPIO_TYPE_OUTPUT_PUSH_PULL,
NULL,
&pData[index]->handleI2C);
if ( error != GD_OK )
return(error);*/
ferr = GD_GPIO_Open(pData[index]->ghwIndex, GD_GPIO_TYPE_OUTPUT_1, NULL, &pData[index]->handleI2C);
#ifdef GD_FE_LGS_DEBUG
if(ferr != GD_OK)
GM_PrStr("\nOpen GPIO 39 error");
#endif
ferr = GD_GPIO_Write(pData[index]->handleI2C, 1);
#ifdef GD_FE_LGS_DEBUG
if(ferr != GD_OK)
GM_PrStr("\nOpen GPIO 39 error");
#endif
LGS_Waitms(10);
ferr = GD_GPIO_Write(pData[index]->handleI2C, 0);
#ifdef GD_FE_LGS_DEBUG
if(ferr != GD_OK)
GM_PrStr("\nOpen GPIO 39 error");
#endif
LGS_Waitms(10);
ferr = GD_GPIO_Write(pData[index]->handleI2C, 1);
#ifdef GD_FE_LGS_DEBUG
if(ferr != GD_OK)
GM_PrStr("\nOpen GPIO 39 error");
#endif
LGS_Waitms(10);
GD_GPIO_Close(&pData[index]->handleI2C);
}
return ferr;
}
void MB86A17_Reset()
{
//2011-10-13liujinyang
GERR retVal = GD_OK;
if(!a17_gpiorest)
{
retVal = GD_GPIO_Open(GD_GPIO_30, GD_GPIO_TYPE_OUTPUT_1, NULL, &a17_gpiorest);
if (retVal != GD_OK)
{
//GM_PrStr("\n[GD_FE_GK_Open] ERR: GPIO_30 could not be opened\n");
return ;
}
}
GD_GPIO_Write(a17_gpiorest, 1);
MB86A17_sleep(5);
GD_GPIO_Write(a17_gpiorest, 0);
MB86A17_sleep(5);
GD_GPIO_Write(a17_gpiorest, 1);
MB86A17_sleep(5);
}
/*!
*****************************************************************************
** \brief Initialize the Ethernet driver.
**
** This function initializes Ethernet driver.
** It allocates and initializes driver handle structures as well as
** internal buffers for succeeding GD_ETH_Open(). Currently buffers are
** statically allocated. Setting up hardware is not part of GD_ETH_Init(),
** but is executed in GD_ETH_Open().
**
** \note This function is the implementation of
** GD_SYS_DriverT::initDriverFunc.
**
** \return
** - #GD_OK On success
** - #GD_ERR_ALREADY_INITIALIZED Driver is already initialized
** - #GD_ERR_INVALID_HANDLE Invalid handle is specified
** - #GD_ERR_SEMAPHORE_CREATE Semaphore can not be created
** - #GD_ERR_OUT_OF_MEMORY Memory allocation failed
** Not Implemented yet
**
** \sa GD_ETH_Exit()
*****************************************************************************
*/
GERR GD_ETH_Init(GD_ETH_InitParamsT* pInitParams)
{
S32 retval;
GD_INT_OPEN_PARAMS_S intOpenParams;
if(ethIntHandle)
{
return GD_ERR_ALREADY_INITIALIZED;
}
if(pInitParams == NULL)
{
return GD_ERR_BAD_PARAMETER;
}
intOpenParams.type = GD_INT_ETH_IRQ;
intOpenParams.sensitivity = GD_INT_LEVEL_HIGH;
intOpenParams.priority = GD_INT_MID_PRIORITY;
intOpenParams.active = GD_INT_INVERT_IRQ;
intOpenParams.isrFct.lowPrio = GD_ETH_Isr;
retval = GD_INT_Open(&intOpenParams, ðIntHandle);
if (retval != GD_OK)
{
return retval;
}
if (pInitParams->phyreset != GD_GPIO_0)
{
GD_GPIO_Open(pInitParams->phyreset, GD_GPIO_TYPE_OUTPUT_1, NULL, ðdevice.phyreset);
}
if(pInitParams->bHWReset)
{
GD_ETH_PHY_HWReset((GD_HANDLE)ðdevice);
}
ethdevice.phyType = pInitParams->phyType;
GD_ETH_PHY_Init(pInitParams->phyType);
return retval;
}
GERR GD_FL_Goke_Check(U32 startAddress, GD_FL_CHIP_DATA_S* chipData)
{
U16 manufacturerCode;
U16 deviceCode;
U16 deviceCode2;
U16 deviceCode3;
manufacturerCode = 0;
deviceCode = 0;
thisStartAddress = startAddress;
delayLoops = 0;
/* read manufacture and device code */
GD_FL_Goke_Reset();
flashWriteCmd(CMD_AUTOSELECT, 0);
manufacturerCode = flashRead(0);
deviceCode = flashRead(1);
GD_FL_Goke_Reset();
/* check manufacturer and device code */
if ( manufacturerCode == MANUFACTURER_CODE_GOKE )
{
switch ( deviceCode )
{
case DEVICE_CODE_MBM29DL323BE:
chipData->size = SIZE_MBM29DL323BE;
chipData->numberOfSectors = SECTORS_MBM29DL323BE;
chipData->deviceName = (U8*)DEVICE_NAME_MBM29DL323BE;
break;
case DEVICE_CODE_MBM29PL160BD:
chipData->size = SIZE_MBM29PL160BD;
chipData->numberOfSectors = SECTORS_MBM29PL160BD;
chipData->deviceName = (U8*)DEVICE_NAME_MBM29PL160BD;
break;
case DEVICE_CODE_MBM29LV160BE:
chipData->size = SIZE_MBM29LV160BE;
chipData->numberOfSectors = SECTORS_MBM29LV160BE;
chipData->deviceName = (U8*)DEVICE_NAME_MBM29LV160BE;
break;
case DEVICE_CODE_MBM29LV800BE:
chipData->size = SIZE_MBM29LV800BE;
chipData->numberOfSectors = SECTORS_MBM29LV800BE;
chipData->deviceName = (U8*)DEVICE_NAME_MBM29LV800BE;
break;
default:
return GD_ERR_FLASH_TYPE_NOT_SUPPORTED;
}
chipData->manufactureName = (U8*)MANUFACTURER_NAME_GOKE;
}
else if ( manufacturerCode == MANUFACTURER_CODE_SPANSION )
{
flashWriteCmd(CMD_AUTOSELECT, 0);
deviceCode = flashRead(1);
deviceCode2 = flashRead(0xE); // 0x1C / 2
deviceCode3 = flashRead(0xF); // 0x1E / 2
GD_FL_Goke_Reset();
switch ( deviceCode )
{
#if defined(SMARTMPEG_E) || defined(SMARTMPEG_C) || defined(SMARTMPEG_M) || defined(SMARTMPEG) || defined(GK6105S) || defined(GK6106)
case DEVICE_CODE_S29GL:
if( ( deviceCode2 == __DEVICE_CODE2_S29GL064A_R4 )
&& ( deviceCode3 == __DEVICE_CODE3_S29GL064A_R4_BOTTOM ) )
{
chipData->size = SIZE_S29GL064A_R4_BOTTOM;
chipData->numberOfSectors = SECTORS_S29GL064A_R4_BOTTOM;
chipData->deviceName = (U8*)DEVICE_NAME_S29GL064A_R4_BOTTOM;
delayLoops = DELAY_LOOPS_S29GL064A_R4_BOTTOM;
deviceCode = DEVICE_CODE_S29GL064A_R4_BOTTOM;
}
else if( ( deviceCode2 == __DEVICE_CODE2_S29GL032A_R4 )
&& ( deviceCode3 == __DEVICE_CODE3_S29GL032A_R4_BOTTOM ) )
{
chipData->size = SIZE_S29GL032A_R4_BOTTOM;
chipData->numberOfSectors = SECTORS_S29GL032A_R4_BOTTOM;
chipData->deviceName = (U8*)DEVICE_NAME_S29GL032A_R4_BOTTOM;
delayLoops = DELAY_LOOPS_S29GL032A_R4_BOTTOM;
deviceCode = DEVICE_CODE_S29GL032A_R4_BOTTOM;
}
else if( ( deviceCode2 == __DEVICE_CODE2_S29GL032A_R3 )
&& ( deviceCode3 == __DEVICE_CODE3_S29GL032A_R3_TOP ) )
{
chipData->size = SIZE_S29GL032M_R3_TOP;
chipData->numberOfSectors = SECTORS_S29GL032M_R3_TOP;
chipData->deviceName = (U8*)DEVICE_NAME_S29GL032M_R3_TOP;
delayLoops = DELAY_LOOPS_S29GL032M_R3_TOP;
deviceCode = DEVICE_CODE_S29GL032M_R3_TOP;
}
// S29GL128N
else if( ( deviceCode2 == __DEVICE_CODE2_S29GL128N )
&& ( deviceCode3 == __DEVICE_CODE3_S29GL128N ) )
{
chipData->size = SIZE_S29GL128N;
chipData->numberOfSectors = SECTORS_S29GL128N;
chipData->deviceName = (U8*)DEVICE_NAME_S29GL128N;
delayLoops = DELAY_LOOPS_S29GL128N;
deviceCode = DEVICE_CODE_S29GL128N;
}
//S29GL032N
else if( ( deviceCode2 == __DEVICE_CODE2_S29GL032N_04 )
&& ( deviceCode3 == __DEVICE_CODE2_S29GL032N_04_BOTTOM ) )
{
chipData->size = SIZE_S29GL032N;
chipData->numberOfSectors = SECTORS_S29GL032N;
chipData->deviceName = (U8*)DEVICE_NAME_S29GL032N;
delayLoops = DELAY_LOOPS_S29GL032N;
deviceCode = DEVICE_CODE_S29GL032N;
}
else
{
return GD_ERR_FLASH_TYPE_NOT_SUPPORTED;
}
break;
case DEVICE_CODE_S29AL0320TE:
chipData->size = SIZE_S29AL0320TE;
chipData->numberOfSectors = SECTORS_S29AL0320TE;
chipData->deviceName = (U8*)DEVICE_NAME_S29AL0320TE;
delayLoops = DELAY_LOOPS_S29AL0320TE;
deviceCode = DEVICE_CODE_S29AL0320TE;
break;
case DEVICE_CODE_S29AL0320BE:
chipData->size = SIZE_S29AL0320BE;
chipData->numberOfSectors = SECTORS_S29AL0320BE;
chipData->deviceName = (U8*)DEVICE_NAME_S29AL0320BE;
delayLoops = DELAY_LOOPS_S29AL0320BE;
deviceCode = DEVICE_CODE_S29AL0320BE;
break;
// case DEVICE_CODE_S29GL064A_R4:
// chipData->size = SIZE_S29GL064A_R4;
// chipData->numberOfSectors = SECTORS_S29GL064A_R4;
// chipData->deviceName = (U8*)DEVICE_NAME_S29GL064A_R4;
// delayLoops = DELAY_LOOPS_S29GL064A_R4;
// break;
#endif
default:
return GD_ERR_FLASH_TYPE_NOT_SUPPORTED;
}
chipData->manufactureName = (U8*)MANUFACTURER_NAME_SPANSION;
}
else if ( manufacturerCode == MANUFACTURER_CODE_MACRONIX )
{
switch ( deviceCode )
{
case DEVICE_CODE_MX29LV320CB:
chipData->size = SIZE_MX29LV320CB;
chipData->numberOfSectors = SECTORS_MX29LV320CB;
chipData->deviceName = (U8*)DEVICE_NAME_MX29LV320CB;
break;
case DEVICE_CODE_MX29LV640CB:
chipData->size = SIZE_MX29LV640CB;
chipData->numberOfSectors = SECTORS_MX29LV640CB;
chipData->deviceName = (U8*)DEVICE_NAME_MX29LV640CB;
break;
case DEVICE_CODE_MX29LV640EB:
chipData->size = SIZE_MX29LV640E;
chipData->numberOfSectors = SECTORS_MX29LV640E;
chipData->deviceName = (U8*)DEVICE_NAME_MX29LV640E;
break;
default:
return GD_ERR_FLASH_TYPE_NOT_SUPPORTED;
}
chipData->manufactureName = (U8*)MANUFACTURER_NAME_MACRONIX;
}
else if ( manufacturerCode == MANUFACTURER_CODE_EXELSEMI )
{
switch ( deviceCode )
{
case DEVICE_CODE_ES29LV160ET:
chipData->size = SIZE_ES29LV160ET;
chipData->numberOfSectors = SECTORS_ES29LV160ET;
chipData->deviceName = (U8*)DEVICE_NAME_ES29LV160ET;
break;
default:
return GD_ERR_FLASH_TYPE_NOT_SUPPORTED;
}
chipData->manufactureName = (U8*)MANUFACTURER_NAME_EXELSEMI;
}
else
{
return GD_ERR_FLASH_TYPE_NOT_SUPPORTED;
}
thisDeviceCode = deviceCode;
thisManufacturerCode = manufacturerCode;
chipData->manufactureCode = manufacturerCode;
chipData->deviceCode = deviceCode;
chipData->startAddress = startAddress;
chipData->flashGetSectorAddressFct = (U32 (*)(U16))GD_FL_Goke_GetSectorAddress;
chipData->flashGetSectorSizeFct = (U32 (*)(U16))GD_FL_Goke_GetSectorSize;
chipData->flashResetFct = (void (*)())GD_FL_Goke_Reset;
chipData->flashEraseChipFct = (GERR (*)(void))GD_FL_Goke_EraseChip;
chipData->flashEraseSectorFct = (GERR (*)(U32))GD_FL_Goke_EraseSector;
chipData->flashIsSectorProtectedFct = (GBOOL (*)(U32))GD_FL_Goke_IsSectorProtected;
chipData->flashReadFct = (GERR (*)(U32, U16*, U32))GD_FL_Goke_Read;
chipData->flashWriteFct = (GERR (*)(U32, U16*, U32))GD_FL_Goke_Write;
#if defined(SMARTMPEG)
/* add EXT IRQ0 to control A21 pin */
if(chipData->size == 0x400000)
{
if(GD_GPIO_Open(GD_GPIO_IRQ0, GD_GPIO_TYPE_OUTPUT_PUSH_PULL, NULL, &IRQ0Handle) != GD_OK)
{
return GD_ERR_FLASH_TYPE_NOT_SUPPORTED;
}
}
#endif
return GD_OK;
}
/*!
*******************************************************************************
**
** \brief Opens an instance of the driver.
**
** \param pOpenParams Pointer to configuration parameters.
** \param pHandle Pointer to handle assigned to the opened instance.
**
** \return Possible return codes:
** - #GD_OK
** - #GD_ERR_BAD_PARAMETER
** - #GD_ERR_ALREADY_OPEN
**
******************************************************************************/
GERR GD_IR_Open(GD_IR_OPEN_PARAMS_S *pOpenParams, GD_HANDLE *pHandle)
{
GD_HANDLE gpioHd;
#if defined(SMARTMPEG) || defined(SMARTMPEG_E)
if(pOpenParams->type == GD_IR_RECEIVER )
{
GD_GPIO_OpenFunctionMode(GD_GPIO_IR_IN, &gpioHd);
if((IR_Status & GD_IR_RECEIVER_OPENED) == GD_IR_RECEIVER_OPENED)
{
return GD_ERR_ALREADY_OPEN;
}
GH_IRR_set_Prescaler(pOpenParams->irr_config_s.prescaler);
IRR_Initial();
IR_Status |= GD_IR_RECEIVER_OPENED;
}
else if( pOpenParams->type == GD_IR_TRANSMITTER )
{
GD_GPIO_OpenFunctionMode(GD_GPIO_IR_OUT, &gpioHd);
if((IR_Status & GD_IR_TRANSMITTER_OPENED) == GD_IR_TRANSMITTER_OPENED)
{
return GD_ERR_ALREADY_OPEN;
}
IRT_OpenTransmitter(pOpenParams);
IR_Status |= GD_IR_TRANSMITTER_OPENED;
}
else
{
return GD_ERR_BAD_PARAMETER;
}
*pHandle =(GD_HANDLE) pOpenParams->type;
return GD_OK;
#endif
#if defined(SMARTMPEG_L)
if(pOpenParams->type == GD_IR_RECEIVER )
{
GD_GPIO_Open(pOpenParams->irr_config_s.gpioIrrPin,
GD_GPIO_TYPE_INPUT_IR_IN, NULL, &gpioHd);
if((IR_Status & GD_IR_RECEIVER_OPENED) == GD_IR_RECEIVER_OPENED)
{
return GD_ERR_ALREADY_OPEN;
}
GH_IRR_set_Prescaler(pOpenParams->irr_config_s.prescaler);
IRR_Initial();
IR_Status |= GD_IR_RECEIVER_OPENED;
}
else
{
return GD_ERR_BAD_PARAMETER;
}
*pHandle =(GD_HANDLE) pOpenParams->type;
return GD_OK;
#endif
#if defined(SMARTMPEG_C) || defined(SMARTMPEG_M) || defined(SMARTMPEG_D) || defined(GK6105S) || defined(GK6106)
if(pOpenParams->type == GD_IR_RECEIVER )
{
GD_GPIO_OpenFunctionMode(GD_GPIO_TYPE_INPUT_IR_DATA, &gpioHd);
if((IR_Status & GD_IR_RECEIVER_OPENED) == GD_IR_RECEIVER_OPENED)
{
return GD_ERR_ALREADY_OPEN;
}
GH_IRR_set_Prescaler(pOpenParams->irr_config_s.prescaler);
IRR_Initial();
IR_Status |= GD_IR_RECEIVER_OPENED;
}
else if( pOpenParams->type == GD_IR_TRANSMITTER )
{
GD_GPIO_OpenFunctionMode(GD_GPIO_TYPE_OUTPUT_IR_DATA, &gpioHd);
if((IR_Status & GD_IR_TRANSMITTER_OPENED) == GD_IR_TRANSMITTER_OPENED)
{
return GD_ERR_ALREADY_OPEN;
}
IRT_OpenTransmitter(pOpenParams);
IR_Status |= GD_IR_TRANSMITTER_OPENED;
}
else
{
return GD_ERR_BAD_PARAMETER;
}
*pHandle =(GD_HANDLE) pOpenParams->type;
return GD_OK;
#endif
// if(pOpenParams->type == GD_IR_RECEIVER )
// {
// #ifndef SMARTMPEG_L
// GD_GPIO_OpenFunctionMode(GD_GPIO_IR_IN, &gpioHd);
// #else
// GD_GPIO_Open(pOpenParams->irr_config_s.gpioIrrPin,
// GD_GPIO_TYPE_INPUT_IR_IN, NULL, &gpioHd);
// #endif
// if((IR_Status & GD_IR_RECEIVER_OPENED) == GD_IR_RECEIVER_OPENED)
// return GD_ERR_ALREADY_OPEN;
// GH_IRR_set_Prescaler(pOpenParams->irr_config_s.prescaler);
// IRR_Initial();
// IR_Status |= GD_IR_RECEIVER_OPENED;
// }
// #ifndef SMARTMPEG_L
// else if( pOpenParams->type == GD_IR_TRANSMITTER )
// {
// GD_GPIO_OpenFunctionMode(GD_GPIO_IR_OUT, &gpioHd);
// if((IR_Status & GD_IR_TRANSMITTER_OPENED) == GD_IR_TRANSMITTER_OPENED)
// return GD_ERR_ALREADY_OPEN;
// IRT_OpenTransmitter(pOpenParams);
// IR_Status |= GD_IR_TRANSMITTER_OPENED;
// }
// #endif
// else
// {
// return GD_ERR_BAD_PARAMETER;
// }
//
// *pHandle =(GD_HANDLE) pOpenParams->type;
//
// return GD_OK;
}
/******************************************************************************
**
** \brief Opens the AVLlink1108 front-end device.
**
** This function opens the front-end device and fills the device data
** structure with the implemented callback functions.
**
** \param index Internal index of front-end.
** \param pDeviceData Pointer to device data structure.
**
** \return Possible return codes:
** - #GD_OK
** - #GD_ERR_BAD_PARAMETER
** - #GD_ERR_FE_OPEN
** - #GD_ERR_FE_OPEN_I2C
**
******************************************************************************/
GERR GD_FE_A17_Open(U8 index, GD_FE_DEVICE_DATA_S* pDeviceData)
{
UINT8 ret;
//AVL_MPEG_Info mpegInfo;
GERR retVal;
U8 times;
if (index >= GD_FE_MAX_NUM) return GD_ERR_BAD_PARAMETER;
/* control lnb power and switch */
if(AntennaPowerInitial==GFALSE)
{
#if !defined(RFPOWER_DEMOD)
retVal = GD_GPIO_Open(GD_GPIO_20, GD_GPIO_TYPE_OUTPUT_1, NULL, &GPIO20Handle);
if (retVal != GD_OK)
{
//GM_PrStr("\n[GD_FE_A17_Open] ERR: GPIO could not be opened\n");
return (retVal);
}
retVal = GD_GPIO_Open(GD_GPIO_27, GD_GPIO_TYPE_OUTPUT_1, NULL, &GPIO27Handle);
if (retVal != GD_OK)
{
//GM_PrStr("\n[GD_FE_A17_Open] ERR: GPIO could not be opened\n");
return (retVal);
}
AntennaPowerInitial=GTRUE;
GD_GPIO_Write(GPIO20Handle, 0);
GD_GPIO_Write(GPIO27Handle, 0);
lrTurn = 0;
#else
lrTurn = 0;
MB86A17_set_rf_pola(RA_Normal);//Left
#endif /* RFPOWER_DEMOD */
}
/* check device data */
if (pDeviceData->pSystemParams == NULL) return GD_ERR_BAD_PARAMETER;
if (pDeviceData->systemType != GD_FE_SYSTEM_TYPE_SATELLITE)
return GD_ERR_BAD_PARAMETER;
if (pDeviceData->handleI2C == (GD_HANDLE)0) return GD_ERR_BAD_PARAMETER;
ret=GD_FE_A17_Reset(index);
if(ret!=GD_OK)
{
//GM_Printf("Reset Error!\n");
return GD_ERR_FE_OTHER;
}
AntennaPowerInitial = GTRUE;
/* fill device data structure with call back functions */
pDeviceData->feCloseFct = (GERR (*)(U8))GD_FE_A17_Close;
pDeviceData->feSetSystemParamsFct = (GERR (*)(U8, GD_FE_SYSTEM_PARAMS_S*))GD_FE_A17_SetSystemParams;
pDeviceData->feResetFct = (GERR (*)(U8))GD_FE_A17_Reset;
pDeviceData->feTuneFct = (GERR (*)(U8, GD_FE_TUNE_PARAMS_S*))GD_FE_A17_Tune;
pDeviceData->feScanFct = (GERR (*)(U8, GD_FE_SCAN_PARAMS_S*))GD_FE_A17_Scan;
// pDeviceData->feScanFct = NULL;
pDeviceData->feSendDiseqcCommandFct = (GERR (*)(U8, U8, U8*, U8*, U8*))GD_FE_A17_SendDiseqcCommand;
pDeviceData->feGetStatusFct = (GERR (*)(U8, GD_FE_STATUS_E*))GD_FE_A17_GetStatus;
pDeviceData->feGetFECFct = (GERR (*)(U8, GD_FE_FEC_E*))GD_FE_A17_GetFEC;
pDeviceData->feGetAFCFct = NULL;
pDeviceData->feGetBERFct = (GERR (*)(U8, U32*))GD_FE_A17_GetBER;
pDeviceData->feGetSignalQualityFct = (GERR (*)(U8, U16*))GD_FE_A17_GetSignalQuality;
pDeviceData->feGetSignalStrengthFct = (GERR (*)(U8, U16*))GD_FE_A17_GetSignalStrength;
pDeviceData->feGetTuneParamsFct = NULL;
pDeviceData->feSetAntennaPowerFct = (GERR (*)(U8, GBOOL))GD_FE_A17_SetAntennaPower;
/* store pointer to device data for later */
pData[index] = pDeviceData;
SET_I2C;
#if 1
for (times = 0;times < 10; times++)
{
if ((ret = MB86A17_init(index)) == GD_OK)
{
break;
}
else
{
//GM_Printf("\nInitial gk5109s failed!No:%d, ret=0x%x\n",times,ret);
if (times == 9)
return GD_ERR_FE_OTHER;
}
}
#endif
//Enter device address to the pointer.
(void)MB86A17_Init_Adr(&fdDat[index]);
//Enter initialization parameters after power on to the pointer.
(void)MB86A17_Init_Param(&fdDat[index]);
return GD_OK;
}
GERR GD_USB_PHY_Init(U8 GpioNumber)
{
U32 tmp_data;
U32 cmp_pass1;
GD_HANDLE Gpiohandle;
printf("UTMI2 Wait reset release.\n");
GD_TIMER_Delay(100);
printf("UTMI2 Begin initial sequence ...\n");
#ifdef GK710X
GD_GPIO_Open(GpioNumber, GD_GPIO_TYPE_OUTPUT_1, NULL, &Gpiohandle);
GD_GPIO_Write(Gpiohandle, 1);
#else
GD_GPIO_Open(GpioNumber, GD_GPIO_TYPE_OUTPUT_1, NULL, &Gpiohandle);
GD_GPIO_Write(Gpiohandle, 0);
#endif
//USB_AHB_R(0x70170050, value);
//USB_AHB_W(0x70170050, value | 0x02);
#ifndef GK710X
//PHY reset
GH_PLL_set_USB_GRST_en(1);
GD_TIMER_Delay(20);
GH_PLL_set_USB_GRST_en(0);
GD_TIMER_Delay(20);
GH_PLL_set_USB_GRST_en(1);
#endif
// init phy
//init UTMI
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x04<<2), 0x0000040f);
// bit<7>: Power down UTMI port-0 bandgap current
/*GH_USB_PHY_set_UTMI_REG_04_ck214_syn_en(1);
GH_USB_PHY_set_UTMI_REG_04_utmi_clk120_en(1);
GH_USB_PHY_set_UTMI_REG_04_clktest_en(0);
GH_USB_PHY_set_UTMI_REG_04_clk_extra_0_en(0);
GH_USB_PHY_set_UTMI_REG_04_clk_extra_1_en(0);
GH_USB_PHY_set_UTMI_REG_04_xtal12_en(0);
GH_USB_PHY_set_UTMI_REG_04_clk_ctl_override(1);
GH_USB_PHY_set_UTMI_REG_04_force_pll_on(0);
GH_USB_PHY_set_UTMI_REG_04_ck214_syn_en(0);
GH_USB_PHY_set_UTMI_REG_04_clk_274_en(0);
GH_USB_PHY_set_UTMI_REG_04_hs_rx_roboust_en(0);*/
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x10<<2), 0x00008051);
// PLL_TEST[15]: Bypass 480MHz clock divider
// PLL_TEST[7:4]: 5'b0101_0 for 1.0x
// PLL_TEST[0]: 1: synthesizer clock, 2'b11, 0: XIN_C
/*GH_USB_PHY_set_UTMI_REG_10_input_clock(1);
GH_USB_PHY_set_UTMI_REG_10_divider_selection(0x00);
GH_USB_PHY_set_UTMI_REG_10_divider_control(0xA);
GH_USB_PHY_set_UTMI_REG_10_clock_outputs_source(0x00);
GH_USB_PHY_set_UTMI_REG_10_clock_outputs_ratio(0x00);
GH_USB_PHY_set_UTMI_REG_10_digital_output(0x00);
GH_USB_PHY_set_UTMI_REG_10_transmitter(0x02);*/
//USB_AHB_W(REG_UTMI_BASE+(0x11<<2), 0x00002088);
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x11<<2), 0x00005080);
// PLL_TEST[30:28]: 3'b101 for IBIAS current select
// PLL_TEST[23] CLK480 to digital output source selection
// PLL_TEST[20] reset pll
/*GH_USB_PHY_set_UTMI_REG_11_ENDISC(0x00);
GH_USB_PHY_set_UTMI_REG_11_EXTDISC(0x00);
GH_USB_PHY_set_UTMI_REG_11_ENLOCKZ(0x00);
GH_USB_PHY_set_UTMI_REG_11_ENAUTO(0x00);
GH_USB_PHY_set_UTMI_REG_11_ENDCC(0x00);
GH_USB_PHY_set_UTMI_REG_11_TVCO(0x00);
GH_USB_PHY_set_UTMI_REG_11_output_source(0x01);
GH_USB_PHY_set_UTMI_REG_11_ENINV(0x00);
GH_USB_PHY_set_UTMI_REG_11_ENINVENTMUX(0x00);
GH_USB_PHY_set_UTMI_REG_11_input_clock(0x00);*/
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x11<<2), 0x00005090);
//GH_USB_PHY_set_UTMI_REG_11_ENDCC(0x01);
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x00<<2), 0x00006BC3);
// Turn on reference voltage and regulator
// reg_pdn: bit<15>, bit <2> ref_pdn
/*GH_USB_PHY_set_UTMI0_pdn_override(0x01);
GH_USB_PHY_set_UTMI0_term_override(0x01);
GH_USB_PHY_set_UTMI0_ref_pdn(0x00);
GH_USB_PHY_set_UTMI0_dp_puen(0x00);
GH_USB_PHY_set_UTMI0_dm_puen(0x00);
GH_USB_PHY_set_UTMI0_r_pumode(0x00);
GH_USB_PHY_set_UTMI0_r_dp_pden(0x01);
GH_USB_PHY_set_UTMI0_r_dm_pden(0x01);
GH_USB_PHY_set_UTMI0_hs_dm_pdn(0x01);
GH_USB_PHY_set_UTMI0_pll_pdn(0x01);
GH_USB_PHY_set_UTMI0_hs_ted_pdn(0x00);
GH_USB_PHY_set_UTMI0_hs_preamp_pdn(0x01);
GH_USB_PHY_set_UTMI0_f1_xcvf_pdn(0x00);
GH_USB_PHY_set_UTMI0_vbusdet_pdn(0x01);
GH_USB_PHY_set_UTMI0_iref_pdn(0x01);
GH_USB_PHY_set_UTMI0_pdn(0x00);*/
//USB_AHB_W(REG_UTMI_BASE+(0x0A<<2), 0x0000140B);
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x0A<<2), 0x00003403);
GD_TIMER_Delay(20);
// Delay(1ms) wait for regulator stable
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x00<<2), 0x000069C3);
// Turn on UPLL, reg_pdn: bit<9>
//GH_USB_PHY_set_UTMI0_pll_pdn(0x00);
GD_TIMER_Delay(10);
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x11<<2), 0x00005080);
// PLL_TEST[20] reset pll
GD_TIMER_Delay(20);
// Delay(2ms) wait for PLL stable
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x00<<2), 0x00000001);
// Turn all (including hs_current) use override mode
//GH_USB_PHY_set_UTMI0(0x00000001);
GD_TIMER_Delay(1000);
// Delay(1ms) wait for analog circuit stabl
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x1E<<2), 0x00000001);
GD_TIMER_Delay(1000);
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x1E<<2), 0x00000000);
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x03<<2), 0x00000023);
GD_TIMER_Delay(10);
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x03<<2), 0x00000020);
// host
// USB_AHB_W(REG_UTMI_BASE+(0x0A<<2), 0x00000003);
// device
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x0A<<2), 0x0000000b);
GD_TIMER_Delay(1000);
// end init
//reset USB controller
#ifdef GK710X
USB_AHB_R(0x70170088, tmp_data);
tmp_data |= 0x20000000;//0x6CC36011
USB_AHB_W(0x70170088, tmp_data);
GD_TIMER_Delay(10);
tmp_data &= ~0x20000000;//0x4CC36011
USB_AHB_W(0x70170088, 0x00000003);
USB_AHB_W(0x70170088, tmp_data);
GD_TIMER_Delay(10);
#else
USB_AHB_R(0xa0170088, tmp_data); // usb_ctrl_soft_reset,USB controller èí?t?′??: rw
tmp_data |= 0x20000000;//0x6CC36011 // USB ?????÷èí?t?′??￡?μíμ????′??
USB_AHB_W(0xa0170088, tmp_data);
GD_TIMER_Delay(10);
tmp_data &= ~0x20000000;//0x4CC36011
USB_AHB_W(0xa0170088, 0x00000003);
USB_AHB_W(0xa0170088, tmp_data);
GD_TIMER_Delay(10);
#endif
//dev_connect;
///////////////////////////////////////////////////////////////////////////////
//port-0 loop back check
/*USB_AHB_W(REG_UTMI_BASE+(0x03<<2), 0x00000043);
GH_USB_PHY_set_UTMI_REG_03_rx_swreset(0x01);
GH_USB_PHY_set_UTMI_REG_03_utmi_tx_sw_reset(0x01);
GH_USB_PHY_set_UTMI_REG_03_tx_force_hs_current_enable(0x00);
GH_USB_PHY_set_UTMI_REG_03_tx_fl_early_4(0x00);
GH_USB_PHY_set_UTMI_REG_03_tx_fl_latency_delay_1(0x00);
GH_USB_PHY_set_UTMI_REG_03_hs_stage_select(0x02);
GH_USB_PHY_set_UTMI_REG_03_otg_dual_role(0x00);
GH_USB_PHY_set_UTMI_REG_03_tx_reset_fsm(0x00);
GH_USB_PHY_set_UTMI_REG_03_cdr_mode_sel(0x00);
GH_USB_PHY_set_UTMI_REG_03_tx_reserved(0x00);
GH_USB_PHY_set_UTMI_REG_03_vbusdet_test(0x00);
USB_AHB_W(REG_UTMI_BASE+(0x03<<2), 0x00000040);
GH_USB_PHY_set_UTMI_REG_03_rx_swreset(0x00);
GH_USB_PHY_set_UTMI_REG_03_utmi_tx_sw_reset(0x00);
USB_AHB_W(REG_UTMI_BASE+(0x00<<2), 0x00000001);
GH_USB_PHY_set_UTMI0(0x00000001);
USB_AHB_W(REG_UTMI_BASE+(0x0A<<2), 0x00000600);
// bit <9> mac_mode_ovd, bit <8> termsel, bit <7:6> xcvrsel, bit <5:4> opmode
GH_USB_PHY_set_UTMI_REG_0A_vbusvalid(0x00);
GH_USB_PHY_set_UTMI_REG_0A_avalid(0x00);
GH_USB_PHY_set_UTMI_REG_0A_sessend(0x00);
GH_USB_PHY_set_UTMI_REG_0A_iddig(0x00);
GH_USB_PHY_set_UTMI_REG_0A_opmode(0x00);
GH_USB_PHY_set_UTMI_REG_0A_xcvrsel(0x01);//0:high 1:full 2: low
GH_USB_PHY_set_UTMI_REG_0A_termsel(0x01);//0:high 1:full
GH_USB_PHY_set_UTMI_REG_0A_macmode_ovd(0x01);
GH_USB_PHY_set_UTMI_REG_0A_suspendm(0x01);
GH_USB_PHY_set_UTMI_REG_0A_usb_bond_ovd(0x00);
GH_USB_PHY_set_UTMI_REG_0A_usb_bond_set(0x00);
GH_USB_PHY_set_UTMI_REG_0A_host_chirp_det(0x00);
GH_USB_PHY_set_UTMI_REG_0A_hs_tx_ien_mask(0x00);
GH_USB_PHY_set_UTMI_REG_0A_hs_tx_ien_mask_method(0x00);
USB_AHB_W(REG_UTMI_BASE+(0x08<<2), 0x00000078);
// bit <7> hs_se0, bit<5> force_tx_non_busy, bit<4> force_rx_non_busy,
// bit <3:0> debug bus select
GH_USB_PHY_set_UTMI_REG_08_test_bus_select(0x08);
GH_USB_PHY_set_UTMI_REG_08_force_rx_nonbusy(0x01);
GH_USB_PHY_set_UTMI_REG_08_force_tx_nonbusy(0x01);
GH_USB_PHY_set_UTMI_REG_08_utmi_int_clr(0x01);
GH_USB_PHY_set_UTMI_REG_08_se0_set(0x00);
GH_USB_PHY_set_UTMI_REG_08_tx_data(0x00);
GH_USB_PHY_set_UTMI_REG_08_tx_en(0x00);
GH_USB_PHY_set_UTMI_REG_08_tx_se0(0x00);
GH_USB_PHY_set_UTMI_REG_08_tx_override(0x00);
GH_USB_PHY_set_UTMI_REG_08_power_good_rst(0x00);
GH_USB_PHY_set_UTMI_REG_08_phy_mode_enable(0x00);
GH_USB_PHY_set_UTMI_REG_08_error_flag_clr(0x00);
GH_USB_PHY_set_UTMI_REG_08_hd_tx_override(0x00);*/
#if 0
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x1A<<2), 0x00000000); // set data pattern: 0000
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x19<<2), 0x000001fe); // bit <8> set tx_go, bit <10> fix data mode
// TV.riu_read(REG_UTMI_BASE1+'h18); //
// poll_1_clear(REG_UTMI_BASE1+'h18, 'h8000);
USB_AHB_R(REG_USB_PHY_UTMI_REG_00+(0x18<<2), tmp_data); // bit <8> set tx_go, bit <10> fix data mode
GD_TIMER_Delay(100); // Delay(1ms) wait for analog circuit stabl
if((tmp_data&0x0000C000)==0x00008000)
cmp_pass1 = 1;
else
cmp_pass1 = 0;
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x19<<2), 0x000000fe); // clear tx_go (remember keep bit <10> for port1 fix data mode)
if(cmp_pass1)
printf("\n==========OK, USB TEST PASS.==========\n");
else
printf("\n=========Error,USB TEST FIAL.==========\n");
//$finish();
#endif
return GD_OK;
}
