/******************************************************************************
Name: flashWrite
Description: Writes a data word to flash memory.
Parameters: 1) flash memory address (in flash memory space)
2) data
Returns: none
******************************************************************************/
void flashWrite(U32 addr, U16 data)
{
U32 a = 0;
GERR ferr = GD_OK;
/* add EXT IRQ0 to control A21 pin */
if ( addr >= FLASH_SIZE_2M_WORD )
{
ferr = GD_GPIO_Write(IRQ0Handle, 1);
if ( ferr == GD_OK )
{
a = thisStartAddress + ((addr - FLASH_SIZE_2M_WORD)<<2);
}
}
else
{
a = thisStartAddress + (addr<<2);
}
*(volatile U16 *)a = data;
/* add EXT IRQ0 to control A21 pin */
if ( addr >= FLASH_SIZE_2M_WORD )
{
ferr = GD_GPIO_Write(IRQ0Handle, 0);
}
}
GERR GD_FE_A17_Init()
{
GERR retVal = GD_OK;
GD_HANDLE h;
if ( AntennaPowerInitial == GFALSE )
{
retVal = GD_GPIO_Open(GD_GPIO_30, GD_GPIO_TYPE_OUTPUT_1, NULL, &h);
if (retVal != GD_OK)
{
//GM_PrStr("\n[GD_FE_A17_Open] ERR: GPIO_30 could not be opened\n");
return (retVal);
}
//MB86A17_sleep(10);
GD_GPIO_Write(h, 0);
//MB86A17_sleep(10);
GD_GPIO_Write(h, 1);
}
#if 0
retVal = MB86A17_init();
if ( retVal != GD_OK )
return GD_ERR_FE_OTHER;
#endif
return retVal;
}
/******************************************************************************
**
** \brief Set the LNB power to on or off.
**
** \param index Internal index of front-end.
** \param power FBOOl indicating if the power should be on or off.
**
** \return Possible return codes:
** - #GD_OK
** - #GD_ERR_BAD_PARAMETER
**
******************************************************************************/
GERR GD_FE_Altobeam_SetAntennaPower(U8 index, GBOOL power)
{
#if 0
if ( index >= GD_FE_MAX_NUM )
{
return GD_ERR_BAD_PARAMETER;
}
if ( power == lrTurn ) return GD_OK;
if ( AntennaPowerInitial == GTRUE )
{
if ( power )
{
GD_GPIO_Write(GPIO58Handle, 1);//Right
lrTurn = 1;
}
else
{
GD_GPIO_Write(GPIO58Handle, 0);//Left
lrTurn = 0;
}
}
else
{
return GD_ERR_BAD_PARAMETER;
}
#endif
return GD_OK;
}
GERR GD_FE_DIB7070X_Open(U8 index, GD_FE_DEVICE_DATA_S* pDeviceData)
{
GERR error = GD_OK; //Modified by David Cao 2008-07-30
if (index >= GD_FE_MAX_NUM) return GD_ERR_BAD_PARAMETER;
if (pDeviceData == NULL) return GD_ERR_BAD_PARAMETER;
/* check device data */
if (pDeviceData->pSystemParams == NULL) return GD_ERR_BAD_PARAMETER;
if (pDeviceData->systemType != GD_FE_SYSTEM_TYPE_TERRESTRIAL) return GD_ERR_BAD_PARAMETER;
/* store pointer to device data */
pData[index] = pDeviceData;
/* reset the dibcom chip */
#if 0
if (pDeviceData->ghwIndex >= 0)
{
#if defined(SMARTMPEG_C)
error = GD_GPIO_Open(pDeviceData->ghwIndex, GD_GPIO_TYPE_OUTPUT_1, NULL,&pData[index]->handleI2C);
#endif
if(error != GD_OK)
{
#ifdef GD_FE_MB86667_DEBUG01
GM_Printf("MB86667_Tune(%i) = 0x%X\n",index,(U32)error);
#endif
return(error);
}
GD_GPIO_Write(pData[index]->handleI2C, 1);
FE_SleepTime(10);
GD_GPIO_Write(pData[index]->handleI2C, 0);
FE_SleepTime(10);
GD_GPIO_Write(pData[index]->handleI2C, 1);
FE_SleepTime(10);
}
#endif
/* Initial dibcom 7070 chip */
// test_dibcom_7070();
error = dib_init();
if( error != GD_OK )
GM_Printf("dib_init error!\n");
/* fill device data structure with call back functions */
pData[index]->feCloseFct = GD_FE_DIB7070X_Close;
pData[index]->feSetSystemParamsFct = GD_FE_DIB7070X_SetSystemParams;
pData[index]->feResetFct = GD_FE_DIB7070X_Reset;
pData[index]->feTuneFct = GD_FE_DIB7070X_Tune;
pData[index]->feScanFct = NULL;
pData[index]->feSendDiseqcCommandFct = NULL;
pData[index]->feGetStatusFct = GD_FE_DIB7070X_GetStatus;
pData[index]->feGetFECFct = NULL;
pData[index]->feGetAFCFct = GD_FE_DIB7070X_GetAFC;
pData[index]->feGetBERFct = GD_FE_DIB7070X_GetBER;
pData[index]->feGetSignalQualityFct = GD_FE_DIB7070X_GetSignalQuality;
pData[index]->feGetSignalStrengthFct = GD_FE_DIB7070X_GetSignalStrength;
pData[index]->feGetTuneParamsFct = GD_FE_DIB7070X_GetTuneParams;
pData[index]->feSetAntennaPowerFct = NULL;
return GD_OK;
}
/*!
*******************************************************************************
**
** \brief Controls LED550 and LED551 near ICC card connector.
**
** \param index Index of the LED to be controlled: 0 = LED550, 1 = 551.
** \param flgOffOn Type of control signal.
** \param pOption Optional parameters (not used yet).
**
** \return Possible return codes:
** - #GD_OK
** - return codes from subroutines
**
** \sa gd_fhw_ControlLed_SMARTMPEG_STB01
**
******************************************************************************/
static GERR gd_fhw_ControlLed_SMARTMPEG_STB01 (S32 index,
GD_GHW_LED_CONTROL_E flgOffOn,
void *pOption)
{
GERR retVal = GD_OK;
if (index == 0)
{
/* This controls LED550 (VPPEN of ICC card) */
if (Gpio3Handle == NULL)
{
retVal = GD_GPIO_Open(GD_GPIO_3, GD_GPIO_TYPE_OUTPUT_PUSH_PULL, NULL, &Gpio3Handle);
if (retVal != GD_OK)
{
#ifdef GD_FHW_SMARTMPEG_STB01_DEBUG
if (retVal == GD_ERR_ALREADY_OPEN)
GM_PrStr("\n[gd_fhw_ControlLed_SMARTMPEG_STB01] ERR: GPIO3 already open\n");
else
GM_PrStr("\n[gd_fhw_ControlLed_SMARTMPEG_STB01] ERR: GPIO3 could not be opened\n");
#endif
return (retVal);
}
}
if (flgOffOn == GD_GHW_LED_OFF)
retVal = GD_GPIO_Write(Gpio3Handle, 0);
else
retVal = GD_GPIO_Write(Gpio3Handle, 1);
} /* if (index ... */
else
{
/* This controls LED551 (VCCEN of ICC card) */
if (Gpio6Handle == NULL)
{
retVal = GD_GPIO_Open(GD_GPIO_6, GD_GPIO_TYPE_OUTPUT_PUSH_PULL, NULL, &Gpio6Handle);
if (retVal != GD_OK)
{
#ifdef GD_FHW_SMARTMPEG_STB01_DEBUG
if (retVal == GD_ERR_ALREADY_OPEN)
GM_PrStr("\n[gd_fhw_ControlLed_SMARTMPEG_STB01] ERR: GPIO6 already open\n");
else
GM_PrStr("\n[gd_fhw_ControlLed_SMARTMPEG_STB01] ERR: GPIO6 could not be opened\n");
#endif
return (retVal);
}
}
if (flgOffOn == GD_GHW_LED_OFF)
retVal = GD_GPIO_Write(Gpio6Handle, 0);
else
retVal = GD_GPIO_Write(Gpio6Handle, 1);
} /* if (index == 0) ... else */
return (retVal);
}
/*!
*******************************************************************************
**
** \brief Controls the reset for the front ends.
**
** \param index Index of the front end to be resetted.
** \param cntrlVal Type of reset signal.
** \param pOption Optional parameters (not used yet).
**
** \return Possible return codes:
** - #GD_OK
** - #GD_ERR_BAD_PARAMETER
** - return codes from subroutines
**
** \sa gd_fhw_ControlFeReset_SMARTMPEG_STB01
**
******************************************************************************/
static GERR gd_fhw_ControlFeReset_SMARTMPEG_STB01 (S32 index,
GD_GHW_RESET_CONTROL_E cntrlVal,
void *pOption)
{
/* This driver works on SmartMPEG DK board with JP151 set to 1-2 */
GERR retVal = GD_OK;
U32 Del;
if (index >= GD_FE_MAX_NUM)
return (GD_ERR_BAD_PARAMETER);
/* both front ends use the same reset signal, we reset only in case of index == 0
otherwise the initialisation of the first front end is lost when the second
one is opened. */
if (index > 0)
return (GD_OK);
switch ( cntrlVal )
{
case(GD_GHW_RESET_INACTIVE):
/* now switch back to previous Scart control value */
gd_fhw_ControlScart_SMARTMPEG_STB01(0, PreviousScartRGBMode, NULL);
break;
case(GD_GHW_RESET_ACTIVE):
/* first reconfigure the GPIO */
retVal = gd_fhw_SMARTMPEG_STB01_reconfigGpio(GD_GPIO_1,
GD_GPIO_TYPE_OUTPUT_PUSH_PULL,
&Gpio1RtsHandle);
if (retVal == GD_OK)
retVal = GD_GPIO_Write(Gpio1RtsHandle, 1);
break;
case(GD_GHW_RESET_PULSE):
/* first reconfigure the GPIO */
retVal = gd_fhw_SMARTMPEG_STB01_reconfigGpio(GD_GPIO_1,
GD_GPIO_TYPE_OUTPUT_PUSH_PULL,
&Gpio1RtsHandle);
if (retVal == GD_OK)
retVal = GD_GPIO_Write(Gpio1RtsHandle, 1);
Del = GD_FHW_SIMPLE_RESET_DELAY;
while (Del--);
/* now switch back to previous Scart control value */
gd_fhw_ControlScart_SMARTMPEG_STB01(0, PreviousScartRGBMode, NULL);
break;
default:
/* do nothing */
retVal = GD_ERR_BAD_PARAMETER;
break;
}
return retVal;
}
GERR GD_FE_DIB7070X_Reset(U8 index)
{
if (index >= GD_FE_MAX_NUM) return GD_ERR_BAD_PARAMETER;
GD_GPIO_Write(pData[index]->handleI2C, 1);
FE_SleepTime(10);
GD_GPIO_Write(pData[index]->handleI2C, 0);
FE_SleepTime(10);
GD_GPIO_Write(pData[index]->handleI2C, 1);
FE_SleepTime(10);
return GD_OK;
}
/*!
*******************************************************************************
**
** \brief Controls the reset for the front ends.
**
** \param index Index of the front end to be resetted.
** \param cntrlVal Type of reset signal.
** \param pOption Optional parameters (not used yet).
**
** \return Possible return codes:
** - #GD_OK
** - #GD_ERR_BAD_PARAMETER
**
** \sa gd_fhw_ControlFeReset_SMARTMPEG_M_EVB
**
******************************************************************************/
static GERR gd_fhw_ControlFeReset_SMARTMPEG_M_EVB(S32 index, GD_GHW_RESET_CONTROL_E cntrlVal, void *pOption)
{
GERR retVal = GD_OK;
GD_HANDLE h;
U32 delay;
U8 pinNum;
/* on this board the front ends use separate reset signals, we need to distinguish according to index */
switch (index)
{
case 0:
/* reset Front end 1 */
pinNum = GD_FHW_SMARTMPEG_M_EVB_FE1PIN;
break;
case 1:
/* reset Front end 2 */
pinNum = GD_FHW_SMARTMPEG_M_EVB_FE2PIN;
break;
default:
return (GD_ERR_BAD_PARAMETER);
}
switch(cntrlVal)
{
case(GD_GHW_RESET_INACTIVE):
retVal = GD_GPIO_Open(GD_GPIO_39, GD_GPIO_TYPE_OUTPUT_1, NULL, &h);
retVal = GD_GPIO_Write(h, 1); // FE reset high
GD_GPIO_Close(&h);
break;
case(GD_GHW_RESET_ACTIVE):
retVal = GD_GPIO_Open(GD_GPIO_39, GD_GPIO_TYPE_OUTPUT_1, NULL, &h);
retVal = GD_GPIO_Write(h, 0); // FE reset low
GD_GPIO_Close(&h);
break;
case(GD_GHW_RESET_PULSE):
retVal = GD_GPIO_Open(GD_GPIO_39, GD_GPIO_TYPE_OUTPUT_1, NULL, &h);
retVal = GD_GPIO_Write(h, 0); // FE reset low
if (retVal != GD_OK)
return (retVal);
delay = GD_FHW_SIMPLE_RESET_DELAY;
while (delay--);
retVal = GD_GPIO_Write(h, 1); // FE reset high
GD_GPIO_Close(&h);
break;
default:
/* do nothing */
retVal = GD_ERR_BAD_PARAMETER;
}
return retVal;
}
static GERR gd_fhw_ControlTsMuxing_SMARTMPEG_STB01(S32 index, GD_GHW_EXT_TS656_MUX_E cntrlVal, void *pOption)
{
GD_HANDLE h;
U8 *pSel;
int Option;
pSel = pOption;
Option = *pSel;
if ((cntrlVal==GD_GHW_EXT_656_INP_P_MUX)||(cntrlVal==GD_GHW_EXT_656_INP_N_MUX)) {
cntrlVal = GD_GHW_EXT_TS_INP_MUX; // this is the same
}
if (cntrlVal==GD_GHW_EXT_TS_INP_MUX) {
if (Option==GD_FHW_TS656_EXT_MUX_DIRECT_TS_INDEX)
{
// XD_PrStr("\n->Configure TS-B-Input via LVDS-Interface");
GD_GPIO_Open(GD_GPIO_9, GD_GPIO_TYPE_OUTPUT_PUSH_PULL, NULL, &h);
GD_GPIO_Write(h, 0);
GD_GPIO_Close(&h);
#if defined(GK6106)
GD_TSD_InputSelector(GD_TSD_INPUT_FROM_OTHER_TSD, GD_TSD_INPUT_FROM_OTHER_TSD, GD_TSD_INPUT_FROM_OTHER_TSD, GD_TSD_INPUT_FROM_OTHER_TSD);
#else
GD_TSD_InputSelector(GD_TSD_INPUT_FROM_OTHER_TSD, GD_TSD_INPUT_FROM_OTHER_TSD);
#endif
}
else if (Option==GD_FHW_TS656_EXT_MUX_FE0_INDEX)
{
// XD_PrStr("\n->Configure TS-A-Input from FE");
GD_GPIO_Open(GD_GPIO_9, GD_GPIO_TYPE_OUTPUT_PUSH_PULL, NULL, &h);
GD_GPIO_Write(h, 1);
GD_GPIO_Close(&h);
#if defined(GK6106)
GD_TSD_InputSelector(GD_TSD_INPUT_FROM_DEFAULT, GD_TSD_INPUT_FROM_DEFAULT, GD_TSD_INPUT_FROM_DEFAULT, GD_TSD_INPUT_FROM_DEFAULT);
#else
GD_TSD_InputSelector(GD_TSD_INPUT_FROM_DEFAULT, GD_TSD_INPUT_FROM_DEFAULT);
#endif
}
}
else if (cntrlVal==GD_GHW_EXT_656_OUT_P_MUX)
{
// XD_PrStr("\n->Configure TS-B 656 Output");
GD_GPIO_Open(GD_GPIO_9, GD_GPIO_TYPE_INPUT, NULL, &h);
GD_GPIO_Close(&h);
}
return (GD_OK);
}
GERR GD_FE_LGS8GA6_Reset(U8 index)
{
GERR ferr = GD_OK;
if ( index >= GD_FE_MAX_NUM )
{
return GD_ERR_BAD_PARAMETER;
}
/* reset the LGS8GA6 chip */
if ( pData[index]->ghwIndex>= 0 )
{
/* error = GD_GPIO_Open(pData[index]->ghwIndex,
GD_GPIO_TYPE_OUTPUT_PUSH_PULL,
NULL,
&pData[index]->handleI2C);
if ( error != GD_OK )
return(error);*/
ferr = GD_GPIO_Open(pData[index]->ghwIndex, GD_GPIO_TYPE_OUTPUT_1, NULL, &pData[index]->handleI2C);
#ifdef GD_FE_LGS_DEBUG
if(ferr != GD_OK)
GM_PrStr("\nOpen GPIO 39 error");
#endif
ferr = GD_GPIO_Write(pData[index]->handleI2C, 1);
#ifdef GD_FE_LGS_DEBUG
if(ferr != GD_OK)
GM_PrStr("\nOpen GPIO 39 error");
#endif
LGS_Waitms(10);
ferr = GD_GPIO_Write(pData[index]->handleI2C, 0);
#ifdef GD_FE_LGS_DEBUG
if(ferr != GD_OK)
GM_PrStr("\nOpen GPIO 39 error");
#endif
LGS_Waitms(10);
ferr = GD_GPIO_Write(pData[index]->handleI2C, 1);
#ifdef GD_FE_LGS_DEBUG
if(ferr != GD_OK)
GM_PrStr("\nOpen GPIO 39 error");
#endif
LGS_Waitms(10);
GD_GPIO_Close(&pData[index]->handleI2C);
}
return ferr;
}
/*!
*******************************************************************************
**
** \brief Cancel the write/read process of I2C bus.
**
** \sa GD_I2C_Read() <br>
** GD_I2C_Write()
**
******************************************************************************/
void GD_I2C_CancelProcess(void)
{
GERR ferr;
int i;
if (i2c_initialized == GFALSE)
return; // GD_ERR_NOT_INITIALIZED;
GD_GPIO_Close(&i2c_sda_handle);
GD_GPIO_Close(&i2c_scl_handle);
ferr = GD_GPIO_Open(i2c_sda_pin, I2C_GPIO_TYPE_OUTPUT, NULL, &i2c_sda_handle);
ferr = GD_GPIO_Open(i2c_scl_pin, I2C_GPIO_TYPE_OUTPUT, NULL, &i2c_scl_handle);
GD_GPIO_Write(i2c_sda_handle, 1); // set SDA to high
GD_GPIO_Write(i2c_scl_handle, 1); // set SCL to high
for (i = 0;i < SI2C_BUS_FREE_TIME;i++); // delay loop
}
GERR I2C_SW_writeSDAnoCheck(U16 waitTime, U8 data)
{
if (data > 0)
{
GD_GPIO_SetType(i2c_sda_handle, I2C_GPIO_TYPE_OUTPUT);
GD_GPIO_Write(i2c_sda_handle, 1); // set SDA to high
}
else
{
GD_GPIO_SetType(i2c_sda_handle, I2C_GPIO_TYPE_OUTPUT);
GD_GPIO_Write(i2c_sda_handle, 0); // set SDA to low
}
#ifdef GD_I2C_SW_DELAYS
for (i = 0; i < waitTime; i++); // delay loop
#endif
return (GD_OK);
}
/******************************************************************************
**
** \brief Set the LNB power to on or off.
**
** \param index Internal index of front-end.
** \param power FBOOl indicating if the power should be on or off.
**
** \return Possible return codes:
** - #GD_OK
** - #GD_ERR_BAD_PARAMETER
**
******************************************************************************/
GERR GD_FE_A17_SetAntennaPower(U8 index, GBOOL power)
{
if ( index >= GD_FE_MAX_NUM )
{
return GD_ERR_BAD_PARAMETER;
}
if ( power == lrTurn ) return GD_OK;
if ( AntennaPowerInitial == GTRUE )
{
#if !defined(RFPOWER_DEMOD)
if ( power )
{
//MB86A17_set_rf_pola(RA_Invert);
GD_GPIO_Write(GPIO27Handle, 1);//Right
lrTurn = 1;
}
else
{
//MB86A17_set_rf_pola(RA_Normal);
GD_GPIO_Write(GPIO27Handle, 0);//Left
lrTurn = 0;
}
#else
if ( power )
{
MB86A17_set_rf_pola(RA_Invert);//Right
lrTurn = 1;
}
else
{
MB86A17_set_rf_pola(RA_Normal);//Left
lrTurn = 0;
}
#endif /* RFPOWER_DEMOD */
}
else
{
return GD_ERR_BAD_PARAMETER;
}
return GD_OK;
}
/*!
*******************************************************************************
**
** \brief Initializes the driver.
**
** This function initializes the driver. It is called only once
** during boot time. It sets the ISR and the dedicated GPIO pins
** for SDA and SCL.
**
** The GPIO pins must be i2c_initialized in this function for each channel.
** With the open function you are able to select different channels
** driving multiple devices on each channel using different slave
** adresses.
**
** Currently the driver supports only one channel.
**
** \note If you are using the software I2C driver (\c gd_i2c_sw.c) you have
** to assign GPIO pins for SDA and SCL of the dedicated channel.
** If you are using the hardware driver (\c gd_i2c.c) the GPIO pins
** are autmatically assigned (only SmartMPEG and SmartMPEG-E).
**
** \note SmartMPEG-L has no hardware I2C and therefore can not not use the
** driver (\c gd_i2c.c).
**
** \param paramsP Pointer to init parameter structure.
**
** \return Possible return codes:
** - \c #GD_OK
** - \c #GD_ERR_ALREADY_INITIALIZED
** - \c #GD_ERR_I2C_INT_ERR
** - \c #GD_ERR_BAD_PARAMETER
**
** \sa GD_I2C_Open()
** \sa \c GD_I2C_INIT_PARAMS_S
**
******************************************************************************/
GERR GD_I2C_Init(GD_I2C_INIT_PARAMS_S* paramsP)
{
int i;
GERR ferr;
if( i2c_initialized == GTRUE )
return GD_ERR_ALREADY_INITIALIZED;
i2c_initialized = GTRUE;
if ((paramsP->mode != GD_I2C_AUTO_MASTER_MODE)&&
(paramsP->mode != GD_I2C_GENERIC_MASTER_MODE))
return GD_ERR_BAD_PARAMETER;
#if defined(SMARTMPEG) || defined(SMARTMPEG_E)
i2c_sda_pin = GD_GPIO_I2C_SDA;
i2c_scl_pin = GD_GPIO_I2C_SCL;
#endif
#if defined(SMARTMPEG_L) || defined(SMARTMPEG_C) || defined(SMARTMPEG_M) || defined(SMARTMPEG_D) || defined(GK6105S) || defined(GK6106)
i2c_sda_pin = paramsP->gpioSdaPinCh1;
i2c_scl_pin = paramsP->gpioSclPinCh1;
#endif
/* Reset the SCL & SDA pin of I2C */
// GD_GPIO_Close(&i2c_sda_handle);
// GD_GPIO_Close(&i2c_scl_handle);
ferr = GD_GPIO_Open(i2c_sda_pin, I2C_GPIO_TYPE_OUTPUT, NULL, &i2c_sda_handle);
if (ferr != GD_OK)
return GD_ERR_I2C_INT_ERR;
ferr = GD_GPIO_Open(i2c_scl_pin, I2C_GPIO_TYPE_OUTPUT, NULL, &i2c_scl_handle);
if (ferr != GD_OK)
return GD_ERR_I2C_INT_ERR;
GD_GPIO_Write(i2c_sda_handle, 1); // set SDA to high
GD_GPIO_Write(i2c_scl_handle, 1); // set SCL to high
for (i = 0;i < SI2C_BUS_FREE_TIME;i++); // delay loop
i2cMutexFunctionRegister(paramsP->mutexWaitFunc, paramsP->mutexReleaseFunc);
return GD_OK;
}
GERR I2C_SW_writeSDA(U16 waitTime, U8 data)
{
U32 i;
U8 SDA_LEVEL;
if (data > 0)
{
GD_GPIO_SetType(i2c_sda_handle, I2C_GPIO_TYPE_OUTPUT);
GD_GPIO_Write(i2c_sda_handle, 1); // set SDA to high
i = MAX_CHECK_WRA;
I2C_SW_readSDA(&SDA_LEVEL);
while ((SDA_LEVEL != 1) && (i > 0))
{
GD_GPIO_SetType(i2c_sda_handle, I2C_GPIO_TYPE_OUTPUT);
GD_GPIO_Write(i2c_sda_handle, 1); // set SDA to high
I2C_SW_readSDA(&SDA_LEVEL);
i--; // wait high level at SDA
}
if (!i)
return GD_ERR_TIMEOUT;
}
else
{
GD_GPIO_SetType(i2c_sda_handle, I2C_GPIO_TYPE_OUTPUT);
GD_GPIO_Write(i2c_sda_handle, 0); // set SDA to low
i = MAX_CHECK_WRA;
I2C_SW_readSDA(&SDA_LEVEL);
while ((SDA_LEVEL != 0) && (i > 0))
{
GD_GPIO_SetType(i2c_sda_handle, I2C_GPIO_TYPE_OUTPUT);
GD_GPIO_Write(i2c_sda_handle, 0); // set SDA to high
I2C_SW_readSDA(&SDA_LEVEL);
i--; // wait high level at SDA
}
if (!i)
return GD_ERR_TIMEOUT;
}
#ifdef GD_I2C_SW_DELAYS
for (i = 0; i < waitTime; i++); // delay loop
#endif
return (GD_OK);
}
void MB86A17_Reset()
{
//2011-10-13liujinyang
GERR retVal = GD_OK;
if(!a17_gpiorest)
{
retVal = GD_GPIO_Open(GD_GPIO_30, GD_GPIO_TYPE_OUTPUT_1, NULL, &a17_gpiorest);
if (retVal != GD_OK)
{
//GM_PrStr("\n[GD_FE_GK_Open] ERR: GPIO_30 could not be opened\n");
return ;
}
}
GD_GPIO_Write(a17_gpiorest, 1);
MB86A17_sleep(5);
GD_GPIO_Write(a17_gpiorest, 0);
MB86A17_sleep(5);
GD_GPIO_Write(a17_gpiorest, 1);
MB86A17_sleep(5);
}
/*!
*******************************************************************************
**
** \brief Controls the fast blanking (RGB) and slow switching signals
** (4:3, 16:9) of the Scart connector.
**
** \param index Index of the scart connector to be controlled.
** \param cntrlVal Type of control signal.
** \param pOption Optional parameters (not used yet).
**
** \return Possible return codes:
** - #GD_OK
** - return codes from subroutines
**
** \sa gd_fhw_ControlScart_SMARTMPEG_STB01
**
******************************************************************************/
static GERR gd_fhw_ControlScart_SMARTMPEG_STB01 (S32 index,
GD_GHW_SCART_CONTROL_E cntrlVal,
void *pOption)
{
GERR retVal = GD_OK;
if (cntrlVal == GD_GHW_SCART_MODE_OFF)
{
retVal = gd_fhw_SMARTMPEG_STB01_reconfigGpio(GD_GPIO_15, GD_GPIO_TYPE_OUTPUT_PUSH_PULL, &Gpio15CtsHandle);
if (retVal == GD_OK)
retVal = GD_GPIO_Write(Gpio15CtsHandle, 1);
}
else if (cntrlVal == GD_GHW_SCART_MODE_16_9)
{
retVal = gd_fhw_SMARTMPEG_STB01_reconfigGpio(GD_GPIO_15, GD_GPIO_TYPE_INPUT, &Gpio15CtsHandle);
if (retVal == GD_OK)
retVal = GD_GPIO_Write(Gpio15CtsHandle, 1);
}
else if (cntrlVal == GD_GHW_SCART_MODE_4_3)
{
retVal = gd_fhw_SMARTMPEG_STB01_reconfigGpio(GD_GPIO_15, GD_GPIO_TYPE_OUTPUT_PUSH_PULL, &Gpio15CtsHandle);
if (retVal == GD_OK)
retVal = GD_GPIO_Write(Gpio15CtsHandle, 0);
}
else if (cntrlVal == GD_GHW_SCART_VIDEO_OUTPUT_FBAS)
{
retVal = gd_fhw_SMARTMPEG_STB01_reconfigGpio(GD_GPIO_1, GD_GPIO_TYPE_OUTPUT_PUSH_PULL, &Gpio1RtsHandle);
if (retVal == GD_OK)
retVal = GD_GPIO_Write(Gpio1RtsHandle, 0);
PreviousScartRGBMode = GD_GHW_SCART_VIDEO_OUTPUT_FBAS;
}
else if (cntrlVal == GD_GHW_SCART_VIDEO_OUTPUT_RGB)
{
retVal = gd_fhw_SMARTMPEG_STB01_reconfigGpio(GD_GPIO_1, GD_GPIO_TYPE_INPUT, &Gpio1RtsHandle);
PreviousScartRGBMode = GD_GHW_SCART_VIDEO_OUTPUT_RGB;
}
else
retVal = GD_ERR_FEATURE_NOT_SUPPORTED;
return retVal;
}
/******************************************************************************
Name: flashRead
Description: Reads a word from flash memory.
Parameters: 1) flash memory address (in flash memory space)
Returns: word
******************************************************************************/
U16 flashRead(U32 addr)
{
U32 a = 0;
U16 d = 0;
GERR ferr = GD_OK;
/* add EXT IRQ0 to control A21 pin */
if ( addr >= FLASH_SIZE_2M_WORD )
{
ferr = GD_GPIO_Write(IRQ0Handle, 1);
if ( ferr == GD_OK )
{
a = thisStartAddress + ((addr - FLASH_SIZE_2M_WORD)<<2);
}
else
{
return ferr;
}
}
else
{
a = thisStartAddress + (addr<<2);
}
d = *(volatile U16 *)a;
/* add EXT IRQ0 to control A21 pin */
if ( addr >= FLASH_SIZE_2M_WORD )
{
ferr = GD_GPIO_Write(IRQ0Handle, 0);
if (ferr != GD_OK)
{
return ferr;
}
}
return d;
}
/*!
*******************************************************************************
**
** \brief Set PWM Parameters
**
** This function set PWM parameters that includes channel, range, frequency, and duty cycle.
**
** \param channel The PWM channel that specified.
** \param frequency The PWM output frequency that specified, the unit is Hz.
** \param range The PWM output adjustable range. For example, if range is 100, the PWM duty cycle
** can be set from 1% to 99%.
** \param duty The PWM duty cycle that specified.
** \return
** - #GD_PWM_NO_ERR if successful
******************************************************************************/
GD_PWM_ERROR_CODE_E GD_PWM_Set_Param(U8 channel, U32 frequency, U32 range, U32 duty)
{
U32 mode;
U32 total;
U32 pwmDiv;
U32 clkPwm;
U32 maxClkPwm;
U32 minClkPwm;
U32 apbClk;
U64 multiple;
U32 highLevelCnt;
U32 lowLevelCnt;
if (channel >= GD_PWM_COUNT)
{
#ifdef DEBUG_PRINT
GM_Printf("PWM channel has exceed the max channel number that can be set!\n");
#endif
return GD_PWM_ERR_NOT_SUPPORTED_CHANNEL;
}
if (frequency == 0)
{
#ifdef DEBUG_PRINT
GM_Printf("PWM frequency can not be 0!\n");
#endif
return GD_PWM_ERR_NOT_SUPPORTED_FREQUENCY;
}
if (range <= 1)
{
#ifdef DEBUG_PRINT
GM_Printf("The range is too small!\n");
#endif
return GD_PWM_ERR_NOT_SUPPORTED_RANGE;
}
if ((duty == 0) || (duty >= range))
{
#ifdef DEBUG_PRINT
GM_Printf("The PWM duty can not be 0, or exceed the max range value!\n");
#endif
if (duty == 0)
{
GD_GPIO_Write(Gpiohandle[channel], 0);
}
if (duty == range)
{
GD_GPIO_Write(Gpiohandle[channel], 1);
}
return GD_PWM_ERR_WRONG_DUTY_CONFIGURATION;
}
pwmDiv = GH_PLL_get_SCALER_PWM();
apbClk = GD_GET_APB_ClkHz();
switch (pwmDiv)
{
case 0x1:
clkPwm = apbClk;
break;
case 0x20:
clkPwm = apbClk / 0x20;
break;
case 0x1AF4:
clkPwm = apbClk / 0x1AF4;
break;
default:
GH_PLL_set_SCALER_PWM(0x20);
clkPwm = apbClk / 0x20;
break;
}
maxClkPwm = clkPwm / 2;
minClkPwm = clkPwm / (65536 * 2);
if (frequency > maxClkPwm)
{
GH_PLL_set_SCALER_PWM(0x1);
clkPwm = apbClk;
maxClkPwm = clkPwm / 2;
if (frequency > maxClkPwm)
{
#ifdef DEBUG_PRINT
GM_Printf("PWM frequency exceed the maximum pwm frequency that can be set!\n");
#endif
return GD_PWM_ERR_NOT_SUPPORTED_FREQUENCY;
}
}
if (frequency < minClkPwm)
{
GH_PLL_set_SCALER_PWM(0x1AF4);
clkPwm = apbClk / 0x1AF4;
minClkPwm = clkPwm / (65536 * 2);
if (frequency < minClkPwm)
{
#ifdef DEBUG_PRINT
GM_Printf("PWM frequency exceed the minimum pwm frequency that can be set!\n");
#endif
return GD_PWM_ERR_NOT_SUPPORTED_FREQUENCY;
}
}
total = clkPwm / frequency;
multiple = total * AMPLIFICATION / range;
if ((multiple / AMPLIFICATION) < 1)
{
#ifdef DEBUG_PRINT
GM_Printf("Err: PWM range is too large, less than range %d is suggested!\n", total);
#endif
//return GD_PWM_ERR_RANGE_EXCEED_LIMIT;
range = total;
duty = total / 2;
highLevelCnt = duty;
}
else
{
highLevelCnt = duty * multiple / AMPLIFICATION;
}
lowLevelCnt = total - highLevelCnt;
if (highLevelCnt > 0xFFFF)
{
duty = total / 2;
highLevelCnt = duty;
lowLevelCnt = total - highLevelCnt;
}
mode = GH_PWM_get_Mode_mode(channel);
if(mode == GD_NORMAL_SPEED)
{
GH_PWM_set_Control_xon(channel, (highLevelCnt - 1));
GH_PWM_set_Control_xoff(channel, (lowLevelCnt - 1));
}
else
{
GH_PWM_set_Control1_xon(channel, (highLevelCnt - 1));
GH_PWM_set_Control1_xoff(channel, (lowLevelCnt - 1));
}
return GD_PWM_NO_ERR;
}
void HRPio_Clear(GD_HANDLE handle)
{
GD_GPIO_Write(handle, 0);
}
void GD_FP_FD650_Set(GD_HANDLE handle)
{
GD_GPIO_Write(handle, 1);
}
void GD_FP_FD650_Clear(GD_HANDLE handle)
{
GD_GPIO_Write(handle, 0);
}
/******************************************************************************
**
** \brief Opens the AVLlink1108 front-end device.
**
** This function opens the front-end device and fills the device data
** structure with the implemented callback functions.
**
** \param index Internal index of front-end.
** \param pDeviceData Pointer to device data structure.
**
** \return Possible return codes:
** - #GD_OK
** - #GD_ERR_BAD_PARAMETER
** - #GD_ERR_FE_OPEN
** - #GD_ERR_FE_OPEN_I2C
**
******************************************************************************/
GERR GD_FE_A17_Open(U8 index, GD_FE_DEVICE_DATA_S* pDeviceData)
{
UINT8 ret;
//AVL_MPEG_Info mpegInfo;
GERR retVal;
U8 times;
if (index >= GD_FE_MAX_NUM) return GD_ERR_BAD_PARAMETER;
/* control lnb power and switch */
if(AntennaPowerInitial==GFALSE)
{
#if !defined(RFPOWER_DEMOD)
retVal = GD_GPIO_Open(GD_GPIO_20, GD_GPIO_TYPE_OUTPUT_1, NULL, &GPIO20Handle);
if (retVal != GD_OK)
{
//GM_PrStr("\n[GD_FE_A17_Open] ERR: GPIO could not be opened\n");
return (retVal);
}
retVal = GD_GPIO_Open(GD_GPIO_27, GD_GPIO_TYPE_OUTPUT_1, NULL, &GPIO27Handle);
if (retVal != GD_OK)
{
//GM_PrStr("\n[GD_FE_A17_Open] ERR: GPIO could not be opened\n");
return (retVal);
}
AntennaPowerInitial=GTRUE;
GD_GPIO_Write(GPIO20Handle, 0);
GD_GPIO_Write(GPIO27Handle, 0);
lrTurn = 0;
#else
lrTurn = 0;
MB86A17_set_rf_pola(RA_Normal);//Left
#endif /* RFPOWER_DEMOD */
}
/* check device data */
if (pDeviceData->pSystemParams == NULL) return GD_ERR_BAD_PARAMETER;
if (pDeviceData->systemType != GD_FE_SYSTEM_TYPE_SATELLITE)
return GD_ERR_BAD_PARAMETER;
if (pDeviceData->handleI2C == (GD_HANDLE)0) return GD_ERR_BAD_PARAMETER;
ret=GD_FE_A17_Reset(index);
if(ret!=GD_OK)
{
//GM_Printf("Reset Error!\n");
return GD_ERR_FE_OTHER;
}
AntennaPowerInitial = GTRUE;
/* fill device data structure with call back functions */
pDeviceData->feCloseFct = (GERR (*)(U8))GD_FE_A17_Close;
pDeviceData->feSetSystemParamsFct = (GERR (*)(U8, GD_FE_SYSTEM_PARAMS_S*))GD_FE_A17_SetSystemParams;
pDeviceData->feResetFct = (GERR (*)(U8))GD_FE_A17_Reset;
pDeviceData->feTuneFct = (GERR (*)(U8, GD_FE_TUNE_PARAMS_S*))GD_FE_A17_Tune;
pDeviceData->feScanFct = (GERR (*)(U8, GD_FE_SCAN_PARAMS_S*))GD_FE_A17_Scan;
// pDeviceData->feScanFct = NULL;
pDeviceData->feSendDiseqcCommandFct = (GERR (*)(U8, U8, U8*, U8*, U8*))GD_FE_A17_SendDiseqcCommand;
pDeviceData->feGetStatusFct = (GERR (*)(U8, GD_FE_STATUS_E*))GD_FE_A17_GetStatus;
pDeviceData->feGetFECFct = (GERR (*)(U8, GD_FE_FEC_E*))GD_FE_A17_GetFEC;
pDeviceData->feGetAFCFct = NULL;
pDeviceData->feGetBERFct = (GERR (*)(U8, U32*))GD_FE_A17_GetBER;
pDeviceData->feGetSignalQualityFct = (GERR (*)(U8, U16*))GD_FE_A17_GetSignalQuality;
pDeviceData->feGetSignalStrengthFct = (GERR (*)(U8, U16*))GD_FE_A17_GetSignalStrength;
pDeviceData->feGetTuneParamsFct = NULL;
pDeviceData->feSetAntennaPowerFct = (GERR (*)(U8, GBOOL))GD_FE_A17_SetAntennaPower;
/* store pointer to device data for later */
pData[index] = pDeviceData;
SET_I2C;
#if 1
for (times = 0;times < 10; times++)
{
if ((ret = MB86A17_init(index)) == GD_OK)
{
break;
}
else
{
//GM_Printf("\nInitial gk5109s failed!No:%d, ret=0x%x\n",times,ret);
if (times == 9)
return GD_ERR_FE_OTHER;
}
}
#endif
//Enter device address to the pointer.
(void)MB86A17_Init_Adr(&fdDat[index]);
//Enter initialization parameters after power on to the pointer.
(void)MB86A17_Init_Param(&fdDat[index]);
return GD_OK;
}
void HRPio_Set(GD_HANDLE handle)
{
GD_GPIO_Write(handle, 1);
}
GERR GD_USB_PHY_Init(U8 GpioNumber)
{
U32 tmp_data;
U32 cmp_pass1;
GD_HANDLE Gpiohandle;
printf("UTMI2 Wait reset release.\n");
GD_TIMER_Delay(100);
printf("UTMI2 Begin initial sequence ...\n");
#ifdef GK710X
GD_GPIO_Open(GpioNumber, GD_GPIO_TYPE_OUTPUT_1, NULL, &Gpiohandle);
GD_GPIO_Write(Gpiohandle, 1);
#else
GD_GPIO_Open(GpioNumber, GD_GPIO_TYPE_OUTPUT_1, NULL, &Gpiohandle);
GD_GPIO_Write(Gpiohandle, 0);
#endif
//USB_AHB_R(0x70170050, value);
//USB_AHB_W(0x70170050, value | 0x02);
#ifndef GK710X
//PHY reset
GH_PLL_set_USB_GRST_en(1);
GD_TIMER_Delay(20);
GH_PLL_set_USB_GRST_en(0);
GD_TIMER_Delay(20);
GH_PLL_set_USB_GRST_en(1);
#endif
// init phy
//init UTMI
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x04<<2), 0x0000040f);
// bit<7>: Power down UTMI port-0 bandgap current
/*GH_USB_PHY_set_UTMI_REG_04_ck214_syn_en(1);
GH_USB_PHY_set_UTMI_REG_04_utmi_clk120_en(1);
GH_USB_PHY_set_UTMI_REG_04_clktest_en(0);
GH_USB_PHY_set_UTMI_REG_04_clk_extra_0_en(0);
GH_USB_PHY_set_UTMI_REG_04_clk_extra_1_en(0);
GH_USB_PHY_set_UTMI_REG_04_xtal12_en(0);
GH_USB_PHY_set_UTMI_REG_04_clk_ctl_override(1);
GH_USB_PHY_set_UTMI_REG_04_force_pll_on(0);
GH_USB_PHY_set_UTMI_REG_04_ck214_syn_en(0);
GH_USB_PHY_set_UTMI_REG_04_clk_274_en(0);
GH_USB_PHY_set_UTMI_REG_04_hs_rx_roboust_en(0);*/
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x10<<2), 0x00008051);
// PLL_TEST[15]: Bypass 480MHz clock divider
// PLL_TEST[7:4]: 5'b0101_0 for 1.0x
// PLL_TEST[0]: 1: synthesizer clock, 2'b11, 0: XIN_C
/*GH_USB_PHY_set_UTMI_REG_10_input_clock(1);
GH_USB_PHY_set_UTMI_REG_10_divider_selection(0x00);
GH_USB_PHY_set_UTMI_REG_10_divider_control(0xA);
GH_USB_PHY_set_UTMI_REG_10_clock_outputs_source(0x00);
GH_USB_PHY_set_UTMI_REG_10_clock_outputs_ratio(0x00);
GH_USB_PHY_set_UTMI_REG_10_digital_output(0x00);
GH_USB_PHY_set_UTMI_REG_10_transmitter(0x02);*/
//USB_AHB_W(REG_UTMI_BASE+(0x11<<2), 0x00002088);
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x11<<2), 0x00005080);
// PLL_TEST[30:28]: 3'b101 for IBIAS current select
// PLL_TEST[23] CLK480 to digital output source selection
// PLL_TEST[20] reset pll
/*GH_USB_PHY_set_UTMI_REG_11_ENDISC(0x00);
GH_USB_PHY_set_UTMI_REG_11_EXTDISC(0x00);
GH_USB_PHY_set_UTMI_REG_11_ENLOCKZ(0x00);
GH_USB_PHY_set_UTMI_REG_11_ENAUTO(0x00);
GH_USB_PHY_set_UTMI_REG_11_ENDCC(0x00);
GH_USB_PHY_set_UTMI_REG_11_TVCO(0x00);
GH_USB_PHY_set_UTMI_REG_11_output_source(0x01);
GH_USB_PHY_set_UTMI_REG_11_ENINV(0x00);
GH_USB_PHY_set_UTMI_REG_11_ENINVENTMUX(0x00);
GH_USB_PHY_set_UTMI_REG_11_input_clock(0x00);*/
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x11<<2), 0x00005090);
//GH_USB_PHY_set_UTMI_REG_11_ENDCC(0x01);
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x00<<2), 0x00006BC3);
// Turn on reference voltage and regulator
// reg_pdn: bit<15>, bit <2> ref_pdn
/*GH_USB_PHY_set_UTMI0_pdn_override(0x01);
GH_USB_PHY_set_UTMI0_term_override(0x01);
GH_USB_PHY_set_UTMI0_ref_pdn(0x00);
GH_USB_PHY_set_UTMI0_dp_puen(0x00);
GH_USB_PHY_set_UTMI0_dm_puen(0x00);
GH_USB_PHY_set_UTMI0_r_pumode(0x00);
GH_USB_PHY_set_UTMI0_r_dp_pden(0x01);
GH_USB_PHY_set_UTMI0_r_dm_pden(0x01);
GH_USB_PHY_set_UTMI0_hs_dm_pdn(0x01);
GH_USB_PHY_set_UTMI0_pll_pdn(0x01);
GH_USB_PHY_set_UTMI0_hs_ted_pdn(0x00);
GH_USB_PHY_set_UTMI0_hs_preamp_pdn(0x01);
GH_USB_PHY_set_UTMI0_f1_xcvf_pdn(0x00);
GH_USB_PHY_set_UTMI0_vbusdet_pdn(0x01);
GH_USB_PHY_set_UTMI0_iref_pdn(0x01);
GH_USB_PHY_set_UTMI0_pdn(0x00);*/
//USB_AHB_W(REG_UTMI_BASE+(0x0A<<2), 0x0000140B);
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x0A<<2), 0x00003403);
GD_TIMER_Delay(20);
// Delay(1ms) wait for regulator stable
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x00<<2), 0x000069C3);
// Turn on UPLL, reg_pdn: bit<9>
//GH_USB_PHY_set_UTMI0_pll_pdn(0x00);
GD_TIMER_Delay(10);
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x11<<2), 0x00005080);
// PLL_TEST[20] reset pll
GD_TIMER_Delay(20);
// Delay(2ms) wait for PLL stable
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x00<<2), 0x00000001);
// Turn all (including hs_current) use override mode
//GH_USB_PHY_set_UTMI0(0x00000001);
GD_TIMER_Delay(1000);
// Delay(1ms) wait for analog circuit stabl
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x1E<<2), 0x00000001);
GD_TIMER_Delay(1000);
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x1E<<2), 0x00000000);
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x03<<2), 0x00000023);
GD_TIMER_Delay(10);
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x03<<2), 0x00000020);
// host
// USB_AHB_W(REG_UTMI_BASE+(0x0A<<2), 0x00000003);
// device
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x0A<<2), 0x0000000b);
GD_TIMER_Delay(1000);
// end init
//reset USB controller
#ifdef GK710X
USB_AHB_R(0x70170088, tmp_data);
tmp_data |= 0x20000000;//0x6CC36011
USB_AHB_W(0x70170088, tmp_data);
GD_TIMER_Delay(10);
tmp_data &= ~0x20000000;//0x4CC36011
USB_AHB_W(0x70170088, 0x00000003);
USB_AHB_W(0x70170088, tmp_data);
GD_TIMER_Delay(10);
#else
USB_AHB_R(0xa0170088, tmp_data); // usb_ctrl_soft_reset,USB controller èí?t?′??: rw
tmp_data |= 0x20000000;//0x6CC36011 // USB ?????÷èí?t?′??￡?μíμ????′??
USB_AHB_W(0xa0170088, tmp_data);
GD_TIMER_Delay(10);
tmp_data &= ~0x20000000;//0x4CC36011
USB_AHB_W(0xa0170088, 0x00000003);
USB_AHB_W(0xa0170088, tmp_data);
GD_TIMER_Delay(10);
#endif
//dev_connect;
///////////////////////////////////////////////////////////////////////////////
//port-0 loop back check
/*USB_AHB_W(REG_UTMI_BASE+(0x03<<2), 0x00000043);
GH_USB_PHY_set_UTMI_REG_03_rx_swreset(0x01);
GH_USB_PHY_set_UTMI_REG_03_utmi_tx_sw_reset(0x01);
GH_USB_PHY_set_UTMI_REG_03_tx_force_hs_current_enable(0x00);
GH_USB_PHY_set_UTMI_REG_03_tx_fl_early_4(0x00);
GH_USB_PHY_set_UTMI_REG_03_tx_fl_latency_delay_1(0x00);
GH_USB_PHY_set_UTMI_REG_03_hs_stage_select(0x02);
GH_USB_PHY_set_UTMI_REG_03_otg_dual_role(0x00);
GH_USB_PHY_set_UTMI_REG_03_tx_reset_fsm(0x00);
GH_USB_PHY_set_UTMI_REG_03_cdr_mode_sel(0x00);
GH_USB_PHY_set_UTMI_REG_03_tx_reserved(0x00);
GH_USB_PHY_set_UTMI_REG_03_vbusdet_test(0x00);
USB_AHB_W(REG_UTMI_BASE+(0x03<<2), 0x00000040);
GH_USB_PHY_set_UTMI_REG_03_rx_swreset(0x00);
GH_USB_PHY_set_UTMI_REG_03_utmi_tx_sw_reset(0x00);
USB_AHB_W(REG_UTMI_BASE+(0x00<<2), 0x00000001);
GH_USB_PHY_set_UTMI0(0x00000001);
USB_AHB_W(REG_UTMI_BASE+(0x0A<<2), 0x00000600);
// bit <9> mac_mode_ovd, bit <8> termsel, bit <7:6> xcvrsel, bit <5:4> opmode
GH_USB_PHY_set_UTMI_REG_0A_vbusvalid(0x00);
GH_USB_PHY_set_UTMI_REG_0A_avalid(0x00);
GH_USB_PHY_set_UTMI_REG_0A_sessend(0x00);
GH_USB_PHY_set_UTMI_REG_0A_iddig(0x00);
GH_USB_PHY_set_UTMI_REG_0A_opmode(0x00);
GH_USB_PHY_set_UTMI_REG_0A_xcvrsel(0x01);//0:high 1:full 2: low
GH_USB_PHY_set_UTMI_REG_0A_termsel(0x01);//0:high 1:full
GH_USB_PHY_set_UTMI_REG_0A_macmode_ovd(0x01);
GH_USB_PHY_set_UTMI_REG_0A_suspendm(0x01);
GH_USB_PHY_set_UTMI_REG_0A_usb_bond_ovd(0x00);
GH_USB_PHY_set_UTMI_REG_0A_usb_bond_set(0x00);
GH_USB_PHY_set_UTMI_REG_0A_host_chirp_det(0x00);
GH_USB_PHY_set_UTMI_REG_0A_hs_tx_ien_mask(0x00);
GH_USB_PHY_set_UTMI_REG_0A_hs_tx_ien_mask_method(0x00);
USB_AHB_W(REG_UTMI_BASE+(0x08<<2), 0x00000078);
// bit <7> hs_se0, bit<5> force_tx_non_busy, bit<4> force_rx_non_busy,
// bit <3:0> debug bus select
GH_USB_PHY_set_UTMI_REG_08_test_bus_select(0x08);
GH_USB_PHY_set_UTMI_REG_08_force_rx_nonbusy(0x01);
GH_USB_PHY_set_UTMI_REG_08_force_tx_nonbusy(0x01);
GH_USB_PHY_set_UTMI_REG_08_utmi_int_clr(0x01);
GH_USB_PHY_set_UTMI_REG_08_se0_set(0x00);
GH_USB_PHY_set_UTMI_REG_08_tx_data(0x00);
GH_USB_PHY_set_UTMI_REG_08_tx_en(0x00);
GH_USB_PHY_set_UTMI_REG_08_tx_se0(0x00);
GH_USB_PHY_set_UTMI_REG_08_tx_override(0x00);
GH_USB_PHY_set_UTMI_REG_08_power_good_rst(0x00);
GH_USB_PHY_set_UTMI_REG_08_phy_mode_enable(0x00);
GH_USB_PHY_set_UTMI_REG_08_error_flag_clr(0x00);
GH_USB_PHY_set_UTMI_REG_08_hd_tx_override(0x00);*/
#if 0
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x1A<<2), 0x00000000); // set data pattern: 0000
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x19<<2), 0x000001fe); // bit <8> set tx_go, bit <10> fix data mode
// TV.riu_read(REG_UTMI_BASE1+'h18); //
// poll_1_clear(REG_UTMI_BASE1+'h18, 'h8000);
USB_AHB_R(REG_USB_PHY_UTMI_REG_00+(0x18<<2), tmp_data); // bit <8> set tx_go, bit <10> fix data mode
GD_TIMER_Delay(100); // Delay(1ms) wait for analog circuit stabl
if((tmp_data&0x0000C000)==0x00008000)
cmp_pass1 = 1;
else
cmp_pass1 = 0;
USB_AHB_W(REG_USB_PHY_UTMI_REG_00+(0x19<<2), 0x000000fe); // clear tx_go (remember keep bit <10> for port1 fix data mode)
if(cmp_pass1)
printf("\n==========OK, USB TEST PASS.==========\n");
else
printf("\n=========Error,USB TEST FIAL.==========\n");
//$finish();
#endif
return GD_OK;
}
