static int
wi_pcmcia_load_firm(struct wi_softc *sc, const void *primsym, int primlen,
const void *secsym, int seclen)
{
u_int8_t ebuf[256];
int i;
/* load primary code and run it */
wi_pcmcia_set_hcr(sc, WI_HCR_EEHOLD);
if (wi_pcmcia_write_firm(sc, primsym, primlen, NULL, 0))
return EIO;
wi_pcmcia_set_hcr(sc, WI_HCR_RUN);
for (i = 0; ; i++) {
if (i == 10)
return ETIMEDOUT;
tsleep(sc, PWAIT, "wiinit", 1);
if (CSR_READ_2(sc, WI_CNTL) == WI_CNTL_AUX_ENA_STAT)
break;
/* write the magic key value to unlock aux port */
CSR_WRITE_2(sc, WI_PARAM0, WI_AUX_KEY0);
CSR_WRITE_2(sc, WI_PARAM1, WI_AUX_KEY1);
CSR_WRITE_2(sc, WI_PARAM2, WI_AUX_KEY2);
CSR_WRITE_2(sc, WI_CNTL, WI_CNTL_AUX_ENA_CNTL);
}
/* issue read EEPROM command: XXX copied from wi_cmd() */
CSR_WRITE_2(sc, WI_PARAM0, 0);
CSR_WRITE_2(sc, WI_PARAM1, 0);
CSR_WRITE_2(sc, WI_PARAM2, 0);
CSR_WRITE_2(sc, WI_COMMAND, WI_CMD_READEE);
for (i = 0; i < WI_TIMEOUT; i++) {
if (CSR_READ_2(sc, WI_EVENT_STAT) & WI_EV_CMD)
break;
DELAY(1);
}
CSR_WRITE_2(sc, WI_EVENT_ACK, WI_EV_CMD);
CSR_WRITE_2(sc, WI_AUX_PAGE, WI_SBCF_PDIADDR / WI_AUX_PGSZ);
CSR_WRITE_2(sc, WI_AUX_OFFSET, WI_SBCF_PDIADDR % WI_AUX_PGSZ);
CSR_READ_MULTI_STREAM_2(sc, WI_AUX_DATA,
(u_int16_t *)ebuf, sizeof(ebuf) / 2);
if (GETLE16(ebuf) > sizeof(ebuf))
return EIO;
if (wi_pcmcia_write_firm(sc, secsym, seclen, ebuf + 4, GETLE16(ebuf)))
return EIO;
return 0;
}
0xB000000B,
&test_dev
);
print_result(ret);
printf("%-35s", "MLME_SCAN_request()... ");
ret = MLME_SCAN_request(
ACTIVE_SCAN,
0x07FFF800,
0x01,
&test_secspec,
&test_dev
);
print_result(ret);
printf("%-35s", "MLME_START_request_sync()... ");
ret = MLME_START_request_sync(
GETLE16(full_address.PANId),
TEST_CHANNEL,
0x0F,
0x0F,
0,
0,
0,
&test_secspec,
&test_secspec,
&test_dev
);
print_result(ret);
printf("%-35s", "MLME_POLL_request_sync()... ");
ret = MLME_POLL_request_sync(
full_address,
#if CASCODA_CA_VER == 8210
static int
wi_pcmcia_write_firm(struct wi_softc *sc, const void *buf, int buflen,
const void *ebuf, int ebuflen)
{
const u_int8_t *p, *ep, *q, *eq;
char *endp;
u_int32_t addr, id, eid;
int i, len, elen, nblk, pdrlen;
/*
* Parse the header of the firmware image.
*/
p = buf;
ep = p + buflen;
while (p < ep && *p++ != ' '); /* FILE: */
while (p < ep && *p++ != ' '); /* filename */
while (p < ep && *p++ != ' '); /* type of the firmware */
nblk = strtoul(p, &endp, 10);
p = (void *)endp;
pdrlen = strtoul(p + 1, &endp, 10);
p = (void *)endp;
while (p < ep && *p++ != 0x1a); /* skip rest of header */
/*
* Block records: address[4], length[2], data[length];
*/
for (i = 0; i < nblk; i++) {
addr = GETLE32(p); p += 4;
len = GETLE16(p); p += 2;
CSR_WRITE_2(sc, WI_AUX_PAGE, addr / WI_AUX_PGSZ);
CSR_WRITE_2(sc, WI_AUX_OFFSET, addr % WI_AUX_PGSZ);
CSR_WRITE_MULTI_STREAM_2(sc, WI_AUX_DATA,
(const u_int16_t *)p, len / 2);
p += len;
}
/*
* PDR: id[4], address[4], length[4];
*/
for (i = 0; i < pdrlen; ) {
id = GETLE32(p); p += 4; i += 4;
addr = GETLE32(p); p += 4; i += 4;
len = GETLE32(p); p += 4; i += 4;
/* replace PDR entry with the values from EEPROM, if any */
for (q = ebuf, eq = q + ebuflen; q < eq; q += elen * 2) {
elen = GETLE16(q); q += 2;
eid = GETLE16(q); q += 2;
elen--; /* elen includes eid */
if (eid == 0)
break;
if (eid != id)
continue;
CSR_WRITE_2(sc, WI_AUX_PAGE, addr / WI_AUX_PGSZ);
CSR_WRITE_2(sc, WI_AUX_OFFSET, addr % WI_AUX_PGSZ);
CSR_WRITE_MULTI_STREAM_2(sc, WI_AUX_DATA,
(const u_int16_t *)q, len / 2);
break;
}
}
return 0;
}
void CALLBACK GPUreadDataMem(uint32_t * pMem, int iSize) {
_TR
int i;
if (DataReadMode != DR_VRAMTRANSFER) return;
GPUIsBusy;
// adjust read ptr, if necessary
while (VRAMRead.ImagePtr >= psxVuw_eom)
VRAMRead.ImagePtr -= iGPUHeight * 1024;
while (VRAMRead.ImagePtr < psxVuw)
VRAMRead.ImagePtr += iGPUHeight * 1024;
for (i = 0; i < iSize; i++) {
// do 2 seperate 16bit reads for compatibility (wrap issues)
if ((VRAMRead.ColsRemaining > 0) && (VRAMRead.RowsRemaining > 0)) {
// lower 16 bit
lGPUdataRet = (uint32_t) GETLE16(VRAMRead.ImagePtr);
VRAMRead.ImagePtr++;
if (VRAMRead.ImagePtr >= psxVuw_eom) VRAMRead.ImagePtr -= iGPUHeight * 1024;
VRAMRead.RowsRemaining--;
if (VRAMRead.RowsRemaining <= 0) {
VRAMRead.RowsRemaining = VRAMRead.Width;
VRAMRead.ColsRemaining--;
VRAMRead.ImagePtr += 1024 - VRAMRead.Width;
if (VRAMRead.ImagePtr >= psxVuw_eom) VRAMRead.ImagePtr -= iGPUHeight * 1024;
}
// higher 16 bit (always, even if it's an odd width)
lGPUdataRet |= (uint32_t) GETLE16(VRAMRead.ImagePtr) << 16;
PUTLE32(pMem, lGPUdataRet);
pMem++;
if (VRAMRead.ColsRemaining <= 0) {
FinishedVRAMRead();
goto ENDREAD;
}
VRAMRead.ImagePtr++;
if (VRAMRead.ImagePtr >= psxVuw_eom) VRAMRead.ImagePtr -= iGPUHeight * 1024;
VRAMRead.RowsRemaining--;
if (VRAMRead.RowsRemaining <= 0) {
VRAMRead.RowsRemaining = VRAMRead.Width;
VRAMRead.ColsRemaining--;
VRAMRead.ImagePtr += 1024 - VRAMRead.Width;
if (VRAMRead.ImagePtr >= psxVuw_eom) VRAMRead.ImagePtr -= iGPUHeight * 1024;
}
if (VRAMRead.ColsRemaining <= 0) {
FinishedVRAMRead();
goto ENDREAD;
}
} else {
FinishedVRAMRead();
goto ENDREAD;
}
}
ENDREAD:
GPUIsIdle;
}
void CALLBACK GPUwriteDataMem(uint32_t * pMem, int iSize) {
_TR
unsigned char command;
uint32_t gdata = 0;
int i = 0;
GPUIsBusy;
GPUIsNotReadyForCommands;
STARTVRAM:
if (DataWriteMode == DR_VRAMTRANSFER) {
BOOL bFinished = FALSE;
// make sure we are in vram
while (VRAMWrite.ImagePtr >= psxVuw_eom)
VRAMWrite.ImagePtr -= iGPUHeight * 1024;
while (VRAMWrite.ImagePtr < psxVuw)
VRAMWrite.ImagePtr += iGPUHeight * 1024;
// now do the loop
while (VRAMWrite.ColsRemaining > 0) {
while (VRAMWrite.RowsRemaining > 0) {
if (i >= iSize) {
goto ENDVRAM;
}
i++;
gdata = GETLE32(pMem);
pMem++;
PUTLE16(VRAMWrite.ImagePtr, (unsigned short) gdata);
VRAMWrite.ImagePtr++;
if (VRAMWrite.ImagePtr >= psxVuw_eom) VRAMWrite.ImagePtr -= iGPUHeight * 1024;
VRAMWrite.RowsRemaining--;
if (VRAMWrite.RowsRemaining <= 0) {
VRAMWrite.ColsRemaining--;
if (VRAMWrite.ColsRemaining <= 0) // last pixel is odd width
{
gdata = (gdata & 0xFFFF) | (((uint32_t) GETLE16(VRAMWrite.ImagePtr)) << 16);
FinishedVRAMWrite();
bDoVSyncUpdate = TRUE;
goto ENDVRAM;
}
VRAMWrite.RowsRemaining = VRAMWrite.Width;
VRAMWrite.ImagePtr += 1024 - VRAMWrite.Width;
}
PUTLE16(VRAMWrite.ImagePtr, (unsigned short) (gdata >> 16));
VRAMWrite.ImagePtr++;
if (VRAMWrite.ImagePtr >= psxVuw_eom) VRAMWrite.ImagePtr -= iGPUHeight * 1024;
VRAMWrite.RowsRemaining--;
}
VRAMWrite.RowsRemaining = VRAMWrite.Width;
VRAMWrite.ColsRemaining--;
VRAMWrite.ImagePtr += 1024 - VRAMWrite.Width;
bFinished = TRUE;
}
FinishedVRAMWrite();
if (bFinished) bDoVSyncUpdate = TRUE;
}
