// Notice: there are two slave devices -- enc28j60 and cc2500
// enc28j60 -- spi1
// cc2500 -- spi2
void spi_init(void) {
// ----------------- SPI1 ---------------------- //
// enable spi1 and gpio clocks
RCC->APB2ENR |= (RCC_APB2ENR_AFIOEN | RCC_APB2ENR_IOPAEN);
RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
// lan-cs -- PA4
GPIO_CONF_OUTPUT_PORT(A, 4, PUSH_PULL, 50);
// spi1 pins: sck -- PA5 miso -- PA6 mosi -- PA7
GPIO_CONF_OUTPUT_PORT(A, 5, ALT_PUSH_PULL, 50);
GPIO_CONF_INPUT_PORT(A, 6, PU_PD);
GPIO_CONF_OUTPUT_PORT(A, 7, ALT_PUSH_PULL, 50);
// spi1 configuration
SPI1->CR1 = SPI_CR1_MSTR | SPI_CR1_BR_0 | SPI_CR1_SSM | SPI_CR1_SSI;
SPI1->CRCPR = (unsigned short)0x0007;
// ---------------------------------------------- //
// ----------------- SPI2 ----------------------- //
// enable spi2 and gpio clocks
RCC->APB2ENR |= (RCC_APB2ENR_IOPBEN);
RCC->APB1ENR |= RCC_APB1ENR_SPI2EN;
// rf-cs -- PA11
GPIO_CONF_OUTPUT_PORT(A, 11, PUSH_PULL, 50);
// spi2 pins: sck -- PB13 miso -- PB14 mosi -- PB15
GPIO_CONF_OUTPUT_PORT(B, 13, ALT_PUSH_PULL, 50);
GPIO_CONF_INPUT_PORT(B, 14, PU_PD);
GPIO_CONF_OUTPUT_PORT(B, 15, ALT_PUSH_PULL, 50);
// spi2 configuration
SPI2->CR1 = SPI_CR1_MSTR | SPI_CR1_BR_1 | SPI_CR1_SSM | SPI_CR1_SSI;
SPI2->CRCPR = (unsigned short)0x0007;
// ---------------------------------------------- //
// Enable SPI
SPI1->CR1 |= SPI_CR1_SPE;
SPI2->CR1 |= SPI_CR1_SPE;
}
static void
init_spi()
{
SPI1->CR1 &= ~SPI_CR1_SPE;
RCC->APB2ENR |= RCC_APB2ENR_IOPAEN;
GPIO_CONF_INPUT_PORT(A,0,FLOATING);
GPIO_CONF_INPUT_PORT(A,1,FLOATING);
GPIO_CONF_OUTPUT_PORT(A,4,PUSH_PULL,50);
GPIOA->BSRR = GPIO_BSRR_BS4;
GPIO_CONF_OUTPUT_PORT(A,5,ALT_PUSH_PULL,50);
GPIO_CONF_INPUT_PORT(A,6,FLOATING);
GPIO_CONF_OUTPUT_PORT(A,7,ALT_PUSH_PULL,50);
RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
SPI1->CR2 = SPI_CR2_SSOE;
SPI1->CR1 = (SPI_CR1_SPE
| (SPI_CR1_BR_2) /* fPCLK / 32 */
| SPI_CR1_MSTR
| SPI_CR1_CPOL | SPI_CR1_CPHA
| SPI_CR1_SSM | SPI_CR1_SSI);
}
void dbg_setup_uart_default() {
RCC->APB2ENR |= (RCC_APB2ENR_AFIOEN | RCC_APB2ENR_IOPAEN
| RCC_APB2ENR_IOPBEN | RCC_APB2ENR_USART1EN);
RCC->AHBENR |= RCC_AHBENR_DMA1EN;
AFIO_REMAP(AFIO_MAPR_USART1_REMAP, AFIO_MAPR_USART1_REMAP);
GPIO_CONF_OUTPUT_PORT(B, 6, ALT_PUSH_PULL, 50);
GPIO_CONF_INPUT_PORT(B, 7, FLOATING);
USART1->CR1 = USART_CR1_UE;
USART1->CR2 = 0;
USART1->CR3 = USART_CR3_DMAT;
USART1->CR1 |= USART_CR1_TE;
USART1->BRR = 0x1a1;
}
void hal_init(void)
{
int i;
uint32_t volatile dummy;
RCC->AHBENR |= RCC_AHBENR_GPIOAEN;
RCC->APB2ENR |= (RCC_APB2ENR_SPI1EN);
RCC->APB1ENR |= (RCC_APB1ENR_SPI2EN);
/* Configure I/O */
#if (RF230_BUS == 1)
/* SPI: MISO; MOSI and CLK */
gpio_conf_af(GPIOA, 5, GPIO_OUTPUT_TYPE_PPULL, GPIO_OSPEED_40MHZ, GPIO_RESISTORS_PULLDN);
gpio_conf_af(GPIOA, 6, GPIO_OUTPUT_TYPE_PPULL, GPIO_OSPEED_40MHZ, GPIO_RESISTORS_PULLDN);
gpio_conf_af(GPIOA, 7, GPIO_OUTPUT_TYPE_PPULL, GPIO_OSPEED_40MHZ, GPIO_RESISTORS_PULLDN);
gpio_map_af(GPIOA, 5, GPIO_AF_SPI1);
gpio_map_af(GPIOA, 6, GPIO_AF_SPI1);
gpio_map_af(GPIOA, 7, GPIO_AF_SPI1);
/* Manual CS */
gpio_conf_output(GPIOA, 4, GPIO_OUTPUT_TYPE_PPULL, GPIO_OSPEED_40MHZ);
gpio_set_resistors(GPIOA, 4, GPIO_RESISTORS_PULLUP);
/* Reset */
gpio_conf_output(GPIOA, 8, GPIO_OUTPUT_TYPE_PPULL, GPIO_OSPEED_40MHZ);
/* Sleep */
gpio_conf_output(GPIOA, 10, GPIO_OUTPUT_TYPE_PPULL, GPIO_OSPEED_40MHZ);
#if 0
/* printf("Initiating GPIO for radio\r\n"); */
/* CS */
GPIO_CONF_OUTPUT_PORT(A, 4, PUSH_PULL, 50);
/* CLOCK */
GPIO_CONF_OUTPUT_PORT(A, 5, ALT_PUSH_PULL, 50);
/* MISO */
GPIO_CONF_OUTPUT_PORT(A, 6, ALT_PUSH_PULL, 50);
/* MOSI */
GPIO_CONF_OUTPUT_PORT(A, 7, ALT_PUSH_PULL, 50);
/* Reset */
GPIO_CONF_OUTPUT_PORT(A, 8, PUSH_PULL, 50);
/* Sleep */
GPIO_CONF_OUTPUT_PORT(A, 10, PUSH_PULL, 50);
/* Set up interrupt pin from radio */
/* PA11 -> EXTI11, PA -> set EXTICR to 0 */
AFIO->EXTICR[2] &= 0x0FfF;
/* Enable clock to peripheral IOPA */
RCC->APB2ENR |= (RCC_APB2ENR_AFIOEN |
RCC_APB2ENR_IOPAEN);
/* Configure IRQ pin as input */
GPIO_CONF_INPUT_PORT(A, 11, FLOATING);
/* Unmask interrupt for interrupt line */
EXTI->IMR |= (1 << RADIO_IRQ_PIN);
/* Unmask event for interrupt line */
EXTI->EMR |= (1 << RADIO_IRQ_PIN);
/* Rising edge trigger */
EXTI->RTSR |= (1 << RADIO_IRQ_PIN);
/* Falling edge trigger */
/* EXTI->FTSR |= (1 << RADIO_IRQ_PIN); */
dummy = EXTI->PR;
NVIC->ISER[1] |= (1 << (EXTI15_10_IRQChannel & 0x1F));
#endif
#else
/* CS */
GPIO_CONF_OUTPUT_PORT(B, 12, PUSH_PULL, 50);
/* CLOCK */
GPIO_CONF_OUTPUT_PORT(B, 13, ALT_PUSH_PULL, 50);
/* MISO */
GPIO_CONF_OUTPUT_PORT(B, 14, ALT_PUSH_PULL, 50);
/* MOSI */
GPIO_CONF_OUTPUT_PORT(B, 15, ALT_PUSH_PULL, 50);
/* Reset */
GPIO_CONF_OUTPUT_PORT(B, 10, PUSH_PULL, 50);
/* Sleep */
GPIO_CONF_OUTPUT_PORT(B, 11, PUSH_PULL, 50);
/* Set up interrupt pin from radio */
/* PC11 -> EXTI11, PC -> set EXTICR bits to 2 */
AFIO->EXTICR[2] &= 0xFF0F;
AFIO->EXTICR[2] |= 0x0020;
/* Enable clock to peripheral IOPC */
RCC->APB2ENR |= (RCC_APB2ENR_AFIOEN |
RCC_APB2ENR_IOPCEN);
/* Configure IRQ pin as input */
GPIO_CONF_INPUT_PORT(C, 9, FLOATING);
/* Unmask interrupt for line 9 */
EXTI->IMR |= (1 << RADIO_IRQ_PIN);
/* Unmask event for line 9 */
EXTI->EMR |= (1 << RADIO_IRQ_PIN);
/* Rising edge trigger */
EXTI->RTSR |= (1 << RADIO_IRQ_PIN);
/* Falling edge trigger */
/* EXTI->FTSR |= (1 << RADIO_IRQ_PIN); */
dummy = EXTI->PR;
NVIC->ISER[0] |= (1 << (EXTI9_5_IRQChannel & 0x1F));
#endif
/* Assert reset */
hal_set_rst_low();
/* slptr */
hal_set_slptr_low();
/* Don't do like this...*/
for(i=0; i<100000; i++)
;
/* Init SPI */
uspi_init(RF230_SPI_BUS, 000);
/* No chip select */
spi_radio_cs(1);
/* De-assert reset */
hal_set_rst_high();
}