/**
* @brief Configure the CSI interval capture.
* @note This function is used to Configure interlaced acquisition and interlaced pixels.
* @param vermask: the interlaced pixels value.
* @param hor_mask: the interlaced acquisition.
* @retval None
*/
void HAL_CSI_Interval_Capture_Cfg(uint8_t ver_mask, uint16_t hor_mask)
{
HAL_CLR_BIT(CSI->CSI_SCALE_REG, CSI_VER_MASK);
HAL_CLR_BIT(CSI->CSI_SCALE_REG, CSI_HER_MASK);
HAL_SET_BIT(CSI->CSI_SCALE_REG, ver_mask << 24);
HAL_SET_BIT(CSI->CSI_SCALE_REG, hor_mask);
}
/**
* @brief Enables or disables the CSI capture data.
* @param mode: Select the capture mode.
* @arg CSI_STILL_MODE: capture one picture.
* @arg CSI_VIDEO_MODE:Continuous capture.
* @param ctrl: Controls the enable of CSI capture.
* @arg This parameter can be: CSI_ENABLE or CSI_DISABLE.
* @retval None
*/
void HAL_CSI_Capture_Enable(CSI_CAPTURE_MODE mode , CSI_CTRL ctrl)
{
HAL_CLR_BIT(CSI->CSI_CAP_REG, CSI_CAP_MODE);
if (CSI_ENABLE == ctrl) {
if (mode == CSI_STILL_MODE) {
HAL_SET_BIT(CSI->CSI_CAP_REG, HAL_BIT(0));
} else if (mode == CSI_VIDEO_MODE)
HAL_SET_BIT(CSI->CSI_CAP_REG, HAL_BIT(1));
}
}
/**
* @brief Enables or disables used double FIFO for cache the data.
* @note If you disable the double FIFO mode, the CSI_FIFO_A will be always
* used for cache data.
* @param ctrl: Controls the enable of double FIFO mode.
* @arg This parameter can be: CSI_ENABLE or CSI_DISABLE.
* @retval None.
*/
void HAL_CSI_Double_FIFO_Mode_Enable(CSI_CTRL ctrl)
{
HAL_CLR_BIT(CSI->CSI_BUF_CTL_REG, HAL_BIT(0));
if (CSI_ENABLE == ctrl)
HAL_SET_BIT(CSI->CSI_BUF_CTL_REG, HAL_BIT(0));
}
/**
* @brief Configure the CSI sync signal polarity.
* @param signal: Set the polarity for vsync, herf,p_Clk.
* @retval None
*/
void HAL_CSI_Sync_Signal_Polarity_Cfg(CSI_Sync_Signal *signal)
{
uint32_t csi_sync_pol;
csi_sync_pol = signal->vsync + (signal->herf << 1) + (signal->p_Clk << 2);
HAL_CLR_BIT(CSI->CSI_CFG_REG, CSI_CFG_SYNC_SIGNAL_POL);
HAL_SET_BIT(CSI->CSI_CFG_REG, csi_sync_pol);
}
/**
* @brief Enables or disables the CSI interface.
* @param ctrl: Controls the enable of CSI moudle.
* @arg This parameter can be: CSI_ENABLE or CSI_DISABLE.
* @retval None
*/
void HAL_CSI_Moudle_Enalbe(CSI_CTRL ctrl)
{
if (CSI_ENABLE == ctrl)
HAL_SET_BIT(CSI->CSI_EN_REG, CSI_EN);
else
HAL_CLR_BIT(CSI->CSI_EN_REG, CSI_EN);
}
/*
* @brief
*/
static void SPI_SetClkDiv(SPI_T *spi, uint16_t div)
{
uint8_t n = 0;
if (div < 1)
{
return;
}
if (div > 2 * (0xFF + 1))
{
HAL_CLR_BIT(spi->CCTR, SPI_CCTR_DRS_MASK);
do
{
div = (div == 1) ? 0 : ((div + 1) / 2);
n++;
}
while (div);
HAL_MODIFY_REG(spi->CCTR, SPI_CCTR_CDR1_MASK, (n & 0x0F) << SPI_CCTR_CDR1_SHIFT);
}
else
{
HAL_SET_BIT(spi->CCTR, SPI_CCTR_DRS_MASK);
n = ((div + 1) / 2) - 1;
HAL_MODIFY_REG(spi->CCTR, SPI_CCTR_CDR2_MASK, (n & 0xFF) << SPI_CCTR_CDR2_SHIFT);
}
}
/**
* @brief Configure the interrupt flag for CSI.
* @note Set the interrupt source for CSI.
* @param irq_signel: The interrupt flag of CSI.
* @param ctrl: Controls the enable of interrupt flag.
* @arg This parameter can be: CSI_ENABLE or CSI_DISABLE.
* @retval None.
*/
void HAL_CSI_Interrupt_Cfg(CSI_INTERRUPT_SIGNAL irq_signel, CSI_CTRL ctrl)
{
if (ctrl == CSI_ENABLE)
HAL_SET_BIT(CSI->CSI_INT_EN_REG, irq_signel);
else
HAL_CLR_BIT(CSI->CSI_INT_EN_REG, irq_signel);
}
/**
* @private
* @brief Enables or disables the CSI JPEG mode.
* @param ctrl: Controls the enable of CSI JPEG mode.
* @arg This parameter can be: CSI_ENABLE or CSI_DISABLE.
* @retval None
*/
void HAL_CIS_JPEG_Mode_Enable(CSI_CTRL ctrl)
{
if (CSI_ENABLE == ctrl)
HAL_SET_BIT(CSI->CSI_JPEG_MOD_SEL, HAL_BIT(0));
else
HAL_CLR_BIT(CSI->CSI_JPEG_MOD_SEL, HAL_BIT(0));
}
/**
* @brief Sets the size of the captured image.
* @param size: Set the start capture position and the number of pixels per row.
* @arg size->start: start capture position, unit byte..
* @arg size->hor_len: the number of bytes per row.
* @retval HAL_Status:
* The status of driver.
*/
HAL_Status HAL_CSI_Set_Picture_Size(CSI_Picture_Size *size)
{
if (size->hor_start > (HAL_BIT(14) - 1)) {
HAL_WRN("%s, %d csi Picture size error hor_start = %d\n",
__func__, __LINE__, size->hor_start);
return HAL_ERROR;
}
if (size->hor_len > (HAL_BIT(14) - 1)) {
HAL_WRN("%s, %d csi Picture size error hor_len = %d\n",
__func__, __LINE__, size->hor_len);
return HAL_ERROR;
}
HAL_CLR_BIT(CSI->CSI_HSIZE_REG, CSI_SIZE_REG);
HAL_SET_BIT(CSI->CSI_HSIZE_REG, size->hor_len << 16);
HAL_SET_BIT(CSI->CSI_HSIZE_REG, size->hor_start);
return HAL_OK;
}
/**
* @brief Set the state of the specified GPIO
* @param[in] port GPIO port
* @param[in] pin GPIO pin number
* @param[in] state GPIO pin state
* @return None
*/
void HAL_GPIO_WritePin(GPIO_Port port, GPIO_Pin pin, GPIO_PinState state)
{
GPIO_CTRL_T *gpiox;
unsigned long flags;
gpiox = GPIO_GetCtrlInstance(port);
flags = HAL_EnterCriticalSection();
if (state == GPIO_PIN_LOW)
HAL_CLR_BIT(gpiox->DATA, HAL_BIT(pin));
else
HAL_SET_BIT(gpiox->DATA, HAL_BIT(pin));
HAL_ExitCriticalSection(flags);
}
void HAL_PRCM_SetCPUAClk(PRCM_CPUClkSrc src, PRCM_SysClkFactor factor)
{
switch (src) {
case PRCM_CPU_CLK_SRC_HFCLK:
HAL_MODIFY_REG(PRCM->SYS_CLK1_CTRL, PRCM_CPU_CLK_SRC_MASK, PRCM_CPU_CLK_SRC_HFCLK);
break;
case PRCM_CPU_CLK_SRC_LFCLK:
HAL_MODIFY_REG(PRCM->SYS_CLK1_CTRL, PRCM_CPU_CLK_SRC_MASK, PRCM_CPU_CLK_SRC_LFCLK);
break;
case PRCM_CPU_CLK_SRC_SYSCLK:
default:
#if 1
HAL_MODIFY_REG(PRCM->SYS_CLK1_CTRL, PRCM_SYS_CLK_FACTOR_MASK, factor);
HAL_SET_BIT(PRCM->SYS_CLK1_CTRL, PRCM_SYS_CLK_EN_BIT);
HAL_MODIFY_REG(PRCM->SYS_CLK1_CTRL, PRCM_CPU_CLK_SRC_MASK, PRCM_CPU_CLK_SRC_SYSCLK);
#else
PRCM->SYS_CLK1_CTRL = PRCM_SYS_CLK_EN_BIT | factor | PRCM_CPU_CLK_SRC_SYSCLK;
#endif
break;
}
}
static __always_inline void I2C_SetInitStateBit(I2C_Private *priv)
{
HAL_SET_BIT(priv->ctrl, I2C_INIT_STATE_BIT);
}
static __always_inline void I2C_Set7BitAddrMode(I2C_Private *priv)
{
HAL_SET_BIT(priv->ctrl, I2C_7BIT_ADDR_BIT);
}
/*
* @brief
*/
__SPI_STATIC_INLINE__
void SPI_Reset(SPI_T *spi)
{
HAL_SET_BIT(spi->CTRL, SPI_CTRL_RST_MASK);
}
/*
* @brief
*/
__SPI_STATIC_INLINE__
void SPI_Enable(SPI_T *spi)
{
HAL_SET_BIT(spi->CTRL, SPI_CTRL_EN_MASK);
}
/*
* @brief
*/
__SPI_STATIC_INLINE__
void SPI_EnableDualMode(SPI_T *spi)
{
HAL_SET_BIT(spi->BCC, SPI_BCC_DRM_MASK);
}
static void GPIO_ClearPendingIRQ(GPIO_IRQ_T *gpiox, GPIO_Pin pin)
{
HAL_SET_BIT(gpiox->IRQ_STATUS, HAL_BIT(pin));
}
/*
* @brief
*/
__SPI_STATIC_INLINE__
bool SPI_ClearInt(SPI_T *spi, SPI_Int_Type type)
{
HAL_SET_BIT(spi->STA, type);
return HAL_GET_BIT(spi->STA, type);
}
/*
* @brief
*/
__SPI_STATIC_INLINE__
void SPI_ResetRxFifo(SPI_T *spi)
{
HAL_SET_BIT(spi->FCTL, SPI_FCTL_RF_RST_MASK);
while (HAL_GET_BIT(spi->FCTL, SPI_FCTL_RF_RST_MASK) != 0);
}
/*
* @brief
*/
__SPI_STATIC_INLINE__
void SPI_ManualChipSelect(SPI_T *spi, SPI_TCTRL_SS_Sel cs)
{
HAL_SET_BIT(spi->TCTRL, SPI_TCTRL_SS_OWNER_MASK);
HAL_MODIFY_REG(spi->TCTRL, SPI_TCTRL_SS_SEL_MASK, cs);
}
/*
* @brief
*/
__SPI_STATIC_INLINE__
void SPI_EnableInt(SPI_T *spi, SPI_Int_Type type)
{
HAL_SET_BIT(spi->IER, type);
}
static void GPIO_EnableIRQ(GPIO_IRQ_T *gpiox, GPIO_Pin pin)
{
HAL_SET_BIT(gpiox->IRQ_EN, HAL_BIT(pin));
}
static __inline void I2C_SetMemMode(I2C_Private *priv)
{
HAL_SET_BIT(priv->ctrl, I2C_MEM_MODE_BIT);
}
static __inline void I2C_SetReadMode(I2C_Private *priv)
{
HAL_SET_BIT(priv->ctrl, I2C_READ_MODE_BIT);
}
/**
* @brief Select the next FIFO for cache data.
* @param fifo_num:
* @arg CSI_FIFO_0_A: Select CSI_FIFO_0_A.
* @arg CSI_FIFO_0_B: Select CSI_FIFO_0_B.
* @retval None
*/
void HAL_CSI_Selection_Next_FIFO (CSI_FIFO fifo_num)
{
HAL_CLR_BIT(CSI->CSI_BUF_CTL_REG ,HAL_BIT(2));
HAL_SET_BIT(CSI->CSI_BUF_CTL_REG , fifo_num << 2);
}
/**
* @brief Clear the CSI interrupt flag.
* @param None.
* @retval None.
*/
__nonxip_text
void HAL_CSI_Interrupt_Clear()
{
HAL_SET_BIT(CSI->CSI_INT_STA_REG, CSI->CSI_INT_STA_REG);
}
static __inline void I2C_SetSCCBMode(I2C_Private *priv)
{
HAL_SET_BIT(priv->ctrl, I2C_SCCB_MODE_BIT);
}
/*
* @brief
*/
__SPI_STATIC_INLINE__
void SPI_StartTransmit(SPI_T *spi)
{
HAL_SET_BIT(spi->TCTRL, SPI_TCTRL_XCH_MASK);
}
__nonxip_text
static __always_inline void I2C_SetRestartBit(I2C_Private *priv)
{
HAL_SET_BIT(priv->ctrl, I2C_RESTART_BIT);
}
/*
* @brief
*/
__SPI_STATIC_INLINE__
void SPI_EnableRapidsMode(SPI_T *spi, bool delay_sample)
{
HAL_SET_BIT(spi->TCTRL, SPI_TCTRL_RPSM_MASK);
HAL_MODIFY_REG(spi->TCTRL, SPI_TCTRL_SDC_MASK, delay_sample << SPI_TCTRL_SDC_SHIFT);
}
