BOOL LPC24XX_SPI_Driver::nWrite8_nRead8( const SPI_CONFIGURATION& Configuration, UINT8* Write8, INT32 WriteCount, UINT8* Read8, INT32 ReadCount, INT32 ReadStartOffset ) { if(g_LPC24XX_SPI_Driver.m_Enabled[Configuration.SPI_mod]) { lcd_printf("\fSPI Xaction 1\r\n"); HARD_BREAKPOINT(); return FALSE; } if(Configuration.SPI_mod > LPC24XX_SPI::c_MAX_SPI) { lcd_printf("\fSPI wrong mod\r\n"); HARD_BREAKPOINT(); return FALSE; } if (!Xaction_Start( Configuration )) return FALSE; { SPI_XACTION_8 Transaction; Transaction.Read8 = Read8; Transaction.ReadCount = ReadCount; Transaction.ReadStartOffset = ReadStartOffset; Transaction.Write8 = Write8; Transaction.WriteCount = WriteCount; Transaction.SPI_mod = Configuration.SPI_mod; Transaction.BusyPin = Configuration.BusyPin; if(!Xaction_nWrite8_nRead8( Transaction )) return FALSE; } return Xaction_Stop( Configuration ); }
BOOL LPC24XX_SPI_Driver::Xaction_Stop( const SPI_CONFIGURATION& Configuration ) { if(g_LPC24XX_SPI_Driver.m_Enabled[Configuration.SPI_mod]) { if(Configuration.CS_Hold_uSecs) { HAL_Time_Sleep_MicroSeconds_InterruptEnabled( Configuration.CS_Hold_uSecs ); } // next, bring the CS to the proper inactive state if(Configuration.DeviceCS != LPC24XX_GPIO::c_Pin_None) { CPU_GPIO_SetPinState( Configuration.DeviceCS, !Configuration.CS_Active ); } g_LPC24XX_SPI_Driver.m_Enabled[Configuration.SPI_mod] = FALSE; } else { lcd_printf("\fSPI Collision 4\r\n"); HARD_BREAKPOINT(); return FALSE; } return TRUE; }
static void RuntimeFault( const char* szText ) { lcd_printf("\014ERROR:\r\n%s\r\n", szText ); debug_printf( "ERROR: %s\r\n", szText ); HARD_BREAKPOINT(); }
BOOL PXA271_SPI_Driver::nWrite8_nRead8( const SPI_CONFIGURATION& Configuration, UINT8* Write8, INT32 WriteCount, UINT8* Read8, INT32 ReadCount, INT32 ReadStartOffset ) { if(g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].m_Enabled) { lcd_printf("\fSPI Xaction 1\r\n"); HARD_BREAKPOINT(); return FALSE; } if(!Xaction_Start( Configuration )) return FALSE; { SPI_XACTION_8 Transaction; Transaction.Read8 = Read8; Transaction.ReadCount = ReadCount; Transaction.ReadStartOffset = ReadStartOffset; Transaction.Write8 = Write8; Transaction.WriteCount = WriteCount; Transaction.SPI_mod = Configuration.SPI_mod; Transaction.BusyPin.Pin = GPIO_PIN_NONE; if(!Xaction_nWrite8_nRead8( Transaction )) return FALSE; } return Xaction_Stop( Configuration ); }
BOOL PXA271_SPI_Driver::nWrite16_nRead16( const SPI_CONFIGURATION& Configuration, UINT16* Write16, INT32 WriteCount, UINT16* Read16, INT32 ReadCount, INT32 ReadStartOffset ) { if(g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].m_Enabled) { lcd_printf("\fSPI Xaction 1\r\n"); HARD_BREAKPOINT(); return FALSE; } if(!Xaction_Start( Configuration )) return FALSE; { SPI_XACTION_16 Transaction; Transaction.Read16 = Read16; Transaction.ReadCount = ReadCount; Transaction.ReadStartOffset = ReadStartOffset; Transaction.Write16 = Write16; Transaction.WriteCount = WriteCount; Transaction.SPI_mod = Configuration.SPI_mod; if(!Xaction_nWrite16_nRead16( Transaction )) return FALSE; } return Xaction_Stop( Configuration ); }
BOOL LPC22XX_SPI_Driver::Xaction_nWrite16_nRead16( SPI_XACTION_16& Transaction ) { lcd_printf("\fSPI Peripheral does not support 16 bit transfer\r\n"); hal_printf("\fSPI Peripheral does not support 16 bit transfer\r\n"); HARD_BREAKPOINT(); return FALSE; }
BOOL LPC22XX_SPI_Driver::nWrite16_nRead16( const SPI_CONFIGURATION& Configuration, UINT16* Write16, INT32 WriteCount, UINT16* Read16, INT32 ReadCount, INT32 ReadStartOffset ) { lcd_printf("\fSPI Peripheral does not support 16 bit transfer\r\n"); hal_printf("\fSPI Peripheral does not support 16 bit transfer\r\n"); HARD_BREAKPOINT(); return FALSE; }
BOOL AT91_SPI_Driver::nWrite16_nRead16(const SPI_CONFIGURATION &Configuration, UINT16 *Write16, INT32 WriteCount, UINT16 *Read16, INT32 ReadCount, INT32 ReadStartOffset) { NATIVE_PROFILE_HAL_PROCESSOR_SPI(); GLOBAL_LOCK(irq); SPI_DEBUG_PRINT(" spi write 16 \r\n"); if(g_AT91_SPI_Driver.m_Enabled[Configuration.SPI_mod]) { lcd_printf("\fSPI Xaction 1\r\n"); hal_printf("\fSPI Xaction 1\r\n"); HARD_BREAKPOINT(); return FALSE; } if(Configuration.SPI_mod > AT91_SPI::c_MAX_SPI) { lcd_printf("\fSPI wrong mod\r\n"); hal_printf("\fSPI wrong mod\r\n"); HARD_BREAKPOINT(); return FALSE; } if(!Xaction_Start(Configuration)) return FALSE; { SPI_XACTION_16 Transaction; Transaction.Read16 = Read16; Transaction.ReadCount = ReadCount; Transaction.ReadStartOffset = ReadStartOffset; Transaction.Write16 = Write16; Transaction.WriteCount = WriteCount; Transaction.SPI_mod = Configuration.SPI_mod; Transaction.BusyPin = Configuration.BusyPin; if(!Xaction_nWrite16_nRead16(Transaction)) return FALSE; } SPI_DEBUG_PRINT(" B4 xs 16 \r\n"); return Xaction_Stop(Configuration); }
BOOL MC9328MXL_SPI_Driver::nWrite8_nRead8( const SPI_CONFIGURATION& Configuration, UINT8* Write8, INT32 WriteCount, UINT8* Read8, INT32 ReadCount, INT32 ReadStartOffset ) { NATIVE_PROFILE_HAL_PROCESSOR_SPI(); SPI_DEBUG_PRINT(" spi write 8 \r\n"); if(g_MC9328MXL_SPI_Driver.m_Enabled[Configuration.SPI_mod]) { lcd_printf("\fSPI Xaction 1\r\n"); HARD_BREAKPOINT(); return FALSE; } if(Configuration.SPI_mod > MC9328MXL_SPI::c_MAX_SPI) { lcd_printf("\fSPI wrong mod\r\n"); HARD_BREAKPOINT(); return FALSE; } if(!Xaction_Start( Configuration )) return FALSE; { SPI_XACTION_8 Transaction; Transaction.Read8 = Read8; Transaction.ReadCount = ReadCount; Transaction.ReadStartOffset = ReadStartOffset; Transaction.Write8 = Write8; Transaction.WriteCount = WriteCount; Transaction.SPI_mod = Configuration.SPI_mod; Transaction.BusyPin = Configuration.BusyPin; if(!Xaction_nWrite8_nRead8( Transaction )) return FALSE; } return Xaction_Stop( Configuration ); }
BOOL LPC24XX_SPI_Driver::Xaction_Start( const SPI_CONFIGURATION& Configuration ) { if(!g_LPC24XX_SPI_Driver.m_Enabled[Configuration.SPI_mod]) { g_LPC24XX_SPI_Driver.m_Enabled[Configuration.SPI_mod] = TRUE; UINT32 index = Configuration.SPI_mod; LPC24XX_SPI & SPI = LPC24XX::SPI(index); // first build the mode register SPI.SPCR = LPC24XX_SPI::ConfigurationToMode( Configuration ); // Set SPI Clock SPI.SPCCR = LPC24XX_SPI::c_SPI_Clk_KHz / (Configuration.Clock_RateKHz); // first set CS active as soon as clock and data pins are in proper initial state if(Configuration.DeviceCS != LPC24XX_GPIO::c_Pin_None) { CPU_GPIO_EnableOutputPin( Configuration.DeviceCS, Configuration.CS_Active ); } if(Configuration.CS_Setup_uSecs) { HAL_Time_Sleep_MicroSeconds_InterruptEnabled( Configuration.CS_Setup_uSecs ); } } else { lcd_printf( "\fSPI Collision 3\r\n" ); HARD_BREAKPOINT(); return FALSE; } return TRUE; }
BOOL MC9328MXL_SPI_Driver::Xaction_Start( const SPI_CONFIGURATION& Configuration ) { NATIVE_PROFILE_HAL_PROCESSOR_SPI(); if(!g_MC9328MXL_SPI_Driver.m_Enabled[Configuration.SPI_mod]) { g_MC9328MXL_SPI_Driver.m_Enabled[Configuration.SPI_mod] = TRUE; UINT32 index = Configuration.SPI_mod; MC9328MXL_SPI & SPI = MC9328MXL::SPI(index); // make sure we didn't start one in the middle of an existing transaction if( SPI.CONTROLREG & SPI.CONTROLREG_SPIEN ) { lcd_printf("\fSPI Collision 1\r\n"); hal_printf("\fSPI Collision 1\r\n"); HARD_BREAKPOINT(); return FALSE; } // first build the mode register SPI.CONTROLREG = MC9328MXL_SPI::ConfigurationToMode( Configuration ); // LCD Controller needs to have Pulse mode enabled #if (HARDWARE_BOARD_TYPE >= HARDWARE_BOARD_i_MXS_DEMO_REV_V1_2) if(Configuration.DeviceCS == MC9328MXL_SPI::c_SPI1_SS) { SPI.PERIODREG = 2; SPI.CONTROLREG |= MC9328MXL_SPI::CONTROLREG_SSCTL_PULSE; // Pulse SS between bursts // set the SSPOL to active lo as it is force at the ConfigurationMOde to not trigger SS for other SPI operation SPI.CONTROLREG &= (~MC9328MXL_SPI::CONTROLREG_SSPOL_HIGH); // Pulse SS between bursts CPU_GPIO_DisablePin( MC9328MXL_SPI::c_SPI1_SS,RESISTOR_DISABLED, 0, GPIO_ALT_PRIMARY); } #endif SPI.CONTROLREG |= MC9328MXL_SPI::CONTROLREG_SPIEN; #if (SPI_LOOP_BACK) // for spi testing SPI.TESTREG |= SPI.TESTREG_LBC; #endif // everything should be clean and idle ASSERT( SPI.TransmitBufferEmpty()); ASSERT( SPI.ReceiveBufferEmpty()); ASSERT( SPI.ShiftBufferEmpty ()); // make sure not trigger the SS pin for the LCD when doing any SPI activity. // but we can have LCD SPI activity, if so, we want the SS be able to drive #if (HARDWARE_BOARD_TYPE >= HARDWARE_BOARD_i_MXS_DEMO_REV_V1_2) if(Configuration.DeviceCS != MC9328MXL_SPI::c_SPI1_SS) { CPU_GPIO_EnableInputPin( MC9328MXL_SPI::c_SPI1_SS, FALSE, NULL, GPIO_INT_NONE, RESISTOR_PULLUP ); } #endif #if defined(PLATFORM_ARM_MC9328MXS) // make sure that we don't trigger the SS pin for LCD CPU_GPIO_DisablePin( MC9328MXL_SPI::c_SPI1_SCLK, RESISTOR_DISABLED, 0, GPIO_ALT_PRIMARY); CPU_GPIO_DisablePin( MC9328MXL_SPI::c_SPI1_MOSI, RESISTOR_DISABLED, 0, GPIO_ALT_PRIMARY); #else // MC9328MXL if (index == MC9328MXL_SPI::c_SPI1) { // allow peripheral control of pins CPU_GPIO_DisablePin( MC9328MXL_SPI::c_SPI1_SCLK, RESISTOR_DISABLED, 0, GPIO_ALT_PRIMARY); CPU_GPIO_DisablePin( MC9328MXL_SPI::c_SPI1_MOSI, RESISTOR_DISABLED, 0, GPIO_ALT_PRIMARY); } else { // SPI2 need to set to Alternate function - AIN CPU_GPIO_DisablePin(MC9328MXL_SPI::c_SPI2_SCLK, RESISTOR_DISABLED, MC9328MXL_GPIO::DDIR__OUT, GPIO_ALT_MODE_1); CPU_GPIO_DisablePin(MC9328MXL_SPI::c_SPI2_MOSI, RESISTOR_DISABLED, MC9328MXL_GPIO::DDIR__OUT, GPIO_ALT_MODE_1); } #endif // first set CS active as soon as clock and data pins are in proper initial state if((Configuration.DeviceCS != MC9328MXL_GPIO::c_Pin_None) && (Configuration.DeviceCS != MC9328MXL_SPI::c_SPI1_SS)) { CPU_GPIO_EnableOutputPin( Configuration.DeviceCS, Configuration.CS_Active ); } #if defined(PLATFORM_ARM_MC9328MXS) CPU_GPIO_DisablePin( MC9328MXL_SPI::c_SPI1_MISO, RESISTOR_DISABLED, 0, GPIO_ALT_PRIMARY ); #else if (index == MC9328MXL_SPI::c_SPI1) { CPU_GPIO_DisablePin( MC9328MXL_SPI::c_SPI1_MISO, RESISTOR_DISABLED, 0, GPIO_ALT_PRIMARY ); } else { // set AOUT mode for MISO for SPI 2 CPU_GPIO_DisablePin(MC9328MXL_SPI::c_SPI2_MISO, RESISTOR_DISABLED,MC9328MXL_GPIO::DDIR__IN ,GPIO_ALT_MODE_4); MC9328MXL::SC().FMCR |= MC9328MXL_SC::FMCR__SPI2_RXD_SEL; } #endif if(Configuration.CS_Setup_uSecs) { HAL_Time_Sleep_MicroSeconds_InterruptEnabled( Configuration.CS_Setup_uSecs ); } } else { lcd_printf( "\fSPI Collision 3\r\n" ); HARD_BREAKPOINT(); return FALSE; } return TRUE; }
BOOL MC9328MXL_SPI_Driver::Xaction_Stop( const SPI_CONFIGURATION& Configuration ) { NATIVE_PROFILE_HAL_PROCESSOR_SPI(); if(g_MC9328MXL_SPI_Driver.m_Enabled[Configuration.SPI_mod]) { UINT32 index = Configuration.SPI_mod; MC9328MXL_SPI & SPI = MC9328MXL::SPI(index); // we should have cleared the last TBF on the last RBF true setting // we should never bring CS inactive with the shifter busy ASSERT( SPI.TransmitBufferEmpty()); ASSERT( SPI.ReceiveBufferEmpty ()); ASSERT( SPI.ShiftBufferEmpty ()); if(Configuration.CS_Hold_uSecs) { HAL_Time_Sleep_MicroSeconds_InterruptEnabled( Configuration.CS_Hold_uSecs ); } // avoid noise drawing excess power on a floating line by putting this in pulldown #if defined(PLATFORM_ARM_MC9328MXS) CPU_GPIO_EnableInputPin( MC9328MXL_SPI::c_SPI1_MISO, FALSE, NULL, GPIO_INT_NONE, RESISTOR_PULLUP ); #else if (index == MC9328MXL_SPI::c_SPI1) { CPU_GPIO_EnableInputPin( MC9328MXL_SPI::c_SPI1_MISO, FALSE, NULL, GPIO_INT_NONE, RESISTOR_PULLUP ); } else { CPU_GPIO_EnableInputPin( MC9328MXL_SPI::c_SPI2_MISO, FALSE, NULL, GPIO_INT_NONE, RESISTOR_PULLUP ); } #endif // next, bring the CS to the proper inactive state if((Configuration.DeviceCS != MC9328MXL_GPIO::c_Pin_None) && (Configuration.DeviceCS != MC9328MXL_SPI::c_SPI1_SS)) { CPU_GPIO_SetPinState( Configuration.DeviceCS, !Configuration.CS_Active ); } // make sure that we don't trigger the SS pin for LCD on the iMXS board, this may change if Freescale change their circuitry // can remove if not use on imxs platform // be safe, as LCD SPI access will use this function as well, set it back to Output #if (HARDWARE_BOARD_TYPE >= HARDWARE_BOARD_i_MXS_DEMO_REV_V1_2) CPU_GPIO_EnableOutputPin( MC9328MXL_SPI::c_SPI1_SS, TRUE ); #endif // put pins in output low state when not in use to avoid noise since clock stop and reset will cause these to become inputs #if defined(PLATFORM_ARM_MC9328MXS) CPU_GPIO_EnableOutputPin( MC9328MXL_SPI::c_SPI1_SCLK, FALSE ); CPU_GPIO_EnableOutputPin( MC9328MXL_SPI::c_SPI1_MOSI, FALSE ); #else if (index == MC9328MXL_SPI::c_SPI1) { CPU_GPIO_EnableOutputPin( MC9328MXL_SPI::c_SPI1_SCLK, FALSE ); CPU_GPIO_EnableOutputPin( MC9328MXL_SPI::c_SPI1_MOSI, FALSE ); } else { CPU_GPIO_EnableOutputPin( MC9328MXL_SPI::c_SPI2_SCLK, FALSE ); CPU_GPIO_EnableOutputPin( MC9328MXL_SPI::c_SPI2_MOSI, FALSE ); } #endif // off SPI module SPI.CONTROLREG &= ~SPI.CONTROLREG_SPIEN; g_MC9328MXL_SPI_Driver.m_Enabled[Configuration.SPI_mod] = FALSE; } else { lcd_printf("\fSPI Collision 4\r\n"); HARD_BREAKPOINT(); return FALSE; } return TRUE; }
void STUB_ISRVector(void* Param) { HARD_BREAKPOINT(); }
void SimpleHeap_Release( void* ptr ) { #if defined(SIMPLEHEAP_VERBOSE) UINT32 *p_heapmem_used = (UINT32 *) &g_heapmem_used; #endif // defined(SIMPLEHEAP_VERBOSE) #if defined(SIMPLEHEAP_VERBOSE) //printf("SimpleHeap_Release(0x%08x)\r\n", (UINT32) ptr); #endif if(ptr) { struct BlockHeader* next; struct BlockHeader* prev; struct BlockHeader* blk = (struct BlockHeader*)ptr; blk--; #if defined(SIMPLEHEAD_DEBUG) if(blk->signature != c_Busy) { if(blk->signature != c_Free) { hal_printf( " Memory(%08x): CORRUPTION: %08x %08x\r\n", (UINT32) ptr, blk->signature, blk->length ); } else { hal_printf( " Memory(%08x): RELEASE TWICE: %08x\r\n", (UINT32) ptr, blk->length ); } HARD_BREAKPOINT(); } #endif #if defined(SIMPLE_HEAP_GUARDWORD) if(blk->head_guard != c_Guard) { hal_printf( "SimpleHeap_Release: Memory block head corruption: %08x %08x\r\n", blk->head_guard, blk->length ); HARD_BREAKPOINT(); } if(*(UINT32*)((UINT32)&blk[0] + blk->length - sizeof( c_Guard )) != c_Guard) { hal_printf( "SimpleHeap_Release: Memory block tail corruption: %08x %08x\r\n", *(UINT32 *)((UINT32)&blk[0] + blk->length - sizeof( c_Guard )), blk->length ); HARD_BREAKPOINT(); } #endif //--// blk->signature = c_Free; #if defined(SIMPLEHEAP_VERBOSE) *p_heapmem_used -= blk->length; hal_printf("F:%4d:%08x T:%6d\r\n", blk->length, (UINT32) ptr, *p_heapmem_used); #endif // // First merge with the following block, if free. // next = blk->next; if(next && next->signature == c_Free) { struct BlockHeader* nextnext; blk->length += next->length; nextnext = next->next; blk->next = nextnext; if(nextnext) nextnext->prev = blk; } // // Then merge with the preceding block, if free. // prev = blk->prev; if(prev && prev->signature == c_Free) { prev->length += blk->length; next = blk->next; prev->next = next; if(next) next->prev = prev; } } else { // releasing a null pointer is OK //ASSERT(0); } }
BOOL PXA271_SPI_Driver::Xaction_Stop( const SPI_CONFIGURATION& Configuration ) { if(g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].m_Enabled) { PXA271_SPI& SPI = PXA271::SPI(Configuration.SPI_mod); // we should have cleared the last TBF on the last RBF true setting // we should never bring CS inactive with the shifter busy ASSERT(!SPI.TransmitFifoNotEmpty()); ASSERT( SPI.ReceiveFifoEmpty()); ASSERT( SPI.ShiftBufferEmpty()); if(Configuration.CS_Hold_uSecs) { HAL_Time_Sleep_MicroSeconds_InterruptEnabled( Configuration.CS_Hold_uSecs ); } // avoid noise drawing excess power on a floating line by putting this in pulldown if(Configuration.SPI_mod ==0) CPU_GPIO_DisablePin( g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].RXD_Pin, RESISTOR_DISABLED, PXA271_GPIO::GPDR__DIR_IN,GPIO_ALT_MODE_1); else if(Configuration.SPI_mod ==1) CPU_GPIO_DisablePin( g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].RXD_Pin, RESISTOR_DISABLED, PXA271_GPIO::GPDR__DIR_IN,GPIO_ALT_MODE_2); else CPU_GPIO_DisablePin( g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].RXD_Pin, RESISTOR_DISABLED, PXA271_GPIO::GPDR__DIR_IN,GPIO_ALT_MODE_3); // next, bring the CS to the proper inactive state if(Configuration.DeviceCS != PXA271_GPIO::c_Pin_None) { CPU_GPIO_EnableOutputPin(Configuration.DeviceCS, !Configuration.CS_Active); } // put pins in output low state when not in use to avoid noise since clock stop and reset will cause these to become inputs if(Configuration.SPI_mod ==0) { //allow peripheral control of pins; CPU_GPIO_DisablePin( g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].CLK_pin, RESISTOR_DISABLED, PXA271_GPIO::GPDR__DIR_OUT,GPIO_ALT_MODE_2); CPU_GPIO_DisablePin( g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].TXD_Pin, RESISTOR_DISABLED, PXA271_GPIO::GPDR__DIR_OUT,GPIO_ALT_MODE_2); } else if(Configuration.SPI_mod ==1) { //allow peripheral control of pins; CPU_GPIO_DisablePin( g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].CLK_pin, RESISTOR_DISABLED, PXA271_GPIO::GPDR__DIR_OUT,GPIO_ALT_MODE_2); CPU_GPIO_DisablePin( g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].TXD_Pin, RESISTOR_DISABLED, PXA271_GPIO::GPDR__DIR_OUT,GPIO_ALT_MODE_2); } else { //allow peripheral control of pins; CPU_GPIO_DisablePin( g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].CLK_pin, RESISTOR_DISABLED, PXA271_GPIO::GPDR__DIR_OUT,GPIO_ALT_MODE_3); CPU_GPIO_DisablePin( g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].TXD_Pin, RESISTOR_DISABLED, PXA271_GPIO::GPDR__DIR_OUT,GPIO_ALT_MODE_3); } // disable spi bus so no new operations start SPI.SSP_SSCR0 = 0; SPI.SSP_SSCR1 = 0; PXA271::CLKMNGR().CKEN &= ~g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].ClockIndex; g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].m_Enabled = FALSE; } else { lcd_printf("\fSPI Collision 4\r\n"); HARD_BREAKPOINT(); return FALSE; } return TRUE; }
BOOL PXA271_SPI_Driver::Xaction_Start( const SPI_CONFIGURATION& Configuration ) { if(!g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].m_Enabled) { g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].m_Enabled= TRUE; // enable the Periperal clock for this device PXA271::CLKMNGR().CKEN |= g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].ClockIndex; PXA271_SPI& SPI = PXA271::SPI(Configuration.SPI_mod); // make sure we didn't start one in the middle of an existing transaction if((0 != SPI.SSP_SSCR0)||(0 != SPI.SSP_SSCR1)) { lcd_printf("\fSPI Collision 1\r\n"); HARD_BREAKPOINT(); return FALSE; } SPI.SSP_SSCR0= PXA271_SPI::ConfigurationControlReg0( Configuration ); SPI.SSP_SSCR1= PXA271_SPI::ConfigurationControlReg1( Configuration ); #ifdef SPI_LOOP_BACK_PXA271 SPI.SSP_SSCR1|= SPI_LOOPBACK; #endif SPI.SSP_SSCR0|= SPI.SSP_SSCR0__SSE; //everything should be clean and idle ASSERT(!SPI.TransmitFifoNotEmpty()); ASSERT( SPI.ReceiveFifoEmpty()); ASSERT( SPI.ShiftBufferEmpty()); if(Configuration.SPI_mod ==0) { //allow peripheral control of pins; CPU_GPIO_DisablePin( g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].CLK_pin, RESISTOR_DISABLED, PXA271_GPIO::GPDR__DIR_OUT,GPIO_ALT_MODE_2); CPU_GPIO_DisablePin( g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].TXD_Pin, RESISTOR_DISABLED, PXA271_GPIO::GPDR__DIR_OUT,GPIO_ALT_MODE_2); } else if(Configuration.SPI_mod ==1) { //allow peripheral control of pins; CPU_GPIO_DisablePin( g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].CLK_pin, RESISTOR_DISABLED, PXA271_GPIO::GPDR__DIR_OUT,GPIO_ALT_MODE_2); CPU_GPIO_DisablePin( g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].TXD_Pin, RESISTOR_DISABLED, PXA271_GPIO::GPDR__DIR_OUT,GPIO_ALT_MODE_2); } else { //allow peripheral control of pins; CPU_GPIO_DisablePin( g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].CLK_pin, RESISTOR_DISABLED, PXA271_GPIO::GPDR__DIR_OUT,GPIO_ALT_MODE_3); CPU_GPIO_DisablePin( g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].TXD_Pin, RESISTOR_DISABLED, PXA271_GPIO::GPDR__DIR_OUT,GPIO_ALT_MODE_3); } // first set CS active as soon as clock and data pins are in proper initial state if(Configuration.DeviceCS != PXA271_GPIO::c_Pin_None) { CPU_GPIO_EnableOutputPin(Configuration.DeviceCS, Configuration.CS_Active); } if(Configuration.SPI_mod ==0) CPU_GPIO_DisablePin( g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].RXD_Pin, RESISTOR_DISABLED, PXA271_GPIO::GPDR__DIR_IN,GPIO_ALT_MODE_1); else if(Configuration.SPI_mod ==1) CPU_GPIO_DisablePin( g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].RXD_Pin, RESISTOR_DISABLED, PXA271_GPIO::GPDR__DIR_IN,GPIO_ALT_MODE_2); else CPU_GPIO_DisablePin( g_PXA271_SPI_Driver.s_All_SPI_port[Configuration.SPI_mod].RXD_Pin, RESISTOR_DISABLED, PXA271_GPIO::GPDR__DIR_IN,GPIO_ALT_MODE_3); if(Configuration.CS_Setup_uSecs) { HAL_Time_Sleep_MicroSeconds_InterruptEnabled( Configuration.CS_Setup_uSecs ); } } else { lcd_printf( "\fSPI Collision 3\r\n" ); HARD_BREAKPOINT(); return FALSE; } return TRUE; }
void LPC24XX_VIC_Driver::STUB_ISRVector( void* Param ) { lcd_printf( "\fSTUB_ISR %08x\r\n", (size_t)Param ); HARD_BREAKPOINT(); }
BOOL LPC24XX_SPI_Driver::Xaction_nWrite8_nRead8( SPI_XACTION_8& Transaction ) { UINT8 Data8; if(!g_LPC24XX_SPI_Driver.m_Enabled[Transaction.SPI_mod]) { lcd_printf("\fSPI Xaction OFF\r\n"); HARD_BREAKPOINT(); return FALSE; } LPC24XX_SPI& SPI = LPC24XX::SPI(Transaction.SPI_mod); // Enable 8 bit mode SPI.SPCR &= ~(LPC24XX_SPI::CONTROLREG_BitEnable); UINT8* Write8 = Transaction.Write8; INT32 WriteCount = Transaction.WriteCount; UINT8* Read8 = Transaction.Read8; INT32 ReadCount = Transaction.ReadCount; INT32 ReadStartOffset = Transaction.ReadStartOffset; INT32 ReadTotal = 0; ASSERT(WriteCount > 0); ASSERT(Write8); ASSERT(ReadCount == 0 || Read8); if(ReadCount) { ReadTotal = ReadCount + ReadStartOffset; // we need to read as many bytes as the buffer is long, plus the offset at which we start } INT32 loopCnt= ReadTotal; // take the max of Read+offset or WrCnt if (loopCnt < WriteCount) loopCnt = WriteCount; // we will use WriteCount to move in the Write8 array // so we do no want to go past the end when we will check for // WriteCount to be bigger than zero WriteCount -= 1; // Start transmission while(loopCnt--) { // Write Transmit Data SPI.SPDR = Write8[0]; // repeat last write word for all subsequent reads if(WriteCount) { WriteCount--; Write8++; } // wait while the Transmission is in progress // No error checking as there is no mechanism to report errors while((SPI.SPSR & LPC24XX_SPI::SPIF_Mask) == 0x0) { } // Read recieved data Data8 = SPI.SPDR; // only save data once we have reached ReadCount-1 portion of words ReadTotal--; if((ReadTotal>=0) && (ReadTotal < ReadCount)) { Read8[0] = Data8; Read8++; } } return TRUE; }
void MC9328MXL_AITC_Driver::STUB_ISRVector( void* Param ) { lcd_printf( "\fSTUB_ISR %08x\r\n", (size_t)Param ); HARD_BREAKPOINT(); }