void gpmi_soft_reset(void)
{
// Reset the GPMI_CTRL0 block.
// Prepare for soft-reset by making sure that SFTRST is not currently
// asserted. Also clear CLKGATE so we can wait for its assertion below.
HW_GPMI_CTRL0_CLR(BM_GPMI_CTRL0_SFTRST);
// Wait at least a microsecond for SFTRST to deassert.
hal_delay_us(DDI_NAND_HAL_GPMI_SOFT_RESET_LATENCY);
while (HW_GPMI_CTRL0.B.SFTRST);
// Also clear CLKGATE so we can wait for its assertion below.
HW_GPMI_CTRL0_CLR(BM_GPMI_CTRL0_CLKGATE);
// Now soft-reset the hardware.
HW_GPMI_CTRL0_SET(BM_GPMI_CTRL0_SFTRST);
// Poll until clock is in the gated state before subsequently
// clearing soft reset and clock gate.
while (!HW_GPMI_CTRL0.B.CLKGATE);
// bring GPMI_CTRL0 out of reset
HW_GPMI_CTRL0_CLR(BM_GPMI_CTRL0_SFTRST);
// Wait at least a microsecond for SFTRST to deassert. In actuality, we
// need to wait 3 GPMI clocks, but this is much easier to implement.
hal_delay_us(DDI_NAND_HAL_GPMI_SOFT_RESET_LATENCY);
while (HW_GPMI_CTRL0.B.SFTRST);
HW_GPMI_CTRL0_CLR(BM_GPMI_CTRL0_CLKGATE);
// Poll until clock is in the NON-gated state before returning.
while (HW_GPMI_CTRL0.B.CLKGATE);
}
void queue_release(struct lba_data *data)
{
HW_GPMI_CTRL0_SET(BM_GPMI_CTRL0_SFTRST);
clk_disable(data->clk);
}
