Esempio n. 1
0
int IR_xmit ()
{
    if (IrCtrl.len == 0) {
        IRLOG_PRINTLN("!E26");
        IR_state( IR_IDLE );
        return 0;
    }
#ifndef FACTORY_CHECKER
    // factory checker xmits after receiving
    if ( IrCtrl.state != IR_WRITING ) {
        return 0; // Abort when collision detected
    }
#endif

    irpacker_packend( &packer_state );

    IR_state( IR_XMITTING );
    if (IrCtrl.freq == 40) {
        IR_TX_40K();
    }
    else {
        IR_TX_38K();
    }
    IR_TX_ON();

    irpacker_unpack_start( &packer_state );

    IR_COMPARE_ENABLE( IR_get() );
    IrCtrl.tx_index ++;

    // unpacking takes time, so we want to run unpack while timer is running
    IrCtrl.next_interval = IR_get();

    return 1;
}
Esempio n. 2
0
// Transmission timing and Trailer detection
ISR_COMPARE()
{
    if (IrCtrl.state == IR_XMITTING) {
        if (IrCtrl.tx_index >= IrCtrl.len) {
            // tx successfully finished
            IR_TX_OFF();
            IR_state( IR_IDLE );
            return;
        }
        uint16_t interval = IrCtrl.next_interval;
        if (IR_TX_IS_ON()) {
            // toggle
            IR_TX_OFF();
        }
        else {
            if ( IrCtrl.next_interval != 0 ) {
                // toggle
                IR_TX_ON();
            }
            else {
                // 65535,0,XXXX sequence means:
                // continue TX_OFF for 65535 + XXXX interval and turn TX_ON
                interval = IR_get();
                IrCtrl.tx_index ++;
            }
        }

        IR_COMPARE_NEXT( interval );

        // run heavy packer.unpack after setting timer
        IrCtrl.next_interval = IR_get();
        IrCtrl.tx_index ++;
        return;
    }
    else if (IrCtrl.state == IR_RECVING) {
        IrCtrl.trailer_count --;
        if (IrCtrl.trailer_count == 0) {
            // Trailer detected
            IR_state( IR_RECVED );
        }
        else {
            // wait for next compare interrupt
        }
        return;
    }

    IR_state( IR_IDLE );
}
Esempio n. 3
0
ISR_COMPARE()
{
    uint8_t st = IrCtrl.state;

#if IR_USE_XMIT
    uint8_t i, d, f = IrCtrl.fmt;
    uint16_t w;

    if (st == IR_XMITING)
    {
        if (IR_TX_TEST())               /* End of mark? */
        {
            IR_TX_OFF();                /* Stop burst */
            i = IrCtrl.phase;
            if (i < IrCtrl.len)         /* Is there a bit to be sent? */
            {
                if (IR_USE_SONY && (f & SONY))
                {
                    w = T_SONY;
                }
                else
                {
                    i /= 8;
                    d = IrCtrl.buff[i];
                    if (IR_USE_AEHA && (f & AEHA))
                        w = (d & 1) ? T_AEHA * 3 : T_AEHA;
                    else
                        w = (d & 1) ? T_NEC * 3 : T_NEC;
                    IrCtrl.buff[i] = d >> 1;
                }
                IR_COMP_NEXT(w);
                return;
            }
        }
        else
        {
            IR_TX_ON();                 /* Start burst */
            i = ++IrCtrl.phase / 8;
            if (IR_USE_SONY && (f & SONY))
            {
                d = IrCtrl.buff[i];
                w = (d & 1) ? T_SONY * 2 : T_SONY;
                IrCtrl.buff[i] = d >> 1;
            }
            else
            {