void serial_init(void)
{
// Initialisation du fifo de réception
InitFifo ( &descrFifoRX, FIFO_RX_SIZE, fifoRX, 0 );
// Initialisation du fifo d'émission
InitFifo ( &descrFifoTX, FIFO_TX_SIZE, fifoTX, 0 );
// Utilisation des fonctions séparées (XC32)
// =========================================
UARTConfigure(UART2, UART_ENABLE_HIGH_SPEED | UART_ENABLE_PINS_TX_RX_ONLY );
// UARTSetFifoMode(UART2, UART_INTERRUPT_ON_TX_BUFFER_EMPTY | UART_INTERRUPT_ON_RX_HALF_FULL );
// Remarque HALF_FULL ne fonctionne pas
// Pour INT RX au 3/4
UARTSetFifoMode(UART2, UART_INTERRUPT_ON_TX_BUFFER_EMPTY | UART_INTERRUPT_ON_RX_3_QUARTER_FULL );
// Pour INT RX dés que min 1 char
// UARTSetFifoMode(UART2, UART_INTERRUPT_ON_TX_BUFFER_EMPTY | UART_INTERRUPT_ON_RX_NOT_EMPTY );
UARTSetLineControl(UART2, UART_DATA_SIZE_8_BITS | UART_PARITY_NONE | UART_STOP_BITS_1);
UINT32 ActualBaudRate = UARTSetDataRate(UART2, PB_FREQ, 9600);
UARTEnable(UART2, UART_ENABLE_FLAGS(UART_PERIPHERAL | UART_RX | UART_TX));
// Configuration Int UART2 avec les fonctions séparées
// ===================================================
// Configure UART RX Interrupt
INTEnable(INT_SOURCE_UART_RX(UART2), INT_ENABLED);
INTSetVectorPriority(INT_VECTOR_UART(UART2), INT_PRIORITY_LEVEL_5);
INTSetVectorSubPriority(INT_VECTOR_UART(UART2), INT_SUB_PRIORITY_LEVEL_0);
} // InitComm
int main(void)
{
uint8_t tmp;
InitFifo();
USART_Config();
LED_Init();
// I2C_Configuration();
Systick_Init();
mySPI_Init();
//spi();
//Delay(1000);
printf("init SPI test \n\r");
SPI_send(0x23, 0xc9); // resetting the accelerometer internal circuit
SPI_send(0x20, 0x67); // 100Hz data update rate, block data update disable, x/y/z enabled
SPI_send(0x24, 0x20); // Anti aliasing filter bandwidth 800Hz, 16G (very sensitive), no self-test, 4-wire interface
SPI_send(0x10, 0x00); // Output(X) = Measurement(X) - OFFSET(X) * 32;
SPI_send(0x11, 0x00); // Output(Y) = Measurement(Y) - OFFSET(Y) * 32;
SPI_send(0x12, 0x00); // Output(Z) = Measurement(Z) - OFFSET(Z) * 32;
while (1)
{
//tmp = SPI_read(0x28);
//printf("x : %x \n\r",tmp);
tmp = SPI_read(0x29);
printf("x : %x \n\r",tmp);
Delay(1000);
}
}
int TEST_TFTIME()
{
InitFifo();
while (1)
{
sleep(2);
}
}
/* Returns true/false if initialization was successful */
bool VMware::InitHardware(void)
{
/* This has to be done first, otherwise we can't
* access the SVGA registers */
if(!setupIoPorts())
{
dbprintf("VMware - Failed to setup the IO ports.\n");
return false;
}
/*** Grab the SVGA Id ***/
m_regId = vmwareGetSvgaId();
if(m_regId == (uint32)SVGA_ID_2)
{
dbprintf("VMware - SVGA Id is SVGA_ID_2\n");
}
else if(m_regId == (uint32)SVGA_ID_1)
{
dbprintf("VMware - SVGA Id is SVGA_ID_1\n");
return false;
}
else if(m_regId == (uint32)SVGA_ID_0)
{
dbprintf("VMware - SVGA Id is SVGA_ID_0\n");
return false;
}
else
{
dbprintf("VMware - SVGA Id is SVGA_ID_INVALID\n");
return false;
}
/*** Map the frame buffer and the command FIFO ***/
if(!CreateFb())
{
dbprintf("VMware -Failed to map the frame buffer.\n");
return false;
}
dbprintf("VMware - Successfully mapped the frame buffer.\n");
if(!CreateFifo())
{
dbprintf("VMware - Failed to map the command FIFO.\n");
return false;
}
dbprintf("VMware - Successfully mapped the command FIFO.\n");
/*** Initialize the FB ***/
if(!InitFb())
{
dbprintf("VMware - Failed to initialized the frame buffer.\n");
return false;
}
dbprintf("VMware - Successfully initialized the frame buffer.\n");
/*** Initialize the command FIFO ***/
if(!InitFifo())
{
dbprintf("VMware - Failed to initialized the command FIFO.\n");
return false;
}
dbprintf("VMware - Successfully initialized the command FIFO.\n");
/*** Initially disable hardware cursor ***/
vmwareWriteReg(SVGA_REG_CURSOR_X, 0);
vmwareWriteReg(SVGA_REG_CURSOR_Y, 0);
vmwareWriteReg(SVGA_REG_CURSOR_ON, SVGA_CURSOR_ON_HIDE);
return true;
}
