Esempio n. 1
0
/*---------------------------------------------------------------------
	Function:	IrqInstall
	Purpose:	Install a service handler for an IRQ interrupt
	Arguments:	int irqNum  - number of IRQ interrupt
				PFV isrProc - pointer to service routine
	Return:		PFV         - pointer to old service routine
---------------------------------------------------------------------*/
PFV IrqInstall(int irqNum, PFV isrProc)
{
	PFV oldIsr;

	if (irqNum < ISR_MIN || IRQ_MAX_NUM <= irqNum)
	{
		return (PFV) 0;
	}

	oldIsr = irqVector[irqNum];
	irqVector[irqNum] = isrProc;

	if (irqNum < IRQ_MAX_HW_NUM)
	{
		IrqEnable(irqNum);
	}
	else if (irqNum >= GPIO2_INT_ID)
	{
		IrqEnable(GPIO_INT_ID);
	}

	return oldIsr;
}
Esempio n. 2
0
File: pic.c Progetto: d33tah/whitix
void PicRemap(int pic1,int pic2)
{
	IrqAccept(15);
	
	/* Send ICW1 - 

	7 || 6 || 5 || 4 || 3 || 2 || 1 || 0
	------------------------------------
	0 || 0 || 0 || 1 || M || 0 || C || I
	
	  M - Indicates the way IRQ 0-7 are activated
	  C - Are the PIC's cascaded?
	  I - Is ICW 4 expected? */
	
	outb(0x20,0x11);
	outb(0xA0,0x11);
	
	/* ICW2 - Send the PIC indices in the IDT */
	outb(0x21,(BYTE)pic1);
	outb(0xA1,(BYTE)pic2);
	
	/* ICW3 - Sets which PIC is master and slave */
	outb(0x21,4);
	outb(0xA1,2);
	
	/* If lowest bit is set, the PIC is working in the x86 arch */
	outb(0x21,0x01);
	outb(0xA1,0x01);
	
	/* Disable all IRQs */
	outb(0x21,0xFF);
	outb(0xA1,0xFF);

	/* Enable slave PIC so interrupts can be redirected. */
	IrqEnable(2);
}
Esempio n. 3
0
/**********************************************************
                      Initialize
**********************************************************/

#define PLOCK 0x400

static void feed(void)
{
	PLLFEED = 0xAA;
	PLLFEED = 0x55;
}


#ifdef	LPC214x

void Initialize(void)  
{
	
 
	// 				Setting the Phased Lock Loop (PLL)
	//               ----------------------------------
	//
	// Olimex LPC-P2148 has a 12.0000 mhz crystal
	//
	// We'd like the LPC2148 to run at 60 mhz (has to be an even multiple of crystal)
	// 
	// According to the Philips LPC2148 manual:   M = cclk / Fosc	where:	M    = PLL multiplier (bits 0-4 of PLLCFG)
	//																		cclk = 60000000 hz
	//																		Fosc = 12000000 hz
	//
	// Solving:	M = 60000000 / 12000000 = 5           
	//
	//			Note: M - 1 must be entered into bits 0-4 of PLLCFG (assign 4 to these bits)
	//
	//
	// The Current Controlled Oscilator (CCO) must operate in the range 156 mhz to 320 mhz
	//
	// According to the Philips LPC2148 manual:	Fcco = cclk * 2 * P    where:	Fcco = CCO frequency 
	//																			cclk = 60000000 hz
	//																			P = PLL divisor (bits 5-6 of PLLCFG)
	//
	// Solving:	Fcco = 60000000 * 2 * P
	//			P = 2  (trial value)
	//			Fcco = 60000000 * 2 * 2
	//			Fcc0 = 240000000 hz    (good choice for P since it's within the 156 mhz to 320 mhz range)
	//
	// From Table 22 (page 34) of Philips LPC2148 manual    P = 2, PLLCFG bits 5-6 = 1  (assign 1 to these bits)
	//
	// Finally:      PLLCFG = 0  01  00100  =  0x24
	//
	// Final note: to load PLLCFG register, we must use the 0xAA followed 0x55 write sequence to the PLLFEED register
	//             this is done in the short function feed() below
	//
   
	// Setting Multiplier and Divider values
  	PLLCFG = 0x24;
  	feed();
  
	// Enabling the PLL */	
	PLLCON = 0x1;
	feed();
  
	// Wait for the PLL to lock to set frequency
	while(!(PLLSTAT & PLOCK)) ;
  
	// Connect the PLL as the clock source
	PLLCON = 0x3;
	feed();
  
	// Enabling MAM and setting number of clocks used for Flash memory fetch
	MAMTIM = 0x3;
	MAMCR = 0x2;
  
	// Setting peripheral Clock (pclk) to System Clock (cclk)
	VPBDIV = 0x1;
}

#else

#define PLL_N			2UL
#define PLL_M			72UL
#define CCLK_DIV		4
#define USBCLKDivValue	5UL  /* Fosc is divides by USBCLKDivValue+1 to make48MHz		*/
void Initialize(void)  
{
#if	0
    MEMMAP = 0x1;			/* remap to internal flash */
	PCONP |= 0x80000000;		/* Turn On USB PCLK */
#endif
 
	// 				Setting the Phased Lock Loop (PLL)
	//               ----------------------------------
	//
	// CQ-FRK-NXP LPC2388 has a 12.0000 mhz crystal
	//
	// We'd like the LPC2388 to run at 72 mhz (has to be an even multiple of crystal)
	// 
	// According to the Philips LPC2148 manual:   M = cclk / Fosc	where:	M    = PLL multiplier (bits 0-4 of PLLCFG)
	//																		cclk = 60000000 hz
	//																		Fosc = 12000000 hz
	//
	// Solving:	M = 60000000 / 12000000 = 5           
	//
	//			Note: M - 1 must be entered into bits 0-4 of PLLCFG (assign 4 to these bits)
	//
	//
	// The Current Controlled Oscilator (CCO) must operate in the range 156 mhz to 320 mhz
	//
	// According to the Philips LPC2148 manual:	Fcco = cclk * 2 * P    where:	Fcco = CCO frequency 
	//																			cclk = 60000000 hz
	//																			P = PLL divisor (bits 5-6 of PLLCFG)
	//
	// Solving:	Fcco = 60000000 * 2 * P
	//			P = 2  (trial value)
	//			Fcco = 60000000 * 2 * 2
	//			Fcc0 = 240000000 hz    (good choice for P since it's within the 156 mhz to 320 mhz range)
	//
	// From Table 22 (page 34) of Philips LPC2148 manual    P = 2, PLLCFG bits 5-6 = 1  (assign 1 to these bits)
	//
	// Finally:      PLLCFG = 0  01  00100  =  0x24
	//
	// Final note: to load PLLCFG register, we must use the 0xAA followed 0x55 write sequence to the PLLFEED register
	//             this is done in the short function feed() below
	//
   
	if ( PLLSTAT & (1 << 25) ) {
		PLLCON = 1;				/* Disconnect PLL output if PLL is in use */
		PLLFEED = 0xAA;
		PLLFEED = 0x55;
	}
	// Setting Multiplier and Divider values
	PLLCFG = ((PLL_N - 1) << 16) | (PLL_M - 1);	/* Re-configure PLL */
  	feed();
  
	// Enabling the PLL */	
	PLLCON = 0x1;
	feed();
  
	// Wait for the PLL to lock to set frequency
	while ((PLLSTAT & (1 << 26)) == 0);	/* Wait for PLL locked */
//	while(!(PLLSTAT & PLOCK)) ;
  
	CCLKCFG = CCLK_DIV-1;	/* Select CCLK frequency (divide ratio of hclk) */
    USBCLKCFG = USBCLKDivValue;		/* usbclk = 48 MHz */
	// Connect the PLL as the clock source
	PLLCON = 0x3;
	feed();
  
	MAMCR = 0;				/* Configure MAM for 72MHz operation */
	// Enabling MAM and setting number of clocks used for Flash memory fetch
	MAMTIM = 0x3;
	MAMCR = 0x2;
  
	PCLKSEL0 = 0x00000000;	/* Select peripheral clock */
	PCLKSEL1 = 0x00000000;

	ClearVector();

	SCS |= 1;				/* Enable FIO0 and FIO1 */

	FIO1PIN2 = 0x04;		/* -|-|-|-|-|LED|-|- */
	FIO1DIR2 = 0x04;
	PINMODE3 = 0x00000020;

#if	0
	/* Initialize Timer0 as 1kHz interval timer */
	RegisterVector(TIMER0_INT, Isr_TIMER0, PRI_LOWEST, CLASS_IRQ);
	T0CTCR = 0;
	T0MR0 = 18000 - 1;	/* 18M / 1k = 18000 */
	T0MCR = 0x3;		/* Clear TC and Interrupt on MR0 match */
	T0TCR = 1;

	IrqEnable();
#endif

//	uart0_init(INIT_BAUDRATE);
	// Setting peripheral Clock (pclk) to System Clock (cclk)
}