/*! * @brief LLWU ISR function */ void llwu_isr(void) { uint8_t pinEn; NVIC_ClearPendingIRQ(LLW_IRQn); /* Print LLWU acknowledgement only if UART is enabled */ for(pinEn = 0; pinEn < FSL_FEATURE_LLWU_HAS_EXTERNAL_PIN; pinEn++) { if (LLWU_HAL_GetExternalPinWakeupFlag(LLWU_BASE, (llwu_wakeup_pin_t)pinEn)) { LLWU_HAL_ClearExternalPinWakeupFlag(LLWU_BASE, (llwu_wakeup_pin_t)pinEn); /* write one to clear the flag */ } } /* * Note: This ISR does not write to the LLWU_F3 register because these * are peripheral module wakeups. The flags contained in the LLWU_F3 * register should be cleared through the associated module interrupt * and not through the LLWU_F3 per the Kinetis L Family Reference * Manual (LLWU Chapter) */ if (LLWU_HAL_GetInternalModuleWakeupFlag(LLWU_BASE, kLlwuWakeupModule0)) { CLOCK_SYS_EnableLptimerClock(0); LPTMR_HAL_ClearIntFlag(LPTMR0_BASE); /* write 1 to TCF to clear the LPT timer compare flag */ LPTMR_HAL_IsEnabled(LPTMR0_BASE); LPTMR_HAL_SetIntCmd(LPTMR0_BASE, 1); LPTMR_HAL_IsIntPending(LPTMR0_BASE); } if(LLWU_HAL_GetFilterDetectFlag(LLWU_BASE, 0)){ LLWU_HAL_ClearFilterDetectFlag(LLWU_BASE, 0); } if(LLWU_HAL_GetFilterDetectFlag(LLWU_BASE, 1)){ LLWU_HAL_ClearFilterDetectFlag(LLWU_BASE, 1); } }
void lp_ticker_sleep_until(uint32_t now, uint32_t time) { lp_ticker_set_interrupt(now, time); sleep_t sleep_obj; mbed_enter_sleep(&sleep_obj); // if LPTMR is running and we scheduled it, we know that RTC was fired while // we were sleeping if (LPTMR_HAL_IsEnabled(LPTMR0_BASE) && lp_ticker_lptmr_scheduled_flag) { __WFI(); } mbed_exit_sleep(&sleep_obj); }
/*! * @brief ISR Routine for Low Power Timer */ void demo_lptmr_isr(void) { volatile uint32_t lptmrCsrTemp; CLOCK_SYS_EnableLptimerClock(0); LPTMR_HAL_ClearIntFlag(LPTMR0_BASE); /* write 1 to TCF to clear the LPT timer compare flag */ LPTMR_HAL_Enable(LPTMR0_BASE); /* enable timer */ LPTMR_HAL_SetIntCmd(LPTMR0_BASE, true); /* enable interrupts */ LPTMR_HAL_ClearIntFlag(LPTMR0_BASE); /* clear the flag */ /*wait for write to complete to before returning */ while(!(LPTMR_HAL_IsEnabled(LPTMR0_BASE) && LPTMR_HAL_GetIntCmd(LPTMR0_BASE))); }