/* * Description: * Initialize MAC * * Parameters: * In: * dwIoBase - Base Address for MAC * Out: * none * * Return Value: none * */ void MACvInitialize(void __iomem *dwIoBase) { // clear sticky bits MACvClearStckDS(dwIoBase); // disable force PME-enable VNSvOutPortB(dwIoBase + MAC_REG_PMC1, PME_OVR); // only 3253 A // do reset MACbSoftwareReset(dwIoBase); // reset TSF counter VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST); // enable TSF counter VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); }
/* * Description: * Initialize MAC * * Parameters: * In: * dwIoBase - Base Address for MAC * Out: * none * * Return Value: none * */ void MACvInitialize(void __iomem *dwIoBase) { /* clear sticky bits */ MACvClearStckDS(dwIoBase); /* disable force PME-enable */ VNSvOutPortB(dwIoBase + MAC_REG_PMC1, PME_OVR); /* only 3253 A */ /* do reset */ MACbSoftwareReset(dwIoBase); /* reset TSF counter */ VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST); /* enable TSF counter */ VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); }
/* * Description: * Initialize MAC * * Parameters: * In: * io_base - Base Address for MAC * Out: * none * * Return Value: none * */ void MACvInitialize(struct vnt_private *priv) { void __iomem *io_base = priv->PortOffset; /* clear sticky bits */ MACvClearStckDS(io_base); /* disable force PME-enable */ iowrite8(PME_OVR, io_base + MAC_REG_PMC1); /* only 3253 A */ /* do reset */ MACbSoftwareReset(priv); /* reset TSF counter */ iowrite8(TFTCTL_TSFCNTRST, io_base + MAC_REG_TFTCTL); /* enable TSF counter */ iowrite8(TFTCTL_TSFCNTREN, io_base + MAC_REG_TFTCTL); }
static void s_vInit( PSAdapterInfo pAdapter, UINT uTotalNum, UINT uIdx ) { int ii; unsigned char check; pAdapter->cbTotalAdapterNum = uTotalNum; pAdapter->uAdapterIndex = uIdx; /* Save Memory Mapped IO base address */ switch (uIdx) { case 0: pAdapter->dwIoBase = BA_MAC0; break; case 1: pAdapter->dwIoBase = BA_MAC1; break; default: break; } MacDump(MACDBG_INFO, ("Memory mapped IO base address:%08X\n", pAdapter->dwIoBase)); /* check vee oe pee */ VNSvInPortB(pAdapter->dwIoBase+0x77, &check); if (check & 0x40){ /* Issue AUTOLD in EECSR to reload eeprom to ensure right data from eeprom */ MACvRegBitsOn(pAdapter->dwIoBase, MAC_REG_EECSR, EECSR_AUTOLD); /* set VEELD */ VNSvOutPortB(pAdapter->dwIoBase+PCI_Configuration_Space_Offset+VMSTS, 0x1); /* wait until VEELD is set */ ii = 0; while (1) { VNSvInPortB(pAdapter->dwIoBase+PCI_Configuration_Space_Offset+VMSTS, &check); if (check&0x2 || ii == MaxTimeOut) break; ii++; } /* clear VEELD */ VNSvOutPortB(pAdapter->dwIoBase+PCI_Configuration_Space_Offset+VMSTS, 0x0); } else { /* Issue AUTOLD in EECSR to reload eeprom to ensure right data from eeprom */ MACvRegBitsOn(pAdapter->dwIoBase, MAC_REG_EECSR, EECSR_AUTOLD); /* Wait until EEPROM loading complete */ while (TRUE) { BYTE byData; VNSvInPortB(pAdapter->dwIoBase + MAC_REG_EECSR, &byData); if (BITbIsBitOff(byData, EECSR_AUTOLD)) break; } } /* Get Device ID from PCI configuration space */ VPCIvReadW(pAdapter->dwIoBase, PCI_REG_DEVICE_ID, &pAdapter->wDevId); MacDump(MACDBG_INFO, ("Device ID:%04X\n", pAdapter->wDevId)); if (pAdapter->wDevId != W_DEVICE_ID_3106A && pAdapter->wDevId != W_DEVICE_ID_3053A) return; /* Get Revision ID from PCI configuration */ VPCIvReadB(pAdapter->dwIoBase, PCI_REG_REV_ID, &pAdapter->byRevId); MacDump(MACDBG_INFO, ("Revision ID:%02X\n", pAdapter->byRevId)); /* Clear sticky bits */ if (g_sOptions.ulInitCmds & INIT_CMD_CLEAR_STICKHW) MACvClearStckDS(pAdapter->dwIoBase); if (g_sOptions.byRevId != 0) pAdapter->byRevId = g_sOptions.byRevId; /* Set RD,TD number for this adapter now */ /* For 3065, 3106J, 3206 */ pAdapter->cbRD = (g_sOptions.iRDescNum) ? g_sOptions.iRDescNum : CB_INIT_RD_NUM; pAdapter->cbTD = (g_sOptions.iTDescNum) ? g_sOptions.iTDescNum : CB_INIT_TD_NUM; /* Save IRQ number */ switch (uIdx) { case 0: pAdapter->byIrqLevel = IRQ_ETH0; /* pAdapter->pvAdapterIsr = ISRvIsrForMAC0; */ break; case 1: pAdapter->byIrqLevel = IRQ_ETH1; /* pAdapter->pvAdapterIsr = ISRvIsrForMAC1; */ break; default: break; } g_sOptions.uiBuffsize = (g_sOptions.uiBuffsize) ? g_sOptions.uiBuffsize : CB_MAX_BUF_SIZE; /* Get the offset of PM Capability and save it from pci configuration space */ VPCIvReadB(pAdapter->dwIoBase, PCI_REG_CAP, &pAdapter->byPMRegOffset); /* Get PHY address */ pAdapter->byPhyId = MACbyGetPhyId(pAdapter->dwIoBase); MacDump(MACDBG_INFO, ("PHY Address:%02X\n", pAdapter->byPhyId)); /* Get Ethernet address */ for (ii = 0; ii < U_ETHER_ADDR_LEN; ii++) VNSvInPortB(pAdapter->dwIoBase + MAC_REG_PAR, pAdapter->abyEtherAddr + ii); /* Allocate RD/TD poiter array & DescBuf array data structure */ if (!g_bInit) { if (!ADPbDynaAllocBuf(pAdapter)) { printf("ADPbDynaAllocBuf() can't allocate buffer.\n"); return; } } pAdapter->dwCacheLineSize = sizeof(DWORD) * 4; /* Set default value of connection type to MEDIA_AUTO */ pAdapter->uConnectionType = MEDIA_AUTO; /* Init default descriptor number per packet in monitor mode */ pAdapter->uTxDescNumPerPacket = 1; /* Background timer send as default */ pAdapter->bTxContFunTest = TRUE; }
VOID GMACvInitialize(PSAdapterInfo pAdapter, DWORD dwIoBase, BYTE byRevId) { BYTE byTemp; BYTE check; /* clear sticky bits */ MACvClearStckDS(dwIoBase); /* disable force PME-enable */ VNSvOutPortB(dwIoBase + MAC_REG_WOLCFG_CLR, WOLCFG_PMEOVR); /* disable power-event config bit */ MACvPwrEvntDisable(dwIoBase); /* clear power status */ VNSvOutPortW(dwIoBase + MAC_REG_WOLSR0_CLR, 0xFFFF); /* do reset */ GMACbSoftwareReset(dwIoBase, byRevId); /* for AUTOLD be effect, safe delay time */ PCAvDelayByIO(CB_DELAY_SOFT_RESET); VNSvInPortB(dwIoBase + MAC_REG_JMPSR1, &check); /* VNSvInPortB(pAdapter->dwIoBase+Gmac_Jumper_Strapping3, &check) */ /* if (!(check & JMPSR1_J_VEESEL)) GMACLoadVEE(dwIoBase); else { */ if (check & JMPSR1_J_VEESEL) { /* issue RELOAD in EECSR to reload eeprom */ MACvRegBitsOn(dwIoBase, MAC_REG_EECSR, EECSR_RELOAD); /* wait until EEPROM loading complete */ while (TRUE) { if (GMACbIsRegBitsOff(dwIoBase, MAC_REG_EECSR, EECSR_RELOAD)) break; } } /* EEPROM reloaded will cause bit 0 in MAC_REG_CFGA turned on. */ /* it makes MAC receive magic packet automatically. So, driver turn it off. */ MACvRegBitsOff(dwIoBase, MAC_REG_CFGA, CFGA_PACPI); /* set rx-FIFO/DMA threshold */ /* set rx threshold, 128 bytes */ /*GMACvSetRxThreshold(dwIoBase, 3);*/ /* set DMA length, 16 DWORDs = 64 bytes */ /*GMACvSetDmaLength(dwIoBase, 1);*/ /* suspend-well accept broadcast, multicast */ VNSvOutPortB(dwIoBase + MAC_REG_WOLCFG_SET, WOLCFG_SAM | WOLCFG_SAB); /* back off algorithm use original IEEE standard */ MACvRegBitsOff(dwIoBase, MAC_REG_CFGB, CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT); /* set packet filter */ /* receive directed and broadcast address */ GMACvSetPacketFilter(dwIoBase, PKT_TYPE_DIRECTED | PKT_TYPE_BROADCAST); /* Eric */ #if defined(__USE_GMASK1__) VNSvOutPortD(dwIoBase + MAC_REG_IMR, IMR_MASK_VALUE); #else /* Turn on GenIntMask1 */ VNSvOutPortB(dwIoBase + MAC_REG_CR3_SET, CR3_GINTMSK1); #endif #if 0 VNSvInPortB(dwIoBase, &byTemp); printf("address0 = %x\n ", byTemp); VNSvInPortB(dwIoBase + 1, &byTemp); printf("address1 = %x\n ", byTemp); VNSvInPortB(dwIoBase + 2, &byTemp); printf("address2 = %x\n ", byTemp); VNSvInPortB(dwIoBase + 3, &byTemp); printf("address3 = %x\n ", byTemp); VNSvInPortB(dwIoBase + 4, &byTemp); printf("address4 = %x\n ", byTemp); VNSvInPortB(dwIoBase + 5, &byTemp); printf("address6 = %x\n ", byTemp); #endif /* Adaptive Interrupt: Init is disabled */ /* Select page to interrupt hold timer */ VNSvInPortB(dwIoBase + MAC_REG_CAMCR, &byTemp); byTemp &= ~(CAMCR_PS0 | CAMCR_PS1); VNSvOutPortB(dwIoBase + MAC_REG_CAMCR, byTemp); /* Set Interrupt hold timer = 0 */ VNSvOutPortB(dwIoBase + MAC_REG_ISR_HOTMR, 0x00); /* Select Page to Tx-sup threshold */ VNSvInPortB(dwIoBase + MAC_REG_CAMCR, &byTemp); byTemp = (BYTE)((byTemp | CAMCR_PS0) & ~CAMCR_PS1); VNSvOutPortB(dwIoBase + MAC_REG_CAMCR, byTemp); /* Set Tx interrupt suppression threshold = 0 */ VNSvOutPortB(dwIoBase + MAC_REG_ISR_TSUPTHR, 0x00); /* Select Page to Rx-sup threshold */ VNSvInPortB(dwIoBase + MAC_REG_CAMCR, &byTemp); byTemp = (BYTE)((byTemp | CAMCR_PS1) & ~CAMCR_PS0); VNSvOutPortB(dwIoBase + MAC_REG_CAMCR, byTemp); /* Set Rx interrupt suppression threshold = 0 */ VNSvOutPortB(dwIoBase + MAC_REG_ISR_RSUPTHR, 0x00); /* Select page to interrupt hold timer */ VNSvInPortB(dwIoBase + MAC_REG_CAMCR, &byTemp); byTemp &= ~(CAMCR_PS0 | CAMCR_PS1); VNSvOutPortB(dwIoBase + MAC_REG_CAMCR, byTemp); /* enable MIICR_MAUTO */ GMACvEnableMiiAutoPoll(dwIoBase); }