fbp_setup_display(displays, ARRAY_SIZE(displays)); #endif return 0; } int checkboard(void) { puts("Board: Boundary H\n"); return 0; } #ifdef CONFIG_CMD_BMODE static const struct boot_mode board_boot_modes[] = { /* 4 bit bus width */ {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, {NULL, 0}, }; #endif int misc_init_r(void) { #ifdef CONFIG_CMD_BMODE add_board_boot_modes(board_boot_modes); #endif return 0; } int board_late_init(void) {
pmic_reg_write(p, PFUZE100_VGEN5VOL, reg); return 0; } #ifdef CONFIG_MXC_SPI int board_spi_cs_gpio(unsigned bus, unsigned cs) { return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(4, 9)) : -1; } #endif #ifdef CONFIG_CMD_BMODE static const struct boot_mode board_boot_modes[] = { /* 4 bit bus width */ {"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)}, {"sd3", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, /* 8 bit bus width */ {"emmc", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, {NULL, 0}, }; #endif int board_late_init(void) { #ifdef CONFIG_CMD_BMODE add_board_boot_modes(board_boot_modes); #endif return 0; }
#ifdef CONFIG_NAND_MXS setup_gpmi_nand(); #endif #ifdef CONFIG_VIDEO_MXS setup_lcd(); #endif return 0; } #ifdef CONFIG_CMD_BMODE static const struct boot_mode board_boot_modes[] = { /* 4 bit bus width */ {"nand", MAKE_CFGVAL(0x40, 0x34, 0x00, 0x00)}, {"sd1", MAKE_CFGVAL(0x10, 0x10, 0x00, 0x00)}, {NULL, 0}, }; #endif int board_late_init(void) { #ifdef CONFIG_CMD_BMODE add_board_boot_modes(board_boot_modes); #endif return 0; } int checkboard(void)
#ifdef CONFIG_USB_EHCI_MX6 setup_usb(); #endif #ifdef CONFIG_FSL_QSPI board_qspi_init(); #endif return 0; } #ifdef CONFIG_CMD_BMODE static const struct boot_mode board_boot_modes[] = { /* 4 bit bus width */ {"sd1", MAKE_CFGVAL(0x42, 0x20, 0x00, 0x00)}, {"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)}, {"qspi1", MAKE_CFGVAL(0x10, 0x00, 0x00, 0x00)}, {NULL, 0}, }; #endif int board_late_init(void) { #ifdef CONFIG_CMD_BMODE add_board_boot_modes(board_boot_modes); #endif #ifdef CONFIG_ENV_IS_IN_MMC board_late_mmc_init(); #endif
(gd->ram_size == 0x80000000) ? "2GB" : (gd->ram_size == 0x40000000) ? "1GB" : "512MB", it); return 0; } #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) int ft_board_setup(void *blob, bd_t *bd) { return ft_common_board_setup(blob, bd); } #endif #ifdef CONFIG_CMD_BMODE static const struct boot_mode board_boot_modes[] = { /* 4-bit bus width */ {"mmc", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x00)}, {"sd", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)}, {NULL, 0}, }; #endif int misc_init_r(void) { #ifdef CONFIG_CMD_BMODE add_board_boot_modes(board_boot_modes); #endif return 0; } #ifdef CONFIG_LDO_BYPASS_CHECK /* TODO, use external pmic, for now always ldo_enable */
#endif #ifdef CONFIG_FSL_QSPI board_qspi_init(); #endif #ifdef CONFIG_NAND_MXS setup_gpmi_nand(); #endif return 0; } #ifdef CONFIG_CMD_BMODE static const struct boot_mode board_boot_modes[] = { {"sda", MAKE_CFGVAL(0x42, 0x30, 0x00, 0x00)}, {"sdb", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, {"qspi1", MAKE_CFGVAL(0x10, 0x00, 0x00, 0x00)}, {"nand", MAKE_CFGVAL(0x82, 0x00, 0x00, 0x00)}, {NULL, 0}, }; #endif int board_late_init(void) { #ifdef CONFIG_CMD_BMODE add_board_boot_modes(board_boot_modes); #endif return 0; }
{ /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; return 0; } int checkboard(void) { puts("Board: Conga-QEVAL QMX6 Quad\n"); return 0; } #ifdef CONFIG_CMD_BMODE static const struct boot_mode board_boot_modes[] = { /* 4 bit bus width */ {"mmc0", MAKE_CFGVAL(0x50, 0x20, 0x00, 0x00)}, {"mmc1", MAKE_CFGVAL(0x50, 0x38, 0x00, 0x00)}, {NULL, 0}, }; #endif int misc_init_r(void) { #ifdef CONFIG_CMD_BMODE add_board_boot_modes(board_boot_modes); #endif return 0; }
#endif #ifdef CONFIG_MX53 void boot_mode_apply(unsigned cfg_val) { writel(cfg_val, &((struct srtc_regs *)SRTC_BASE_ADDR)->lpgr); } /* * cfg_val will be used for * Boot_cfg3[7:0]:Boot_cfg2[7:0]:Boot_cfg1[7:0] * * If bit 28 of LPGR is set upon watchdog reset, * bits[25:0] of LPGR will move to SBMR. */ const struct boot_mode soc_boot_modes[] = { {"normal", MAKE_CFGVAL(0x00, 0x00, 0x00, 0x00)}, /* usb or serial download */ {"usb", MAKE_CFGVAL(0x00, 0x00, 0x00, 0x13)}, {"sata", MAKE_CFGVAL(0x28, 0x00, 0x00, 0x12)}, {"escpi1:0", MAKE_CFGVAL(0x38, 0x20, 0x00, 0x12)}, {"escpi1:1", MAKE_CFGVAL(0x38, 0x20, 0x04, 0x12)}, {"escpi1:2", MAKE_CFGVAL(0x38, 0x20, 0x08, 0x12)}, {"escpi1:3", MAKE_CFGVAL(0x38, 0x20, 0x0c, 0x12)}, /* 4 bit bus width */ {"esdhc1", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x12)}, {"esdhc2", MAKE_CFGVAL(0x40, 0x20, 0x08, 0x12)}, {"esdhc3", MAKE_CFGVAL(0x40, 0x20, 0x10, 0x12)}, {"esdhc4", MAKE_CFGVAL(0x40, 0x20, 0x18, 0x12)}, {NULL, 0}, }; #endif
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); setup_i2c(3, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info4); setup_fec(CONFIG_FEC_ENET_DEV); setup_usb(); return 0; } static const struct boot_mode board_boot_modes[] = { /* 8 bit bus width */ {"emmc", MAKE_CFGVAL(0x60, 0x28, 0x00, 0x00)}, { NULL, 0 }, }; int board_late_init(void) { add_board_boot_modes(board_boot_modes); setenv("board_name", "xpress"); return 0; } int checkboard(void) { puts("Board: CCV-EVA xPress\n");
#ifdef CONFIG_CMD_BMODE /* * BOOT_CFG1, BOOT_CFG2, BOOT_CFG3, BOOT_CFG4 * see Table 8-11 and Table 5-9 * BOOT_CFG1[7] = 1 (boot from NAND) * BOOT_CFG1[5] = 0 - raw NAND * BOOT_CFG1[4] = 0 - default pad settings * BOOT_CFG1[3:2] = 00 - devices = 1 * BOOT_CFG1[1:0] = 00 - Row Address Cycles = 3 * BOOT_CFG2[4:3] = 00 - Boot Search Count = 2 * BOOT_CFG2[2:1] = 01 - Pages In Block = 64 * BOOT_CFG2[0] = 0 - Reset time 12ms */ static const struct boot_mode board_boot_modes[] = { /* NAND: 64pages per block, 3 row addr cycles, 2 copies of FCB/DBBT */ {"nand", MAKE_CFGVAL(0x80, 0x02, 0x00, 0x00)}, {"mmc0", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x00)}, {NULL, 0}, }; #endif int board_late_init(void) { #ifdef CONFIG_CMD_BMODE add_board_boot_modes(board_boot_modes); #endif return 0; } #ifdef CONFIG_SPL_BUILD
return 0; } int board_init(void) { /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; return 0; } #ifdef CONFIG_CMD_BMODE static const struct boot_mode board_boot_modes[] = { /* 4 bit bus width */ {"mmc0", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x12)}, {"mmc1", MAKE_CFGVAL(0x40, 0x20, 0x08, 0x12)}, {NULL, 0}, }; #endif int board_late_init(void) { setup_i2c(1); power_init(); #ifdef CONFIG_CMD_BMODE add_board_boot_modes(board_boot_modes); #endif return 0; }
char *cmd; sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix); cmd = getenv(cmd_name); if (cmd) { setenv("preboot", cmd); return; } } } } #endif #ifdef CONFIG_CMD_BMODE static const struct boot_mode board_boot_modes[] = { /* 4 bit bus width */ {"mmc0", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, /* usdhc4 */ {NULL, 0}, }; #endif int misc_init_r(void) { #ifdef CONFIG_CMD_BMODE add_board_boot_modes(board_boot_modes); #endif return 0; } #define PROGRESS_BITS 3 static int const leds[] = {
board_qspi_init(); #endif #ifdef CONFIG_MXC_EPDC qn_output[5] = qn_disable; iox74lv_set(5); setup_epdc(); #endif return 0; } #ifdef CONFIG_CMD_BMODE static const struct boot_mode board_boot_modes[] = { /* 4 bit bus width */ {"sd1", MAKE_CFGVAL(0x10, 0x10, 0x00, 0x00)}, {"emmc", MAKE_CFGVAL(0x10, 0x2a, 0x00, 0x00)}, /* TODO: Nand */ {"qspi", MAKE_CFGVAL(0x00, 0x40, 0x00, 0x00)}, {NULL, 0}, }; #endif #ifdef CONFIG_POWER #define I2C_PMIC 0 int power_init_board(void) { struct pmic *p; int ret; unsigned int reg, rev_id;
* have sd1/sd2, enet is a must to boot kernel and nfsrootfs. */ setup_eimnor(); #endif #ifdef CONFIG_SYS_USE_QSPI board_qspi_init(); #endif return 0; } #ifdef CONFIG_CMD_BMODE static const struct boot_mode board_boot_modes[] = { /* 4 bit bus width */ {"sd1", MAKE_CFGVAL(0x42, 0x20, 0x00, 0x00)}, {NULL, 0}, }; #endif int board_late_init(void) { #ifdef CONFIG_CMD_BMODE add_board_boot_modes(board_boot_modes); #endif #ifdef CONFIG_ENV_IS_IN_MMC board_late_mmc_init(); #endif return 0;
int board_init(void) { /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; //#if defined(CONFIG_MX6DL) && defined(CONFIG_MXC_EPDC) // setup_epdc(); //#endif return 0; } #ifdef CONFIG_CMD_BMODE static const struct boot_mode board_boot_modes[] = { /* 4 bit bus width */ {"sd3", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, /* 8 bit bus width */ {"emmc", MAKE_CFGVAL(0x60, 0x58, 0x00, 0x00)}, //TODO add SD1 Card/NAND and/or MMC4 Card/NAND {NULL, 0}, }; #endif int board_late_init(void) { // int ret = 0; #ifdef CONFIG_CMD_BMODE add_board_boot_modes(board_boot_modes); #endif //#ifdef CONFIG_SYS_I2C_MXC