void HardwareSerial::begin(unsigned long baud)
{
baudRate = baud;
/* Set the UART to interrupt whenever the TX FIFO is almost empty or
* when any character is received. */
//MAP_UARTFIFOLevelSet(UART_BASE, UART_FIFO_TX7_8, UART_FIFO_RX7_8);
/* Initialize the UART. */
// UARTClockSourceSet(UART_BASE, UART_CLOCK_SYSTEM);
MAP_PRCMPeripheralReset(g_ulUARTPeriph[uartModule]);
MAP_PRCMPeripheralClkEnable(g_ulUARTPeriph[uartModule], PRCM_RUN_MODE_CLK);
MAP_PinTypeUART(g_ulUARTConfig[uartModule][0], PIN_MODE_3);
MAP_PinTypeUART(g_ulUARTConfig[uartModule][1], PIN_MODE_3);
MAP_UARTConfigSetExpClk(UART_BASE, 80000000, baudRate,
(UART_CONFIG_PAR_NONE | UART_CONFIG_STOP_ONE |
UART_CONFIG_WLEN_8));
flushAll();
MAP_IntEnable(g_ulUARTInt[uartModule]);
/* Enable the UART operation. */
MAP_UARTEnable(UART_BASE);
MAP_UARTIntEnable(UART_BASE, UART_INT_RT | UART_INT_TX);
}
/**
* Hardware setup
* Initializes pins, clocks, etc
*/
void HAL_setup(void){/*{{{*/
//Configure clock to run at 120MHz
//configCPU_CLOCK_HZ = 120MHz
//Needs to be set for FreeRTOS
g_syshz = MAP_SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ |
SYSCTL_OSC_MAIN |
SYSCTL_USE_PLL |
SYSCTL_CFG_VCO_480),
120000000L);
MAP_SysCtlMOSCConfigSet(SYSCTL_MOSC_HIGHFREQ);
//Enable all GPIOs
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOH);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOJ);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOK);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOL);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOM);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPION);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOP);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOQ);
init_ethernet();
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
//Configure reset pin for XBD
MAP_GPIOPinTypeGPIOOutput(GPIO_PORTC_BASE, RESET_PIN);
//Reset XBD
xbd_reset(true);
//Configure UART
MAP_GPIOPinConfigure(GPIO_PA0_U0RX);
MAP_GPIOPinConfigure(GPIO_PA1_U0TX);
MAP_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
MAP_UARTConfigSetExpClk(UART0_BASE, g_syshz, 115200,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE));
// //Configure measurement stuff
measure_setup();
//Configure xbd i2c comm
i2c_comm_setup();
//Setup watchdog
watchdog_setup();
//Unreset XBD
xbd_reset(false);
}/*}}}*/
int main() {
MAP_IntVTableBaseSet((unsigned long) &g_pfnVectors[0]);
MAP_IntEnable(FAULT_SYSTICK);
MAP_IntMasterEnable();
PRCMCC3200MCUInit();
cc3200_leds_init();
/* Console UART init. */
MAP_PRCMPeripheralClkEnable(CONSOLE_UART_PERIPH, PRCM_RUN_MODE_CLK);
MAP_PinTypeUART(PIN_55, PIN_MODE_3); /* PIN_55 -> UART0_TX */
MAP_PinTypeUART(PIN_57, PIN_MODE_3); /* PIN_57 -> UART0_RX */
MAP_UARTConfigSetExpClk(
CONSOLE_UART, MAP_PRCMPeripheralClockGet(CONSOLE_UART_PERIPH),
CONSOLE_BAUD_RATE,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
MAP_UARTFIFODisable(CONSOLE_UART);
setvbuf(stdout, NULL, _IONBF, 0);
setvbuf(stderr, NULL, _IONBF, 0);
VStartSimpleLinkSpawnTask(8);
osi_TaskCreate(v7_task, (const signed char *) "v7", V7_STACK_SIZE + 256, NULL,
3, NULL);
osi_TaskCreate(blinkenlights_task, (const signed char *) "blink", 256, NULL,
9, NULL);
osi_start();
return 0;
}
u32 platform_uart_setup( unsigned id, u32 baud, int databits, int parity, int stopbits )
{
u32 config;
MAP_GPIOPinTypeUART(uart_gpio_base [ id ], uart_gpio_pins[ id ]);
switch( databits )
{
case 5:
config = UART_CONFIG_WLEN_5;
break;
case 6:
config = UART_CONFIG_WLEN_6;
break;
case 7:
config = UART_CONFIG_WLEN_7;
break;
default:
config = UART_CONFIG_WLEN_8;
break;
}
config |= ( stopbits == PLATFORM_UART_STOPBITS_1 ) ? UART_CONFIG_STOP_ONE : UART_CONFIG_STOP_TWO;
if( parity == PLATFORM_UART_PARITY_EVEN )
config |= UART_CONFIG_PAR_EVEN;
else if( parity == PLATFORM_UART_PARITY_ODD )
config |= UART_CONFIG_PAR_ODD;
else
config |= UART_CONFIG_PAR_NONE;
MAP_UARTConfigSetExpClk( uart_base[ id ], MAP_SysCtlClockGet(), baud, config );
MAP_UARTConfigGetExpClk( uart_base[ id ], MAP_SysCtlClockGet(), &baud, &config );
return baud;
}
void rt_hw_console_init(void)
{
struct rt_lm3s_serial* serial;
serial = &serial1;
serial->parent.type = RT_Device_Class_Char;
serial->hw_base = UART0_BASE;
serial->baudrate = 115200;
rt_memset(serial->rx_buffer, 0, sizeof(serial->rx_buffer));
serial->read_index = serial->save_index = 0;
/* enable UART0 clock */
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
/* set UART0 pinmux */
MAP_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
/* Configure the UART for 115,200, 8-N-1 operation. */
MAP_UARTConfigSetExpClk(UART0_BASE, MAP_SysCtlClockGet(), serial->baudrate, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
serial->parent.init = rt_serial_init;
serial->parent.open = rt_serial_open;
serial->parent.close = rt_serial_close;
serial->parent.read = rt_serial_read;
serial->parent.write = rt_serial_write;
serial->parent.control = rt_serial_control;
serial->parent.user_data= RT_NULL;
rt_device_register(&serial->parent, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM);
}
void
InitTerm()
{
#ifndef NOTERM
MAP_UARTConfigSetExpClk(CONSOLE,MAP_PRCMPeripheralClockGet(CONSOLE_PERIPH),
UART_BAUD_RATE, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE));
#endif
__Errorlog = 0;
}
int main() {
#ifndef USE_TIRTOS
MAP_IntVTableBaseSet((unsigned long) &g_pfnVectors[0]);
#endif
MAP_IntEnable(FAULT_SYSTICK);
MAP_IntMasterEnable();
PRCMCC3200MCUInit();
/* Console UART init. */
MAP_PRCMPeripheralClkEnable(CONSOLE_UART_PERIPH, PRCM_RUN_MODE_CLK);
MAP_PinTypeUART(PIN_55, PIN_MODE_3); /* PIN_55 -> UART0_TX */
MAP_PinTypeUART(PIN_57, PIN_MODE_3); /* PIN_57 -> UART0_RX */
MAP_UARTConfigSetExpClk(
CONSOLE_UART, MAP_PRCMPeripheralClockGet(CONSOLE_UART_PERIPH),
CONSOLE_BAUD_RATE,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
MAP_UARTFIFOLevelSet(CONSOLE_UART, UART_FIFO_TX1_8, UART_FIFO_RX4_8);
MAP_UARTFIFOEnable(CONSOLE_UART);
setvbuf(stdout, NULL, _IOLBF, 0);
setvbuf(stderr, NULL, _IOLBF, 0);
cs_log_set_level(LL_INFO);
cs_log_set_file(stdout);
LOG(LL_INFO, ("Hello, world!"));
MAP_PinTypeI2C(PIN_01, PIN_MODE_1); /* SDA */
MAP_PinTypeI2C(PIN_02, PIN_MODE_1); /* SCL */
I2C_IF_Open(I2C_MASTER_MODE_FST);
/* Set up the red LED. Note that amber and green cannot be used as they share
* pins with I2C. */
MAP_PRCMPeripheralClkEnable(PRCM_GPIOA1, PRCM_RUN_MODE_CLK);
MAP_PinTypeGPIO(PIN_64, PIN_MODE_0, false);
MAP_GPIODirModeSet(GPIOA1_BASE, 0x2, GPIO_DIR_MODE_OUT);
GPIO_IF_LedConfigure(LED1);
GPIO_IF_LedOn(MCU_RED_LED_GPIO);
if (VStartSimpleLinkSpawnTask(8) != 0) {
LOG(LL_ERROR, ("Failed to create SL task"));
}
if (!mg_start_task(MG_TASK_PRIORITY, MG_TASK_STACK_SIZE, mg_init)) {
LOG(LL_ERROR, ("Failed to create MG task"));
}
osi_start();
return 0;
}
/* via the HCI_COMClose() function. */
void BTPSAPI HCITR_COMReconfigure(unsigned int HCITransportID, HCI_Driver_Reconfigure_Data_t *DriverReconfigureData)
{
long BaudRate;
/* Check to make sure that the specified Transport ID is valid. */
if((DriverReconfigureData) && (HCITransportID == TRANSPORT_ID) && (HCITransportOpen))
{
/* Change the UART baud rate. */
if(DriverReconfigureData->ReconfigureCommand == HCI_COMM_DRIVER_RECONFIGURE_DATA_COMMAND_CHANGE_PARAMETERS)
{
BaudRate = (long)DriverReconfigureData->ReconfigureData;
MAP_UARTConfigSetExpClk(UartContext.Base, MAP_SysCtlClockGet(), BaudRate, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
}
}
}
void GPS_init()
{
dbg_printf("Initializing GPS module...");
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART);
MAP_GPIOPinConfigure(GPIO_PA0_U0RX);
MAP_GPIOPinConfigure(GPIO_PA1_U0TX);
MAP_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
MAP_UARTConfigSetExpClk(UART_BASE, MAP_SysCtlClockGet(), UART_SPEED, UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE);
MAP_UARTDisable(UART_BASE);
MAP_UARTTxIntModeSet(UART_BASE, UART_TXINT_MODE_EOT);
MAP_UARTIntEnable(UART_BASE, UART_INT_RX | UART_INT_TX);
MAP_IntEnable(INT_UART);
MAP_UARTEnable(UART_BASE);
MAP_UARTFIFODisable(UART_BASE);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);
//
MAP_IntEnable(INT_GPIOG);
// Настроить прерывания на PPS
MAP_GPIOIntTypeSet(GPIO_PORTG_BASE, GPIO_PIN_7, GPIO_FALLING_EDGE);
MAP_GPIOPinIntEnable(GPIO_PORTG_BASE, GPIO_PIN_7);
//
if (tn_task_create(&task_GPS_tcb, &task_GPS_func, TASK_GPS_PRI,
&task_GPS_stk[TASK_GPS_STK_SZ - 1], TASK_GPS_STK_SZ, 0,
TN_TASK_START_ON_CREATION) != TERR_NO_ERR)
{
dbg_puts("tn_task_create(&task_GPS_tcb) error");
goto err;
}
// Настроить прерывания на PPS
//MAP_IntEnable(INT_GPIOG);
//MAP_GPIOIntTypeSet(GPIO_PORTG_BASE, GPIO_PIN_7, GPIO_FALLING_EDGE);
//MAP_GPIOPinIntEnable(GPIO_PORTG_BASE, GPIO_PIN_7);
dbg_puts("[done]");
return;
err:
dbg_trace();
tn_halt();
}
void UART1IntInit(){
//configure Uart
MAP_UARTConfigSetExpClk(UARTA1_BASE, MAP_PRCMPeripheralClockGet(PRCM_UARTA1),
UART_BAUD_RATE, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE));
UARTEnable(UARTA1_BASE);
// Disable FIFO so RX interrupt triggers on any character
MAP_UARTFIFODisable(UARTA1_BASE);
// Set interrupt handlers
MAP_UARTIntRegister(UARTA1_BASE,receiveMessage);
// Clear any interrupts that may have been present
MAP_UARTIntClear(UARTA1_BASE, UART_INT_RX);
// Enable interrupt
MAP_UARTIntEnable(UARTA1_BASE, UART_INT_RX|UART_INT_RT);
UARTFIFOEnable(UARTA1_BASE);
}
void SetupStdio(void)
{
//Put these into variables because passing macros to macros isnt fun.
const unsigned long srcClock = MAP_SysCtlClockGet();
const unsigned long baud = 115200;
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
MAP_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
MAP_UARTConfigSetExpClk(UART0_BASE, srcClock, baud,
(UART_CONFIG_PAR_NONE | UART_CONFIG_STOP_ONE |
UART_CONFIG_WLEN_8));
MAP_UARTEnable(UART0_BASE);
}
/**
* Initializes the UART
*
* \param SysClkFreq - clock frequency of the system
*
* \param baudRate - baud rate of the UART e.g. 115200 to connect to PC
*
* \note UART is connected to the stellaris virtual serial port through the USB connection
*
* \note Configuration:
* 8 data bits
* one stop bit
* no parity
**/
void twe_initUART(uint32_t SysClkFreq, uint32_t baudRate) {
MAP_SysCtlPeripheralEnable(TWE_UART_COMM_PERIPH);
MAP_SysCtlPeripheralEnable(TWE_UART_COMM_GPIO_PERIPH);
MAP_GPIOPinConfigure(TWE_UART_COMM_RX_PIN_CONFIG);
MAP_GPIOPinConfigure(TWE_UART_COMM_TX_PIN_CONFIG);
MAP_GPIOPinTypeUART(TWE_UART_COMM_GPIO_BASE, TWE_UART_COMM_RX_PIN | TWE_UART_COMM_TX_PIN);
/*
MAP_UARTConfigSetExpClk(TWE_UART_COMM_BASE, SysCtlClockGet(), 115200,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
MAP_UARTConfigSetExpClk(TWE_UART_COMM_BASE, SysClkFreq, 4608000,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
*/
MAP_UARTConfigSetExpClk(TWE_UART_COMM_BASE, SysClkFreq, baudRate,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
}
// assumes init parameters have been set up correctly
bool uart_init2(pyb_uart_obj_t *self) {
uint uartPerh;
switch (self->uart_id) {
case PYB_UART_0:
self->reg = UARTA0_BASE;
uartPerh = PRCM_UARTA0;
MAP_UARTIntRegister(UARTA0_BASE, UART0IntHandler);
MAP_IntPrioritySet(INT_UARTA0, INT_PRIORITY_LVL_3);
break;
case PYB_UART_1:
self->reg = UARTA1_BASE;
uartPerh = PRCM_UARTA1;
MAP_UARTIntRegister(UARTA1_BASE, UART1IntHandler);
MAP_IntPrioritySet(INT_UARTA1, INT_PRIORITY_LVL_3);
break;
default:
return false;
}
// Enable the peripheral clock
MAP_PRCMPeripheralClkEnable(uartPerh, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK);
// Reset the uart
MAP_PRCMPeripheralReset(uartPerh);
// Initialize the UART
MAP_UARTConfigSetExpClk(self->reg, MAP_PRCMPeripheralClockGet(uartPerh),
self->baudrate, self->config);
// Enbale the FIFO
MAP_UARTFIFOEnable(self->reg);
// Configure the FIFO interrupt levels
MAP_UARTFIFOLevelSet(self->reg, UART_FIFO_TX4_8, UART_FIFO_RX4_8);
// Configure the flow control mode
UARTFlowControlSet(self->reg, self->flowcontrol);
// Enable the RX and RX timeout interrupts
MAP_UARTIntEnable(self->reg, UART_INT_RX | UART_INT_RT);
self->enabled = true;
return true;
}
void cc32xx_uart_early_init(int uart_no, int baud_rate) {
if (uart_no < 0) return;
uint32_t base = cc32xx_uart_get_base(uart_no);
uint32_t periph;
if (uart_no == 0) {
periph = PRCM_UARTA0;
MAP_PinTypeUART(PIN_55, PIN_MODE_3); /* UART0_TX */
MAP_PinTypeUART(PIN_57, PIN_MODE_3); /* UART0_RX */
} else if (uart_no == 1) {
periph = PRCM_UARTA1;
MAP_PinTypeUART(PIN_07, PIN_MODE_5); /* UART1_TX */
MAP_PinTypeUART(PIN_08, PIN_MODE_5); /* UART1_RX */
} else {
return;
}
MAP_PRCMPeripheralClkEnable(periph, PRCM_RUN_MODE_CLK);
MAP_UARTConfigSetExpClk(
base, MAP_PRCMPeripheralClockGet(periph), baud_rate,
UART_CONFIG_WLEN_8 | UART_CONFIG_PAR_NONE | UART_CONFIG_STOP_ONE);
MAP_UARTFIFODisable(base);
MAP_UARTIntDisable(base, ~0); /* Start with ints disabled. */
}
int main()
{
MAP_IntVTableBaseSet((unsigned long)vectors);
MAP_IntMasterEnable();
MAP_IntEnable(FAULT_SYSTICK);
PRCMCC3200MCUInit();
#ifdef UART_LOG
MAP_PRCMPeripheralClkEnable(PRCM_UART_TERM, PRCM_RUN_MODE_CLK);
MAP_PinTypeUART(PIN_TERM_TX, PIN_TERM_TX_MODE);
MAP_PinTypeUART(PIN_TERM_RX, PIN_TERM_RX_MODE);
MAP_UARTConfigSetExpClk(UART_TERM,
MAP_PRCMPeripheralClockGet(PRCM_UART_TERM),
115200,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |UART_CONFIG_PAR_NONE));
#endif
MonitorLoop();
asm(" BKPT");
while ( 1 );
return 0;
}
/*
* @brief Initializes serial I/O.
*
* Enable the peripherals used by this example.
* Enable processor interrupts.
* Set GPIO A0 and A1 as UART pins.
* Configure the UART for 115,200, 8-N-1 operation.
* Enable the UART interrupt.
* @returns void
*/
void serialInit() {
// Enable the peripherals.
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
// Set GPIO A0 and A1 as UART pins.
MAP_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
// Configure the UART for 230,400, 8N1 operation.
MAP_UARTConfigSetExpClk(UART0_BASE, SYSCTL_CLOCK_FREQ, SERIAL_BAUDRATE,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
// MAP_UARTFIFOEnable(UART0_BASE);
// // set the fifos for 1/8 empty on transmit and 3/4 full on receive
// MAP_UARTFIFOLevelSet(UART0_BASE, UART_FIFO_TX7_8, UART_FIFO_RX1_8);
// Enable the UART interrupts (receive only).
MAP_UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT);
MAP_UARTIntDisable(UART0_BASE, UART_INT_TX);
// Enable the interrupt in the NVIC with the right priority for FreeRTOS
// MAP_IntPrioritySet(INT_UART0, SYSTEM_INTERRUPT_PRIORITY);
// MAP_IntEnable(INT_UART0);
}
bool initializeUartChannel(uint8_t channel,
uint8_t uartPort,
uint32_t baudRate,
uint32_t cpuSpeedHz,
uint32_t flags)
{
if (channel >= UART_NUMBER_OF_CHANNELS ||
uartPort >= UART_COUNT)
{
return false;
}
if (uart2UartChannelData[uartPort] != 0)
{
return false;
}
if (!(flags & UART_FLAGS_RECEIVE) && !(flags & UART_FLAGS_SEND))
{
return false;
}
uint32_t uartBase;
uint32_t uartInterruptId;
uint32_t uartPeripheralSysCtl;
switch (uartPort)
{
#ifdef DEBUG
case UART_0:
{
uartBase = UART0_BASE;
uartInterruptId = INT_UART0;
uartPeripheralSysCtl = SYSCTL_PERIPH_UART0;
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
ROM_GPIOPinConfigure(GPIO_PA0_U0RX);
ROM_GPIOPinConfigure(GPIO_PA1_U0TX);
ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
break;
}
#endif
case UART_1:
{
uartBase = UART1_BASE;
uartInterruptId = INT_UART1;
uartPeripheralSysCtl = SYSCTL_PERIPH_UART1;
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1);
ROM_GPIOPinConfigure(GPIO_PB0_U1RX);
ROM_GPIOPinConfigure(GPIO_PB1_U1TX);
ROM_GPIOPinTypeUART(GPIO_PORTB_BASE, GPIO_PIN_0 | GPIO_PIN_1);
break;
}
case UART_2:
{
uartBase = UART2_BASE;
uartInterruptId = INT_UART2;
uartPeripheralSysCtl = SYSCTL_PERIPH_UART2;
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART2);
ROM_GPIOPinConfigure(GPIO_PD6_U2RX);
ROM_GPIOPinConfigure(GPIO_PD7_U2TX);
ROM_GPIOPinTypeUART(GPIO_PORTD_BASE, GPIO_PIN_6 | GPIO_PIN_7);
break;
}
case UART_3:
{
uartBase = UART3_BASE;
uartInterruptId = INT_UART3;
uartPeripheralSysCtl = SYSCTL_PERIPH_UART3;
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART3);
ROM_GPIOPinConfigure(GPIO_PC6_U3RX);
ROM_GPIOPinConfigure(GPIO_PC7_U3TX);
ROM_GPIOPinTypeUART(GPIO_PORTC_BASE, GPIO_PIN_6 | GPIO_PIN_7);
break;
}
case UART_4:
{
uartBase = UART4_BASE;
uartInterruptId = INT_UART4;
uartPeripheralSysCtl = SYSCTL_PERIPH_UART4;
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART4);
ROM_GPIOPinConfigure(GPIO_PC4_U4RX);
ROM_GPIOPinConfigure(GPIO_PC5_U4TX);
ROM_GPIOPinTypeUART(GPIO_PORTC_BASE, GPIO_PIN_4 | GPIO_PIN_5);
break;
}
default:
{
return false;
}
}
UARTClockSourceSet(uartBase, UART_CLOCK_PIOSC);
if(!MAP_SysCtlPeripheralPresent(uartPeripheralSysCtl))
{
return false;
}
MAP_SysCtlPeripheralEnable(uartPeripheralSysCtl);
MAP_UARTConfigSetExpClk(uartBase,
cpuSpeedHz,
baudRate,
(UART_CONFIG_PAR_NONE | UART_CONFIG_STOP_ONE | UART_CONFIG_WLEN_8));
MAP_UARTFIFOLevelSet(uartBase, UART_FIFO_TX1_8, UART_FIFO_RX1_8);
MAP_UARTIntDisable(uartBase, 0xFFFFFFFF);
if (flags & UART_FLAGS_RECEIVE)
{
MAP_UARTIntEnable(uartBase, UART_INT_RX | UART_INT_RT);
}
if (flags & UART_FLAGS_SEND)
{
MAP_UARTIntEnable(uartBase, UART_INT_TX);
}
MAP_IntEnable(uartInterruptId);
MAP_UARTEnable(uartBase);
uartChannelData[channel].base = uartBase;
uartChannelData[channel].interruptId = uartInterruptId;
uartChannelData[channel].writeBuffer.isEmpty = true;
uart2UartChannelData[uartPort] = &uartChannelData[channel];
return true;
}
//****************************************************************************
// MAIN FUNCTION
//****************************************************************************
void main()
{
long lRetVal = -1;
//Board Initialization
BoardInit();
//Pin Configuration
PinMuxConfig();
//Change Pin 58 Configuration from Default to Pull Down
MAP_PinConfigSet(PIN_58,PIN_STRENGTH_2MA|PIN_STRENGTH_4MA,PIN_TYPE_STD_PD);
//
// Initialize GREEN and ORANGE LED
//
GPIO_IF_LedConfigure(LED1|LED2|LED3);
//Turn Off the LEDs
GPIO_IF_LedOff(MCU_ALL_LED_IND);
//UART Initialization
MAP_PRCMPeripheralReset(PRCM_UARTA0);
MAP_UARTConfigSetExpClk(CONSOLE,MAP_PRCMPeripheralClockGet(CONSOLE_PERIPH),
UART_BAUD_RATE,(UART_CONFIG_WLEN_8 |
UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
//Display Application Banner on UART Terminal
DisplayBanner(APPLICATION_NAME);
//
// Simplelinkspawntask
//
lRetVal = VStartSimpleLinkSpawnTask(SPAWN_TASK_PRIORITY);
if(lRetVal < 0)
{
UART_PRINT("Unable to start simpelink spawn task\n\r");
LOOP_FOREVER();
}
//
// Create HTTP Server Task
//
lRetVal = osi_TaskCreate(HTTPServerTask, (signed char*)"HTTPServerTask",
OSI_STACK_SIZE, NULL, OOB_TASK_PRIORITY, NULL );
if(lRetVal < 0)
{
UART_PRINT("Unable to create task\n\r");
LOOP_FOREVER();
}
//
// Start OS Scheduler
//
osi_start();
while (1)
{
}
}
//--------------------------------
void esp8266::SetBitrate(uint32_t nBps) {
MAP_UARTConfigSetExpClk(UART_BASE, 16000000, nBps,
(UART_CONFIG_PAR_NONE | UART_CONFIG_STOP_ONE | UART_CONFIG_WLEN_8));
}
static void uart_int() {
int c = UARTCharGet(CONSOLE_UART);
struct prompt_event pe = {.type = PROMPT_CHAR_EVENT, .data = (void *) c};
osi_MsgQWrite(&s_v7_q, &pe, OSI_NO_WAIT);
MAP_UARTIntClear(CONSOLE_UART, UART_INT_RX);
}
void sj_prompt_init_hal(struct v7 *v7) {
(void) v7;
}
static void v7_task(void *arg) {
struct v7 *v7 = s_v7;
printf("\n\nSmart.JS for CC3200\n");
osi_MsgQCreate(&s_v7_q, "V7", sizeof(struct prompt_event), 32 /* len */);
osi_InterruptRegister(CONSOLE_UART_INT, uart_int, INT_PRIORITY_LVL_1);
MAP_UARTIntEnable(CONSOLE_UART, UART_INT_RX);
sl_Start(NULL, NULL, NULL);
v7 = s_v7 = init_v7(&v7);
sj_init_timers(v7);
sj_init_v7_ext(v7);
init_wifi(v7);
if (init_fs(v7) != 0) {
fprintf(stderr, "FS initialization failed.\n");
}
mongoose_init();
sj_init_http(v7);
init_i2cjs(v7);
/* Common config infrastructure. Mongoose & v7 must be initialized. */
init_device(v7);
v7_val_t res;
if (v7_exec_file(v7, "sys_init.js", &res) != V7_OK) {
fprintf(stderr, "Error: ");
v7_fprint(stderr, v7, res);
}
sj_prompt_init(v7);
while (1) {
struct prompt_event pe;
mongoose_poll(MONGOOSE_POLL_LENGTH_MS);
if (osi_MsgQRead(&s_v7_q, &pe, V7_POLL_LENGTH_MS) != OSI_OK) continue;
switch (pe.type) {
case PROMPT_CHAR_EVENT: {
sj_prompt_process_char((char) ((int) pe.data));
break;
}
case V7_INVOKE_EVENT: {
struct v7_invoke_event_data *ied =
(struct v7_invoke_event_data *) pe.data;
_sj_invoke_cb(v7, ied->func, ied->this_obj, ied->args);
v7_disown(v7, &ied->args);
v7_disown(v7, &ied->this_obj);
v7_disown(v7, &ied->func);
free(ied);
break;
}
}
}
}
/* Int vector table, defined in startup_gcc.c */
extern void (*const g_pfnVectors[])(void);
void device_reboot(void) {
sj_system_restart();
}
int main() {
MAP_IntVTableBaseSet((unsigned long) &g_pfnVectors[0]);
MAP_IntEnable(FAULT_SYSTICK);
MAP_IntMasterEnable();
PRCMCC3200MCUInit();
cc3200_leds_init();
/* Console UART init. */
MAP_PRCMPeripheralClkEnable(CONSOLE_UART_PERIPH, PRCM_RUN_MODE_CLK);
MAP_PinTypeUART(PIN_55, PIN_MODE_3); /* PIN_55 -> UART0_TX */
MAP_PinTypeUART(PIN_57, PIN_MODE_3); /* PIN_57 -> UART0_RX */
MAP_UARTConfigSetExpClk(
CONSOLE_UART, MAP_PRCMPeripheralClockGet(CONSOLE_UART_PERIPH),
CONSOLE_BAUD_RATE,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
MAP_UARTFIFODisable(CONSOLE_UART);
setvbuf(stdout, NULL, _IONBF, 0);
setvbuf(stderr, NULL, _IONBF, 0);
VStartSimpleLinkSpawnTask(8);
osi_TaskCreate(v7_task, (const signed char *) "v7", V7_STACK_SIZE + 256, NULL,
3, NULL);
osi_TaskCreate(blinkenlights_task, (const signed char *) "blink", 256, NULL,
9, NULL);
osi_start();
return 0;
}
Uart0::Error Uart0::config_uart() {
if (is_open())
return kPortAlreadyOpen;
uint32_t data_bits_cc3200;
switch (data_bits) {
case 5:
data_bits_cc3200 = UART_CONFIG_WLEN_5;
break;
case 6:
data_bits_cc3200 = UART_CONFIG_WLEN_6;
break;
case 7:
data_bits_cc3200 = UART_CONFIG_WLEN_7;
break;
case 8:
data_bits_cc3200 = UART_CONFIG_WLEN_8;
break;
default:
return kUnsuportedFeature;
}
uint32_t stop_bits_cc3200;
switch (stop_bits) {
case 1:
stop_bits_cc3200 = UART_CONFIG_STOP_ONE;
break;
case 2:
stop_bits_cc3200 = UART_CONFIG_STOP_TWO;
break;
default:
return kUnsuportedFeature;
}
uint32_t parity_cc3200;
switch (parity) {
case kParityEven:
parity_cc3200 = UART_CONFIG_PAR_EVEN;
break;
case kParityMark:
parity_cc3200 = UART_CONFIG_PAR_ONE;
break;
case kParityNone:
parity_cc3200 = UART_CONFIG_PAR_NONE;
break;
case kParityOdd:
parity_cc3200 = UART_CONFIG_PAR_ODD;
break;
case kParitySpace:
parity_cc3200 = UART_CONFIG_PAR_ZERO;
break;
default:
return kUnsuportedFeature;
}
MAP_UARTConfigSetExpClk(UARTA0_BASE, 80000000, baud,
(data_bits_cc3200 | stop_bits_cc3200 | parity_cc3200));
/*
* Disable UART to modify the configuration.
* This is needed because the SetExpClk function enables the UART
*/
MAP_UARTDisable(UARTA0_BASE);
switch (flow_control) {
case kFlowControlNone:
MAP_UARTFlowControlSet(UARTA0_BASE, UART_FLOWCONTROL_NONE);
break;
case kFlowControlHardware:
/* Enable RTS/CTS Flow Control */
if (mode == kModeDuplex)
MAP_UARTFlowControlSet(UARTA0_BASE,
UART_FLOWCONTROL_TX | UART_FLOWCONTROL_RX);
if (mode == kModeRxOnly)
MAP_UARTFlowControlSet(UARTA0_BASE,
UART_FLOWCONTROL_RX);
if (mode == kModeTxOnly)
MAP_UARTFlowControlSet(UARTA0_BASE,
UART_FLOWCONTROL_TX);
break;
default:
return kUnsuportedFeature;
break;
}
/* Register Interrupt */
MAP_UARTIntRegister(UARTA0_BASE, isr);
/* Enable Interrupt */
MAP_UARTTxIntModeSet(UARTA0_BASE, UART_TXINT_MODE_EOT);
MAP_UARTIntClear(UARTA0_BASE, UART_INT_TX | UART_INT_RX);
uint32_t interrupts = 0;
if ((mode == kModeDuplex) || (mode == kModeTxOnly))
interrupts |= UART_INT_TX;
if ((mode == kModeDuplex) || (mode == kModeRxOnly))
interrupts |= UART_INT_RX;
MAP_UARTIntEnable(UARTA0_BASE, interrupts);
/* Enable UART */
MAP_UARTEnable(UARTA0_BASE);
/* Disable Fifo */
MAP_UARTFIFODisable(UARTA0_BASE);
return kOK;
}
//*****************************************************************************
//
//! Main function handling the UART and DMA configuration. It takes 8
//! characters from terminal without displaying them. The string of 8
//! caracters will be printed on the terminal as soon as 8th character is
//! typed in.
//!
//! \param None
//!
//! \return None
//!
//*****************************************************************************
void main()
{
//
// Initailizing the board
//
BoardInit();
//
// Initialize the RX done flash
//
bRxDone = false;
//
// Initialize uDMA
//
UDMAInit();
//
// Muxing for Enabling UART_TX and UART_RX.
//
PinMuxConfig();
//
// Register interrupt handler for UART
//
MAP_UARTIntRegister(UARTA0_BASE,UARTIntHandler);
//
// Enable DMA done interrupts for uart
//
MAP_UARTIntEnable(UARTA0_BASE,UART_INT_DMARX);
//
// Initialising the Terminal.
//
MAP_UARTConfigSetExpClk(CONSOLE,MAP_PRCMPeripheralClockGet(CONSOLE_PERIPH),
UART_BAUD_RATE,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE));
//
// Clear terminal
//
ClearTerm();
//
// Display Banner
//
DisplayBanner(APP_NAME);
Message("\t\t****************************************************\n\r");
Message("\t\t Type in a string of 8 characters, the characters \n\r");
Message("\t\t will not be displayed on the terminal until \n\r");
Message("\t\t 8th character is entered.\n\r") ;
Message("\t\t****************************************************\n\r");
Message("\n\n\n\r");
//
// Set the message
//
Message("Type in 8 characters:");
//
// Configure the UART Tx and Rx FIFO level to 1/8 i.e 2 characters
//
UARTFIFOLevelSet(UARTA0_BASE,UART_FIFO_TX1_8,UART_FIFO_RX1_8);
//
// Setup DMA transfer for UART A0
//
UDMASetupTransfer(UDMA_CH8_UARTA0_RX,
UDMA_MODE_BASIC,
8,
UDMA_SIZE_8,
UDMA_ARB_2,
(void *)(UARTA0_BASE+UART_O_DR),
UDMA_SRC_INC_NONE,
(void *)ucTextBuff,
UDMA_DST_INC_8);
//
// Enable Rx DMA request from UART
//
MAP_UARTDMAEnable(UARTA0_BASE,UART_DMA_RX);
//
// Wait for RX to complete
//
while(!bRxDone)
{
}
//
// Setup DMA transfer for UART A0
//
UDMASetupTransfer(UDMA_CH9_UARTA0_TX,
UDMA_MODE_BASIC,
8,
UDMA_SIZE_8,
UDMA_ARB_2,
(void *)ucTextBuff,
UDMA_SRC_INC_8,
(void *)(UARTA0_BASE+UART_O_DR),
UDMA_DST_INC_NONE);
//
// Enable TX DMA request
//
MAP_UARTDMAEnable(UARTA0_BASE,UART_DMA_TX);
while(1)
{
//
// Inifite loop
//
}
}
//*****************************************************************************
//
// Configue UART in internal loopback mode and tranmsit and receive data
// internally.
//
//*****************************************************************************
int
main(void)
{
#if defined(TARGET_IS_TM4C129_RA0) || \
defined(TARGET_IS_TM4C129_RA1) || \
defined(TARGET_IS_TM4C129_RA2)
uint32_t ui32SysClock;
#endif
uint8_t ui8DataTx[NUM_UART_DATA];
uint8_t ui8DataRx[NUM_UART_DATA];
uint32_t ui32index;
//
// Set the clocking to run directly from the crystal.
//
#if defined(TARGET_IS_TM4C129_RA0) || \
defined(TARGET_IS_TM4C129_RA1) || \
defined(TARGET_IS_TM4C129_RA2)
ui32SysClock = SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ | SYSCTL_OSC_MAIN |
SYSCTL_USE_OSC), 25000000);
#else
MAP_SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN |
SYSCTL_XTAL_16MHZ);
#endif
//
// Enable the peripherals used by this example.
// UART0 : To dump information to the console about the example.
// UART7 : Enabled in loopback mode. Anything transmitted to Tx will be
// received at the Rx.
//
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART7);
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
//
// Set GPIO A0 and A1 as UART pins.
//
GPIOPinConfigure(GPIO_PA0_U0RX);
GPIOPinConfigure(GPIO_PA1_U0TX);
MAP_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
//
// Internal loopback programming. Configure the UART in loopback mode.
//
UARTLoopbackEnable(UART7_BASE);
//
// Configure the UART for 115,200, 8-N-1 operation.
//
#if defined(TARGET_IS_TM4C129_RA0) || \
defined(TARGET_IS_TM4C129_RA1) || \
defined(TARGET_IS_TM4C129_RA2)
MAP_UARTConfigSetExpClk(UART0_BASE, ui32SysClock, 115200,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE));
MAP_UARTConfigSetExpClk(UART7_BASE, ui32SysClock, 115200,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE));
#else
MAP_UARTConfigSetExpClk(UART0_BASE, MAP_SysCtlClockGet(), 115200,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE));
MAP_UARTConfigSetExpClk(UART7_BASE, MAP_SysCtlClockGet(), 115200,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE));
#endif
//
// Print banner after clearing the terminal.
//
UARTSend(UART0_BASE, (uint8_t *)"\033[2J\033[1;1H", 10);
UARTSend(UART0_BASE, (uint8_t *)"\nUART Loopback Example ->",
strlen("\nUART Loopback Example ->"));
//
// Prepare data to send over the UART configured for internal loopback.
//
ui8DataTx[0] = 'u';
ui8DataTx[1] = 'a';
ui8DataTx[2] = 'r';
ui8DataTx[3] = 't';
//
// Inform user that data is being sent over for internal loopback.
//
UARTSend(UART0_BASE, (uint8_t *)"\n\n\rSending : ",
strlen("\n\n\rSending : "));
UARTSend(UART0_BASE, (uint8_t*)ui8DataTx, NUM_UART_DATA);
//
// Send the data, which was prepared above, over the UART configured for
// internal loopback operation.
//
for(ui32index = 0 ; ui32index < NUM_UART_DATA ; ui32index++)
{
UARTCharPut(UART7_BASE, ui8DataTx[ui32index]);
}
//
// Wait for the UART module to complete transmitting.
//
while(MAP_UARTBusy(UART7_BASE))
{
}
//
// Inform user that data the loopback data is being received.
//
UARTSend(UART0_BASE, (uint8_t *)"\n\rReceiving : ",
strlen("\n\rReceiving : "));
//
// Read data from the UART's receive FIFO and store it.
//
for(ui32index = 0 ; ui32index < NUM_UART_DATA ; ui32index++)
{
//
// Get the data received by the UART at its receive FIFO
//
ui8DataRx[ui32index] = UARTCharGet(UART7_BASE);
}
//
// Display the data received, after loopback, over UART's receive FIFO.
//
UARTSend(UART0_BASE, (uint8_t*)ui8DataRx, NUM_UART_DATA);
//
// Return no errors
//
return(0);
}
//*****************************************************************************
//
//! Initializes the UART0 peripheral and sets up the TX and RX uDMA channels.
//! The UART is configured for loopback mode so that any data sent on TX will be
//! received on RX. The uDMA channels are configured so that the TX channel
//! will copy data from a buffer to the UART TX output. And the uDMA RX channel
//! will receive any incoming data into a pair of buffers in ping-pong mode.
//!
//! \param None
//!
//! \return None
//!
//*****************************************************************************
void
InitUART0Transfer(void)
{
unsigned int uIdx;
//
// Fill the TX buffer with a simple data pattern.
//
for(uIdx = 0; uIdx < UART_TXBUF_SIZE; uIdx++)
{
g_ucTxBuf[uIdx] = 65;
}
MAP_PRCMPeripheralReset(PRCM_UARTA0);
MAP_PRCMPeripheralClkEnable(PRCM_UARTA0,PRCM_RUN_MODE_CLK);
MAP_UARTConfigSetExpClk(CONSOLE,SYSCLK, UART_BAUD_RATE,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE));
MAP_uDMAChannelAssign(UDMA_CH8_UARTA0_RX);
MAP_uDMAChannelAssign(UDMA_CH9_UARTA0_TX);
MAP_UARTIntRegister(UARTA0_BASE,UART0IntHandler);
//
// Set both the TX and RX trigger thresholds to 4. This will be used by
// the uDMA controller to signal when more data should be transferred. The
// uDMA TX and RX channels will be configured so that it can transfer 4
// bytes in a burst when the UART is ready to transfer more data.
//
MAP_UARTFIFOLevelSet(UARTA0_BASE, UART_FIFO_TX4_8, UART_FIFO_RX4_8);
//
// Enable the UART for operation, and enable the uDMA interface for both TX
// and RX channels.
//
MAP_UARTEnable(UARTA0_BASE);
//
// This register write will set the UART to operate in loopback mode. Any
// data sent on the TX output will be received on the RX input.
//
HWREG(UARTA0_BASE + UART_O_CTL) |= UART_CTL_LBE;
//
// Enable the UART peripheral interrupts. uDMA controller will cause an
// interrupt on the UART interrupt signal when a uDMA transfer is complete.
//
MAP_UARTIntEnable(UARTA0_BASE,UART_INT_DMATX);
MAP_UARTIntEnable(UARTA0_BASE,UART_INT_DMARX);
//
// Configure the control parameters for the UART TX. The uDMA UART TX
// channel is used to transfer a block of data from a buffer to the UART.
// The data size is 8 bits. The source address increment is 8-bit bytes
// since the data is coming from a buffer. The destination increment is
// none since the data is to be written to the UART data register. The
// arbitration size is set to 4, which matches the UART TX FIFO trigger
// threshold.
//
UDMASetupTransfer(UDMA_CH8_UARTA0_RX | UDMA_PRI_SELECT, UDMA_MODE_PINGPONG,
sizeof(g_ucRxBufA),UDMA_SIZE_8, UDMA_ARB_4,
(void *)(UARTA0_BASE + UART_O_DR), UDMA_SRC_INC_NONE,
g_ucRxBufA, UDMA_DST_INC_8);
UDMASetupTransfer(UDMA_CH8_UARTA0_RX | UDMA_ALT_SELECT, UDMA_MODE_PINGPONG,
sizeof(g_ucRxBufB),UDMA_SIZE_8, UDMA_ARB_4,
(void *)(UARTA0_BASE + UART_O_DR), UDMA_SRC_INC_NONE,
g_ucRxBufB, UDMA_DST_INC_8);
UDMASetupTransfer(UDMA_CH9_UARTA0_TX| UDMA_PRI_SELECT,
UDMA_MODE_BASIC,sizeof(g_ucTxBuf),UDMA_SIZE_8, UDMA_ARB_4,
g_ucTxBuf, UDMA_SRC_INC_8,(void *)(UARTA0_BASE + UART_O_DR),
UDMA_DST_INC_NONE);
MAP_UARTDMAEnable(UARTA0_BASE, UART_DMA_RX | UART_DMA_TX);
}
/* success. */
int BTPSAPI HCITR_COMOpen(HCI_COMMDriverInformation_t *COMMDriverInformation, HCITR_COMDataCallback_t COMDataCallback, unsigned long CallbackParameter)
{
int ret_val;
/* First, make sure that the port is not already open and make sure */
/* that valid COMM Driver Information was specified. */
if((!HCITransportOpen) && (COMMDriverInformation) && (COMDataCallback))
{
/* Initialize the return value for success. */
ret_val = TRANSPORT_ID;
/* Note the COM Callback information. */
_COMDataCallback = COMDataCallback;
_COMCallbackParameter = CallbackParameter;
/* Initialize the UART Context Structure. */
BTPS_MemInitialize(&UartContext, 0, sizeof(UartContext_t));
UartContext.Base = HCI_UART_BASE;
UartContext.IntBase = HCI_UART_INT;
UartContext.ID = 1;
UartContext.FlowInfo = UART_CONTEXT_FLAG_FLOW_CONTROL_ENABLED;
UartContext.XOnLimit = DEFAULT_XON_LIMIT;
UartContext.XOffLimit = DEFAULT_XOFF_LIMIT;
UartContext.RxBufferSize = DEFAULT_INPUT_BUFFER_SIZE;
UartContext.RxBytesFree = DEFAULT_INPUT_BUFFER_SIZE;
UartContext.TxBufferSize = DEFAULT_OUTPUT_BUFFER_SIZE;
UartContext.TxBytesFree = DEFAULT_OUTPUT_BUFFER_SIZE;
/* Flag that the Rx Thread should not delete itself. */
RxThreadDeleted = FALSE;
/* Check to see if this is the first time that the port has been */
/* opened. */
if(!Handle)
{
/* Configure the UART module and the GPIO pins used by the */
/* UART. */
MAP_SysCtlPeripheralEnable(HCI_UART_GPIO_PERIPH);
MAP_SysCtlPeripheralEnable(HCI_UART_RTS_GPIO_PERIPH);
MAP_SysCtlPeripheralEnable(HCI_UART_CTS_GPIO_PERIPH);
MAP_SysCtlPeripheralEnable(HCI_UART_PERIPH);
MAP_GPIOPinConfigure(HCI_PIN_CONFIGURE_UART_RX);
MAP_GPIOPinConfigure(HCI_PIN_CONFIGURE_UART_TX);
MAP_GPIOPinConfigure(HCI_PIN_CONFIGURE_UART_RTS);
MAP_GPIOPinConfigure(HCI_PIN_CONFIGURE_UART_CTS);
MAP_GPIOPinTypeUART(HCI_UART_GPIO_BASE, HCI_UART_PIN_RX | HCI_UART_PIN_TX);
MAP_GPIOPinTypeUART(HCI_UART_RTS_GPIO_BASE, HCI_UART_PIN_RTS);
MAP_GPIOPinTypeUART(HCI_UART_CTS_GPIO_BASE, HCI_UART_PIN_CTS);
UARTFlowControlSet(UartContext.Base, UART_FLOWCONTROL_RX | UART_FLOWCONTROL_TX);
/* Create an Event that will be used to signal that data has */
/* arrived. */
RxDataEvent = BTPS_CreateEvent(FALSE);
if(RxDataEvent)
{
/* Create a thread that will process the received data. */
Handle = BTPS_CreateThread(RxThread, 1600, NULL);
if(!Handle)
{
BTPS_CloseEvent(RxDataEvent);
ret_val = HCITR_ERROR_UNABLE_TO_OPEN_TRANSPORT;
}
}
else
ret_val = HCITR_ERROR_UNABLE_TO_OPEN_TRANSPORT;
}
/* If there was no error, then continue to setup the port. */
if(ret_val != HCITR_ERROR_UNABLE_TO_OPEN_TRANSPORT)
{
/* Configure UART Baud Rate and Interrupts. */
MAP_UARTConfigSetExpClk(UartContext.Base, MAP_SysCtlClockGet(), COMMDriverInformation->BaudRate, (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
/* SafeRTOS requires RTOS-aware int handlers to be priority */
/* value 5 or greater */
MAP_IntPrioritySet(UartContext.IntBase, 6 << 5);
MAP_IntEnable(UartContext.IntBase);
MAP_UARTIntEnable(UartContext.Base, UART_INT_RX | UART_INT_RT);
UartContext.Flags |= UART_CONTEXT_FLAG_RX_FLOW_ENABLED;
/* Clear any data that is in the Buffer. */
FlushRxFIFO(UartContext.Base);
/* Bring the Bluetooth Device out of Reset. */
MAP_GPIOPinWrite(HCI_RESET_BASE, HCI_RESET_PIN, HCI_RESET_PIN);
/* Check to see if we need to delay after opening the COM Port.*/
if(COMMDriverInformation->InitializationDelay)
BTPS_Delay(COMMDriverInformation->InitializationDelay);
/* Flag that the HCI Transport is open. */
HCITransportOpen = 1;
}
}
else
ret_val = HCITR_ERROR_UNABLE_TO_OPEN_TRANSPORT;
return(ret_val);
}
bool mgos_uart_hal_configure(struct mgos_uart_state *us,
const struct mgos_uart_config *cfg) {
uint32_t base = cc32xx_uart_get_base(us->uart_no);
if (us->uart_no == 0 && (cfg->tx_fc_type == MGOS_UART_FC_HW ||
cfg->rx_fc_type == MGOS_UART_FC_HW)) {
/* No FC on UART0, according to the TRM. */
return false;
}
MAP_UARTIntDisable(base, ~0);
uint32_t periph = (us->uart_no == 0 ? PRCM_UARTA0 : PRCM_UARTA1);
uint32_t data_cfg = 0;
switch (cfg->num_data_bits) {
case 5:
data_cfg |= UART_CONFIG_WLEN_5;
break;
case 6:
data_cfg |= UART_CONFIG_WLEN_6;
break;
case 7:
data_cfg |= UART_CONFIG_WLEN_7;
break;
case 8:
data_cfg |= UART_CONFIG_WLEN_8;
break;
default:
return false;
}
switch (cfg->parity) {
case MGOS_UART_PARITY_NONE:
data_cfg |= UART_CONFIG_PAR_NONE;
break;
case MGOS_UART_PARITY_EVEN:
data_cfg |= UART_CONFIG_PAR_EVEN;
break;
case MGOS_UART_PARITY_ODD:
data_cfg |= UART_CONFIG_PAR_ODD;
break;
}
switch (cfg->stop_bits) {
case MGOS_UART_STOP_BITS_1:
data_cfg |= UART_CONFIG_STOP_ONE;
break;
case MGOS_UART_STOP_BITS_1_5:
return false; /* Not supported */
case MGOS_UART_STOP_BITS_2:
data_cfg |= UART_CONFIG_STOP_TWO;
break;
}
MAP_UARTConfigSetExpClk(base, MAP_PRCMPeripheralClockGet(periph),
cfg->baud_rate, data_cfg);
if (cfg->tx_fc_type == MGOS_UART_FC_HW ||
cfg->rx_fc_type == MGOS_UART_FC_HW) {
/* Note: only UART1 */
uint32_t ctl = HWREG(base + UART_O_CTL);
if (cfg->tx_fc_type == MGOS_UART_FC_HW) {
ctl |= UART_CTL_CTSEN;
MAP_PinTypeUART(PIN_61, PIN_MODE_3); /* UART1_CTS */
}
if (cfg->rx_fc_type == MGOS_UART_FC_HW) {
ctl |= UART_CTL_RTSEN;
MAP_PinTypeUART(PIN_62, PIN_MODE_3); /* UART1_RTS */
}
HWREG(base + UART_O_CTL) = ctl;
}
MAP_UARTFIFOLevelSet(base, UART_FIFO_TX1_8, UART_FIFO_RX4_8);
MAP_UARTFIFOEnable(base);
return true;
}
//*****************************************************************************
//
// The main function sets up the peripherals for the example, then enters
// a wait loop until the DMA transfers are complete. At the end some
// information is printed for the user.
//
//*****************************************************************************
int
main(void)
{
unsigned long ulIdx;
//
// Set the clocking to run directly from the PLL at 50 MHz.
//
MAP_SysCtlClockSet(SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN |
SYSCTL_XTAL_16MHZ);
//
// Initialize the console UART and write a message to the terminal.
//
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
MAP_GPIOPinConfigure(GPIO_PA0_U0RX);
MAP_GPIOPinConfigure(GPIO_PA1_U0TX);
MAP_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
UARTStdioInit(0);
UARTprintf("\033[2JMemory/UART scatter-gather uDMA example\n\n");
//
// Configure UART1 to be used for the loopback peripheral
//
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1);
//
// Configure the UART communication parameters.
//
MAP_UARTConfigSetExpClk(UART1_BASE, MAP_SysCtlClockGet(), 115200,
UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE);
//
// Set both the TX and RX trigger thresholds to one-half (8 bytes). This
// will be used by the uDMA controller to signal when more data should be
// transferred. The uDMA TX and RX channels will be configured so that it
// can transfer 8 bytes in a burst when the UART is ready to transfer more
// data.
//
MAP_UARTFIFOLevelSet(UART1_BASE, UART_FIFO_TX4_8, UART_FIFO_RX4_8);
//
// Enable the UART for operation, and enable the uDMA interface for both TX
// and RX channels.
//
MAP_UARTEnable(UART1_BASE);
MAP_UARTDMAEnable(UART1_BASE, UART_DMA_RX | UART_DMA_TX);
//
// This register write will set the UART to operate in loopback mode. Any
// data sent on the TX output will be received on the RX input.
//
HWREG(UART1_BASE + UART_O_CTL) |= UART_CTL_LBE;
//
// Enable the UART peripheral interrupts. Note that no UART interrupts
// were enabled, but the uDMA controller will cause an interrupt on the
// UART interrupt signal when a uDMA transfer is complete.
//
MAP_IntEnable(INT_UART1);
//
// Enable the uDMA peripheral clocking.
//
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_UDMA);
//
// Enable the uDMA controller.
//
MAP_uDMAEnable();
//
// Point at the control table to use for channel control structures.
//
MAP_uDMAControlBaseSet(sControlTable);
//
// Configure the UART TX channel for scatter-gather
// Peripheral scatter-gather is used because transfers are gated by
// requests from the peripheral
//
UARTprintf("Configuring UART TX uDMA channel for scatter-gather\n");
#ifndef USE_SGSET_API
//
// Use the original method for configuring the scatter-gather transfer
//
uDMAChannelControlSet(UDMA_CHANNEL_UART1TX, UDMA_SIZE_32 |
UDMA_SRC_INC_32 | UDMA_DST_INC_32 | UDMA_ARB_4);
uDMAChannelTransferSet(UDMA_CHANNEL_UART1TX, UDMA_MODE_PER_SCATTER_GATHER,
g_TaskTableSrc,
&sControlTable[UDMA_CHANNEL_UART1TX], 6 * 4);
#else
//
// Use the simplified API for configuring the scatter-gather transfer
//
uDMAChannelScatterGatherSet(UDMA_CHANNEL_UART1TX, 6, g_TaskTableSrc, 1);
#endif
//
// Configure the UART RX channel for scatter-gather task list.
// This is set to peripheral s-g because it starts by receiving data
// from the UART
//
UARTprintf("Configuring UART RX uDMA channel for scatter-gather\n");
#ifndef USE_SGSET_API
//
// Use the original method for configuring the scatter-gather transfer
//
uDMAChannelControlSet(UDMA_CHANNEL_UART1RX, UDMA_SIZE_32 |
UDMA_SRC_INC_32 | UDMA_DST_INC_32 | UDMA_ARB_4);
uDMAChannelTransferSet(UDMA_CHANNEL_UART1RX, UDMA_MODE_PER_SCATTER_GATHER,
g_TaskTableDst,
&sControlTable[UDMA_CHANNEL_UART1RX], 7 * 4);
#else
//
// Use the simplified API for configuring the scatter-gather transfer
//
uDMAChannelScatterGatherSet(UDMA_CHANNEL_UART1RX, 7, g_TaskTableDst, 1);
#endif
//
// Fill the source buffer with a pattern
//
for(ulIdx = 0; ulIdx < 1024; ulIdx++)
{
g_ucSrcBuf[ulIdx] = ulIdx + (ulIdx / 256);
}
//
// Enable the uDMA controller error interrupt. This interrupt will occur
// if there is a bus error during a transfer.
//
IntEnable(INT_UDMAERR);
//
// Enable the UART RX DMA channel. It will wait for data to be available
// from the UART.
//
UARTprintf("Enabling uDMA channel for UART RX\n");
MAP_uDMAChannelEnable(UDMA_CHANNEL_UART1RX);
//
// Enable the UART TX DMA channel. Since the UART TX will be asserting
// a DMA request (since the TX FIFO is empty), this will cause this
// DMA channel to start running.
//
UARTprintf("Enabling uDMA channel for UART TX\n");
MAP_uDMAChannelEnable(UDMA_CHANNEL_UART1TX);
//
// Wait for the TX task list to be finished
//
UARTprintf("Waiting for TX task list to finish ... ");
while(!g_bTXdone)
{
}
UARTprintf("done\n");
//
// Wait for the RX task list to be finished
//
UARTprintf("Waiting for RX task list to finish ... ");
while(!g_bRXdone)
{
}
UARTprintf("done\n");
//
// Verify that all the counters are in the expected state
//
UARTprintf("Verifying counters\n");
if(g_ulDMAIntCount != 2)
{
UARTprintf("ERROR in interrupt count, found %d, expected 2\n",
g_ulDMAIntCount);
}
if(g_uluDMAErrCount != 0)
{
UARTprintf("ERROR in error counter, found %d, expected 0\n",
g_uluDMAErrCount);
}
//
// Now verify the contents of the final destination buffer. Compare it
// to the original source buffer.
//
UARTprintf("Verifying buffer contents ... ");
for(ulIdx = 0; ulIdx < 1024; ulIdx++)
{
if(g_ucDstBuf[ulIdx] != g_ucSrcBuf[ulIdx])
{
UARTprintf("ERROR\n @ index %d: expected 0x%02X, found 0x%02X\n",
ulIdx, g_ucSrcBuf[ulIdx], g_ucDstBuf[ulIdx]);
UARTprintf("Checking stopped. There may be additional errors\n");
break;
}
}
if(ulIdx == 1024)
{
UARTprintf("OK\n");
}
//
// End of program, loop forever
//
for(;;)
{
}
}
int main(void) {
MAP_IntVTableBaseSet((unsigned long) &int_vectors[0]);
MAP_IntMasterEnable();
PRCMCC3200MCUInit();
/* Console UART init. */
#ifndef NO_DEBUG
MAP_PRCMPeripheralClkEnable(DEBUG_UART_PERIPH, PRCM_RUN_MODE_CLK);
#if MIOT_DEBUG_UART == 0
MAP_PinTypeUART(PIN_55, PIN_MODE_3); /* UART0_TX */
MAP_PinTypeUART(PIN_57, PIN_MODE_3); /* UART0_RX */
#else
MAP_PinTypeUART(PIN_07, PIN_MODE_5); /* UART1_TX */
MAP_PinTypeUART(PIN_08, PIN_MODE_5); /* UART1_RX */
#endif
MAP_UARTConfigSetExpClk(
DEBUG_UART_BASE, MAP_PRCMPeripheralClockGet(DEBUG_UART_PERIPH),
MIOT_DEBUG_UART_BAUD_RATE,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
MAP_UARTFIFOLevelSet(DEBUG_UART_BASE, UART_FIFO_TX1_8, UART_FIFO_RX4_8);
MAP_UARTFIFODisable(DEBUG_UART_BASE);
#endif
dbg_puts("\r\n\n");
if (sl_Start(NULL, NULL, NULL) < 0) abort();
dbg_putc('S');
int cidx = get_active_boot_cfg_idx();
if (cidx < 0) abort();
dbg_putc('0' + cidx);
struct boot_cfg cfg;
if (read_boot_cfg(cidx, &cfg) < 0) abort();
dbg_puts(cfg.app_image_file);
dbg_putc('@');
print_addr(cfg.app_load_addr);
/*
* Zero memory before loading.
* This should provide proper initialisation for BSS, wherever it is.
*/
uint32_t *pstart = (uint32_t *) 0x20000000;
uint32_t *pend = (&_text_start - 0x100 /* our stack */);
for (uint32_t *p = pstart; p < pend; p++) *p = 0;
if (load_image(cfg.app_image_file, (_u8 *) cfg.app_load_addr) != 0) {
abort();
}
dbg_putc('.');
sl_Stop(0);
print_addr(*(((uint32_t *) cfg.app_load_addr) + 1));
dbg_puts("\r\n\n");
MAP_IntMasterDisable();
MAP_IntVTableBaseSet(cfg.app_load_addr);
run(cfg.app_load_addr); /* Does not return. */
abort();
return 0; /* not reached */
}
