Esempio n. 1
0
void benchmark_timer_initialize(void)
{
  uint32_t preScaleDivisor = bsp_get_CPU_clock_speed() / 1000000;

  MCF_DTIM3_DTMR = 0;
  MCF_DTIM3_DTMR = MCF_DTIM_DTMR_PS(preScaleDivisor - 1) |
    MCF_DTIM_DTMR_CLK_DIV1 | MCF_DTIM_DTMR_RST;
}
Esempio n. 2
0
/* DMA Timer Initialization */
int8 dtim_init(/*DTIM_Info info, */uint8 u8DTimModule)
{
	/*MCF_SCM_PPMRL &= ~MCF_SCM_PPMRL_CDDTIM0;
	MCF_SCM_PPMRC |= MCF_SCM_PPMRC_ENABLE_DTIM0;*/
	
	gpio_set_func(PTTC, u8DTimModule, PRIMARY);
	
	MCF_DTIM_DTMR(u8DTimModule)|= 0 | MCF_DTIM_DTMR_PS(0) |  MCF_DTIM_DTMR_CE_NONE | MCF_DTIM_DTMR_CLK_DTIN | MCF_DTIM_DTMR_FRR;
	MCF_DTIM_DTRR(u8DTimModule)=~0;
	MCF_DTIM_DTCN(u8DTimModule)=0;

	/*MCF_GPIO_PTCPAR|=MCF_GPIO_PTCPAR_DTIN0_DTIN0|MCF_GPIO_PTCPAR_DTIN1_DTIN1;
	//timer mode reg
	//	MCF_DTIM_DTMR(u8DTimModule) = MCF_DTIM_DTMR_CE(info.u8CapEdge | MCF_DTIM_DTMR_CLK(info.u8ClkSrc);
	MCF_DTIM_DTMR(u8DTimModule) |= MCF_DTIM_DTMR_CE_NONE | MCF_DTIM_DTMR_CLK_DTIN | MCF_DTIM_DTMR_FRR;

	MCF_DTIM_DTRR(u8DTimModule) = 0xFFFFFFFF;

	MCF_DTIM_DTCN(u8DTimModule) = 0x0;*/

	/*if(info.u8OutputMode)	//toggle output
		MCF_DTIM_DTMR(u8DTimModule) |= MCF_DTIM_DTMR_OM;
	else*/
	//	MCF_DTIM_DTMR(u8DTimModule) &= ~MCF_DTIM_DTMR_OM;
	//	if(info.u8Restart)	//restart
	//	MCF_DTIM_DTMR(u8DTimModule) |= MCF_DTIM_DTMR_FRR;
	//	else
	//		MCF_DTIM_DTMR(u8DTimModule) &= ~MCF_DTIM_DTMR_FRR;

	//Timer extended register
	//	if(info.u8DMAEn)	//DMA request enable
	//	MCF_DTIM_DTXMR(u8DTimModule) |=  MCF_DTIM_DTXMR_DMAEN;	
	//	else
	//		MCF_DTIM_DTXMR(u8DTimModule) &=  ~MCF_DTIM_DTXMR_DMAEN;	
	//	if(info.u8Halt)	//timer stop in halt
	//		MCF_DTIM_DTXMR(u8DTimModule) |=  MCF_DTIM_DTXMR_HALTED;	
	//	else
	//		MCF_DTIM_DTXMR(u8DTimModule) &=  ~MCF_DTIM_DTXMR_HALTED;	
	/*if(info.u8Mode16)
		MCF_DTIM_DTXMR(u8DTimModule) |=  MCF_DTIM_DTXMR_MODE16;
	else*/
	//	MCF_DTIM_DTXMR(u8DTimModule) &=  ~MCF_DTIM_DTXMR_MODE16;

//	DTimEnableInts(u8DTimModule, dtim0_isr);
	return 0;
}
Esempio n. 3
0
/*
 * Pause for the specified number of micro-seconds.
 * Uses DTIM3 as a timer
 */
void
cpu_pause(int usecs)
{
    /* Enable the DMA Timer 3 */
    MCF_DTIM3_DTRR = (vuint32)(usecs - 1);
    MCF_DTIM3_DTER = MCF_DTIM_DTER_REF;
    MCF_DTIM3_DTMR = 0
        | MCF_DTIM_DTMR_PS(SYSTEM_CLOCK)
        | MCF_DTIM_DTMR_FRR
        | MCF_DTIM_DTMR_CLK_DIV1
        | MCF_DTIM_DTMR_RST;

    while ((MCF_DTIM3_DTER & MCF_DTIM_DTER_REF) == 0) 
    {};
    
    /* Disable the timer */
    MCF_DTIM3_DTMR = 0;
}