void EPORT_init(void)
{
//使能IRQ1、3、5、7功能引脚
MCF_GPIO_PNQPAR = MCF_GPIO_PNQPAR_IRQ1_IRQ1
|MCF_GPIO_PNQPAR_IRQ3_IRQ3;
//设置上升沿触发中断
MCF_EPORT_EPPAR = MCF_EPORT_EPPAR_EPPA1_FALLING
|MCF_EPORT_EPPAR_EPPA3_RISING;
//设置数据方向为输入
MCF_EPORT_EPDDR =0x00;
//使能1,3,5,7中断
MCF_EPORT_EPIER = MCF_EPORT_EPIER_EPIE1;
//|MCF_EPORT_EPIER_EPIE3
//清除1,3,5,7中断标志位
MCF_EPORT_EPFR = MCF_EPORT_EPFR_EPF1
|MCF_EPORT_EPFR_EPF3;
//使能中断
MCF_INTC0_IMRL&=~MCF_INTC_IMRL_MASKALL
&~MCF_INTC_IMRL_INT_MASK1
&~MCF_INTC_IMRL_INT_MASK3;
//设置中断优先级
MCF_INTC0_ICR01=MCF_INTC_ICR_IP(3)+MCF_INTC_ICR_IL(4);
MCF_INTC0_ICR03=MCF_INTC_ICR_IP(2)+MCF_INTC_ICR_IL(4);
//MCF_INTC0_ICR05=MCF_INTC_ICR_IP(4)+MCF_INTC_ICR_IL(4);
//MCF_INTC0_ICR07=MCF_INTC_ICR_IP(5)+MCF_INTC_ICR_IL(4);
}
/************************************************
halBsTimerStart()
*************************************************/
void halBsTimerStart(void)
{ uint32_t reload;
uint8_t prio;
halTimerAdjustment = 0;
halTimerExt.u.u32 = 0;
reload = (bsAttr.timerBasicResNSec * SYSTEM_CLOCK) / (1 << (7 + 1));
reload = reload / 1000; /* Round up microsec*/
prio = (uint8_t)bsAttr.basicTimerPriority;
MCF_INTC_ICR55 = (uint8_t)(MCF_INTC_ICR_IL(prio) | MCF_INTC_ICR_IP(0)); // Set PIT0 interrupt level
MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK55; // Enable the PIT0 interrupt
MCF_INTC_IMRL &= ~MCF_INTC_IMRL_MASKALL; // Enable interrupts
MCF_PIT0_PCSR = MCF_PIT_PCSR_PRE(7) | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_DBG | MCF_PIT_PCSR_OVW;
MCF_PIT0_PMR = (uint16_t)reload;
MCF_PIT0_PCSR &= ~MCF_PIT_PCSR_OVW;
MCF_PIT0_PCSR |= MCF_PIT_PCSR_EN;
MCF_PIT1_PCSR = MCF_PIT_PCSR_PRE(7) | MCF_PIT_PCSR_OVW;
MCF_PIT1_PMR = 0xffff;
MCF_PIT1_PCSR |= MCF_PIT_PCSR_EN;
/*
MCF_PIT2_PCSR = MCF_PIT_PCSR_PRE(7) | MCF_PIT_PCSR_OVW;
MCF_PIT2_PMR = 0xffff;
MCF_PIT2_PCSR |= MCF_PIT_PCSR_EN;
*/
halBsTimerEnable();
}
void Init_OV7620_DMA()
{
MCF_GPIO_PTEPAR = 0;
MCF_GPIO_DDRTE = 0;
SCCB_Init();
SCCB_Bytewrite(0x42,0x14,0x24);
SCCB_Bytewrite(0x42,0x11,0x04);
MCF_DMA_DSR(0) |= MCF_DMA_DSR_DONE;//清空传输完成标志位
MCF_SCM_MPR = MCF_SCM_MPR_MPR(0x05);
MCF_SCM_DMAREQC = MCF_SCM_DMAREQC_DMAC0(0x04);//设定DMA0为DTIM0触发
MCF_DMA_SAR(0)=(uint32)0x40100030;//源地址为PTE
MCF_DMA_DAR(0)=(uint32)Image_Data[0];//目的地址为图像数组
MCF_DMA_BCR(0)=320;//传输长度为每行的长度，这里是320个像素
MCF_DMA_DCR(0)=MCF_DMA_DCR_INT//开启DMA中断
|MCF_DMA_DCR_SSIZE(1)
|MCF_DMA_DCR_DSIZE(1)//每次传输源地址和目的地址都为一字节
|MCF_DMA_DCR_DINC//每次传输之后源地址保持不变，目的地址加1
|MCF_DMA_DCR_D_REQ//每次传输结束之后关闭DMA外部请求
//|MCF_DMA_DCR_EEXT
|MCF_DMA_DCR_CS;//一次DMA请求传输一次
MCF_GPIO_PTCPAR|=MCF_GPIO_PTCPAR_DTIN0_DTIN0;//设定DTIN0端口的功能
MCF_DTIM0_DTMR=0;//重置STMR寄存器
MCF_DTIM0_DTMR=MCF_DTIM_DTMR_CE_RISE//捕捉上升沿
|MCF_DTIM_DTMR_CLK_DTIN;//时钟输入为DTIN
MCF_DTIM0_DTER|=MCF_DTIM_DTER_CAP;//边沿捕捉触发
MCF_DTIM0_DTXMR|=MCF_DTIM_DTXMR_DMAEN;//DMA请求使能
MCF_DTIM_DTMR(0) |= MCF_DTIM_DTMR_RST;//开启DTIM
MCF_INTC0_IMRL&=~MCF_INTC_IMRL_MASKALL;
MCF_INTC0_IMRL&=~MCF_INTC_IMRL_INT_MASK9;
MCF_INTC0_ICR09=MCF_INTC_ICR_IP(6)+MCF_INTC_ICR_IL(6);
EPORT_init();
}
void gpt_port_ta_init() {
program_mode = MODE_IDLE;
// Program Port TA Pin Assignment Register (PTCPAR) so pin 0 is configured for the GPT function.
MCF_GPIO_PTAPAR = MCF_GPIO_PTAPAR_PTAPAR0(MCF_GPIO_PTAPAR_ICOC0_ICOC0);
//Clear GPTIOS[IOS0] to enable channel 0 for input capture.
MCF_GPT_GPTIOS &= ~(MCF_GPT_GPTIOS_IOS0);
//Configure GPTCTL2[EDG0] to capture low-to-high signal changes, i.e., button presses.
MCF_GPT_GPTCTL2 |= MCF_GPT_GPTCTL2_INPUT0_RISING;
//Clear GPTDDR[DDRT0] so the channel 0 pin is an input pin.
MCF_GPT_GPTDDR &= ~(MCF_GPT_GPTDDR_DDRT0);
//Set GPTIE[C0I] to enable channel 0 interrupts.
MCF_GPT_GPTIE |= MCF_GPT_GPTIE_CI0;
//Set GPTSCR1[GPTEN] to enable the GPT.
MCF_GPT_GPTSCR1 |= MCF_GPT_GPTSCR1_GPTEN;
//Configure the INTC module appropriately to recognize interrupts from GPT channel 0
__VECTOR_RAM[64+44] = (uint32)gpt_isr;
//For interrupt source 44 write the level into ICR44[IL] and the priority to ICR44[IP]
MCF_INTC0_ICR44 |= MCF_INTC_ICR_IL(0x03) | MCF_INTC_ICR_IP(0x07);
MCF_INTC0_IMRH &= ~(0x01 << 12);
}
void TADCx_Init(){
MCF_GPIO_PANPAR = MCF_GPIO_PANPAR_AN0_AN0;// | MCF_GPIO_PANPAR_AN1_AN1 | MCF_GPIO_PANPAR_AN2_AN2;
/* 停止运行 全部为单端模式 顺序一次 扫描结束中断使能*/
MCF_ADC_CTRL1 = MCF_ADC_CTRL1_STOP0 | MCF_ADC_CTRL1_CHNCFG(0) | MCF_ADC_CTRL1_SMODE(0)|MCF_ADC_CTRL1_EOSIE0;
MCF_ADC_CTRL2 = MCF_ADC_CTRL2_DIV(7); // 配置ADC时钟频率 ADC时钟频率 = fsys/(2*(DIV+1)) = 80MHz/256 = 312.5kHz
MCF_ADC_ADZCC = 0; // 过零全部禁止
/* 通道设置 全部为默认对应引脚 */
MCF_ADC_ADLST1 = MCF_ADC_ADLST1_SAMPLE0(0) | MCF_ADC_ADLST1_SAMPLE1(1) | MCF_ADC_ADLST1_SAMPLE2(2) | MCF_ADC_ADLST1_SAMPLE3(3);
MCF_ADC_ADLST2 = MCF_ADC_ADLST2_SAMPLE4(4) | MCF_ADC_ADLST2_SAMPLE5(5) | MCF_ADC_ADLST2_SAMPLE6(6) | MCF_ADC_ADLST2_SAMPLE7(7);
MCF_ADC_ADSDIS &= ~(MCF_ADC_ADSDIS_DS0);// | MCF_ADC_ADSDIS_DS1 | MCF_ADC_ADSDIS_DS2);//使能AN0 AN1 AN2
MCF_ADC_ADSTAT = MCF_ADC_ADSTAT_EOSI0 | MCF_ADC_ADSTAT_EOSI1;
MCF_ADC_ADLSTAT = 0XFFFF; //全部设置为小于阀值
/* 上下限寄存器 */
MCF_ADC_ADLLMT(0) = MCF_ADC_ADLLMT_LLMT(0);
MCF_ADC_ADLLMT(1) = MCF_ADC_ADLLMT_LLMT(0);
MCF_ADC_ADLLMT(2) = MCF_ADC_ADLLMT_LLMT(0);
MCF_ADC_ADLLMT(3) = MCF_ADC_ADLLMT_LLMT(0);
MCF_ADC_ADLLMT(4) = MCF_ADC_ADLLMT_LLMT(0);
MCF_ADC_ADLLMT(5) = MCF_ADC_ADLLMT_LLMT(0);
MCF_ADC_ADLLMT(6) = MCF_ADC_ADLLMT_LLMT(0);
MCF_ADC_ADLLMT(7) = MCF_ADC_ADLLMT_LLMT(0);
MCF_ADC_ADHLMT(0) = MCF_ADC_ADHLMT_HLMT(0xFFFF);
MCF_ADC_ADHLMT(1) = MCF_ADC_ADHLMT_HLMT(0xFFFF);
MCF_ADC_ADHLMT(2) = MCF_ADC_ADHLMT_HLMT(0xFFFF);
MCF_ADC_ADHLMT(3) = MCF_ADC_ADHLMT_HLMT(0xFFFF);
MCF_ADC_ADHLMT(4) = MCF_ADC_ADHLMT_HLMT(0xFFFF);
MCF_ADC_ADHLMT(5) = MCF_ADC_ADHLMT_HLMT(0xFFFF);
MCF_ADC_ADHLMT(6) = MCF_ADC_ADHLMT_HLMT(0xFFFF);
MCF_ADC_ADHLMT(7) = MCF_ADC_ADHLMT_HLMT(0xFFFF);
/* 偏移量寄存器 */
MCF_ADC_ADOFS(0) = MCF_ADC_ADOFS_OFFSET(0);
MCF_ADC_ADOFS(1) = MCF_ADC_ADOFS_OFFSET(0);
MCF_ADC_ADOFS(2) = MCF_ADC_ADOFS_OFFSET(0);
MCF_ADC_ADOFS(3) = MCF_ADC_ADOFS_OFFSET(0);
MCF_ADC_ADOFS(4) = MCF_ADC_ADOFS_OFFSET(0);
MCF_ADC_ADOFS(5) = MCF_ADC_ADOFS_OFFSET(0);
MCF_ADC_ADOFS(6) = MCF_ADC_ADOFS_OFFSET(0);
MCF_ADC_ADOFS(7) = MCF_ADC_ADOFS_OFFSET(0);
MCF_ADC_ADZCSTAT = 0;//零点不改变标志位
// 禁止自动低功耗模式与自动掉电模式
MCF_ADC_POWER &= ~MCF_ADC_POWER_ASB;
MCF_ADC_POWER &= ~MCF_ADC_POWER_APD;
// 开启中断
MCF_INTC0_IMRH &= ~MCF_INTC_IMRH_INT_MASK49;
MCF_INTC0_IMRL &= ~MCF_INTC_IMRL_MASKALL;
MCF_INTC0_ICR49 = MCF_INTC_ICR_IP(5) + MCF_INTC_ICR_IL(3);
MCF_ADC_POWER &=~ MCF_ADC_POWER_PD0;
while(MCF_ADC_POWER & MCF_ADC_POWER_PSTS0){}
}
void pit0_init() {
// Clear the enable bit so we can configure the timer
MCF_PIT0_PCSR &= ~(MCF_PIT_PCSR_EN);
// Write a prescaler of 1 which generates an interrupt every 3ms seconds
MCF_PIT0_PCSR |= MCF_PIT_PCSR_PRE(0x05);
// Timer will stop when execution is halted by the debugger
MCF_PIT0_PCSR |= MCF_PIT_PCSR_DBG;
// Allow overwriting over the PIT counter
MCF_PIT0_PCSR |= MCF_PIT_PCSR_OVW;
// Enable interrupts from PIT0
MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIE;
// Clear interrupt flag by writing a 1
MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;
// When PCNTR0 reaches 0, it is reloaded
MCF_PIT0_PCSR |= MCF_PIT_PCSR_RLD;
// Write 0 into PIT Modulus register (which will reset it to 0xFFFF)
MCF_PIT0_PMR = MCF_PIT_PMR_PM(0);
// Interrupt Controller: PIT0 interrupts as level 4 priority 7 (Source 55)
MCF_INTC0_ICR55 |= MCF_INTC_ICR_IL(0x04);
MCF_INTC0_ICR55 |= MCF_INTC_ICR_IP(0x07);
// Unmask interrupts from the interrupt source
MCF_INTC0_IMRH &= ~(1 << (55 - 32));
// Write PIT0 ISR address into the exception vector table (at position 64+55)
__VECTOR_RAM[64+55] = (uint32)pit0_isr;
g_pit0_counter = 0;
// Enable timer
MCF_PIT0_PCSR |= MCF_PIT_PCSR_EN;
}
void __initialize_hardware(void)
{
/*******************************************************
* Out of reset, the low-level assembly code calls this
* routine to initialize the MCF52233 modules for the
* M52233DEMO board.
********************************************************/
asm
{
/* Initialize IPSBAR */
move.l #__IPSBAR,d0
andi.l #0xC0000000,d0 // need to mask
add.l #0x1,d0
move.l d0,0x40000000
/* Initialize FLASHBAR */
move.l #__FLASHBAR,d0
andi.l #0xFFF80000,d0 // need to mask
add.l #0x61,d0
movec d0,FLASHBAR
}
/*
* Allow interrupts from ABORT, SW1, SW2, and SW3 (IRQ[1,4,7,11])
*/
/* Enable IRQ signals on the port */
MCF_GPIO_PNQPAR = 0
| MCF_GPIO_PNQPAR_IRQ1_IRQ1
| MCF_GPIO_PNQPAR_IRQ4_IRQ4
| MCF_GPIO_PNQPAR_IRQ7_IRQ7;
MCF_GPIO_PGPPAR = 0
| MCF_GPIO_PGPPAR_IRQ11_IRQ11;
/* Set EPORT to look for rising edges */
MCF_EPORT0_EPPAR = 0
| MCF_EPORT_EPPAR_EPPA1_RISING
| MCF_EPORT_EPPAR_EPPA4_RISING
| MCF_EPORT_EPPAR_EPPA7_RISING;
MCF_EPORT1_EPPAR = 0
| MCF_EPORT_EPPAR_EPPA11_RISING;
/* Clear any currently triggered events on the EPORT */
MCF_EPORT0_EPIER = 0
| MCF_EPORT_EPIER_EPIE1
| MCF_EPORT_EPIER_EPIE4
| MCF_EPORT_EPIER_EPIE7;
MCF_EPORT1_EPIER = 0
| MCF_EPORT_EPIER_EPIE11;
/* Enable interrupts in the interrupt controller */
MCF_INTC0_IMRL &= ~(0
| MCF_INTC_IMRL_INT_MASK1
| MCF_INTC_IMRL_INT_MASK4
| MCF_INTC_IMRL_INT_MASK7
| MCF_INTC_IMRL_MASKALL);
MCF_INTC1_IMRH &= ~(0
| MCF_INTC_IMRH_INT_MASK35);
MCF_INTC1_ICR35 = MCF_INTC_ICR_IL(4);
MCF_GPIO_PDDPAR = 0x0F;
/* Set real time clock freq */
MCF_CLOCK_RTCDR = 25000000;
/* Set GPIO for UART0 */
MCF_GPIO_PUAPAR = 0
| MCF_GPIO_PUAPAR_URXD0_URXD0
| MCF_GPIO_PUAPAR_UTXD0_UTXD0;
wtm_init();
pll_init();
scm_init();
initialize_exceptions();
}
void uart1_init() {
// Initialize GPIO port UB (UB = UART1) pins 0 - 3 for primary function
MCF_GPIO_PUBPAR |= MCF_GPIO_PUBPAR_UTXD1_UTXD1;
MCF_GPIO_PUBPAR |= MCF_GPIO_PUBPAR_URXD1_URXD1;
MCF_GPIO_PUBPAR |= MCF_GPIO_PUBPAR_URTS1_URTS1;
MCF_GPIO_PUBPAR |= MCF_GPIO_PUBPAR_UCTS1_UCTS1;
// Reset Receiver in the Command Register (010)
MCF_UART1_UCR = MCF_UART_UCR_RESET_RX;
// Reset Transmitter in Command Register (011)
MCF_UART1_UCR = MCF_UART_UCR_RESET_TX;
// Reset mode pointer
MCF_UART1_UCR = MCF_UART_UCR_RESET_MR;
// Unmask RXRDY and TXRDY interrupts by setting TXRDY and RXRDY
MCF_UART1_UIMR |= MCF_UART_UIMR_TXRDY;
MCF_UART1_UIMR |= MCF_UART_UIMR_FFULL_RXRDY;
// Write UART1 ISR address into the exception vector table (at position 64+14)
__VECTOR_RAM[64+14] = (uint32)uart1_isr;
// Interrupt Controller: UART1 interrupts as level 5 priority 7 (Source 14)
MCF_INTC0_ICR14 |= MCF_INTC_ICR_IL(5);
MCF_INTC0_ICR14 |= MCF_INTC_ICR_IP(7);
// Clear interrupt source 14 (UART1)
//MCF_INTC0_IMRL &= ~(1 << (14));
MCF_INTC0_IMRL &= ~(MCF_INTC_IMRL_MASKALL| MCF_INTC_IMRL_INT_MASK14);
// Initialize input enable control
MCF_UART1_UACR = 0;
//MCF_UART1_UACR |= MCF_UART_UACR_IEC;
// Set receiver and transmitter clock sources to prescaled system clock
MCF_UART1_UCSR = 0 | MCF_UART_UCSR_RCS_SYS_CLK
| MCF_UART_UCSR_TCS_SYS_CLK;
// Configure baud divider. divider = f_sys / (32 * baud_rate)
//uint64_t divider = 80000000 / (32 * 9600); // ~260
//MCF_UART1_UBG1 = MCF_UART_UBG1_Divider_MSB(0x01);
//MCF_UART1_UBG2 = MCF_UART_UBG2_Divider_LSB(0x04);
MCF_UART1_UBG1 = 0x01;
MCF_UART1_UBG2 = 0x04;
// UMR1: UART Mode register 1
uint8_t umr1 = 0;
// Clear receiver RTS, not using hardware flow control
umr1 &= ~(MCF_UART_UMR_RXRTS);
// Clear recv interrupt select so interrupts will be generated when a character is recv'd
umr1 &= ~(MCF_UART_UMR_RXIRQ);
// Clear UMR1[ERR]
umr1 &= ~(MCF_UART_UMR_ERR);
/*// Set parity mode to 10, parity type to 0 for no parity
//umr1 |= MCF_UART_UMR_PM(2);
umr1 |= MCF_UART_UMR_PM_NONE;
umr1 &= ~(MCF_UART_UMR_PT);*/
// Set even parity
umr1 |= MCF_UART_UMR_PM_EVEN;
// Set bits per char to 11 for 8bits/char
umr1 |= MCF_UART_UMR_BC_8;
// Set umr1
MCF_UART1_UMR1 = umr1;
// UMR2: UART Mode register 2
// Set channel mode to 00 (normal)
MCF_UART1_UMR2 |= MCF_UART_UMR_CM_NORMAL;
// Clear transmitter RTS and CTS, not using hardware flow control
MCF_UART1_UMR2 &= ~(MCF_UART_UMR_TXRTS);
MCF_UART1_UMR2 &= ~(MCF_UART_UMR_TXCTS);
// Set stop bit length control to 0111 for 1 stop bit
MCF_UART1_UMR2 |= MCF_UART_UMR_SB_STOP_BITS_1;
// Map download variables
dl_map = (uint8_t**)malloc(8*sizeof(uint8_t*));
for(int i = 0; i < 8; i++) {
dl_map[i] = (uint8_t*)malloc(8*sizeof(uint8_t));
}
map_dl_pos_x = 0;
map_dl_pos_y = 0;
}
void UART_INIT(uint8 uartNo, int32 sysclk, int32 baud, uint8 intStatus)
{
register uint16 ubgs;
if(uartNo > 2)
{ //��������ͨ���Ŵ���2������2������
uartNo = 2;
}
//ʹ��UART�ӿڹ���
if(uartNo==0)
MCF_GPIO_PUAPAR=MCF_GPIO_PUAPAR_UTXD0_UTXD0
|MCF_GPIO_PUAPAR_URXD0_URXD0;
else if(uartNo==1)
MCF_GPIO_PUBPAR=MCF_GPIO_PUBPAR_UTXD1_UTXD1
|MCF_GPIO_PUBPAR_URXD1_URXD1;
else
MCF_GPIO_PUCPAR=MCF_GPIO_PUCPAR_UTXD2_UTXD2
|MCF_GPIO_PUCPAR_URXD2_URXD2;
//��λ�������ͷ������Լ�ģʽ�Ĵ���
MCF_UART_UCR(uartNo) = MCF_UART_UCR_RESET_TX; //�������
MCF_UART_UCR(uartNo) = MCF_UART_UCR_RESET_RX; //�������
MCF_UART_UCR(uartNo) = MCF_UART_UCR_RESET_MR; //��λģʽ�Ĵ���
//����UARTģʽ:����żУ�顢8λ���ݡ�����ͨ��ģʽ��1ֹͣλ
MCF_UART_UMR(uartNo) = (0
| MCF_UART_UMR_PM_NONE
| MCF_UART_UMR_BC_8 );
MCF_UART_UMR(uartNo) = (0
| MCF_UART_UMR_CM_NORMAL
| MCF_UART_UMR_SB_STOP_BITS_1);
//ѡ��Ԥ��Ƶ����ڲ�����ʱ����Ϊ�շ�����ʱ��Դ
MCF_UART_UCSR(uartNo) = (0
|MCF_UART_UCSR_RCS_SYS_CLK
|MCF_UART_UCSR_TCS_SYS_CLK);
//�������е�UART�ж�
MCF_UART_UIMR(uartNo) = 0;
//���㲨���ʲ�����:UBG = fsys/(������*32)
ubgs = (uint16)(sysclk/(baud * 32));
MCF_UART_UBG1(uartNo) = (uint8)((ubgs & 0xFF00) >> 8);
MCF_UART_UBG2(uartNo) = (uint8) (ubgs & 0x00FF);
//ʹ�ܽ������ͷ�����
MCF_UART_UCR(uartNo) = (0
| MCF_UART_UCR_RX_ENABLED
| MCF_UART_UCR_TX_ENABLED);
//�����Ƿ�UARTx�����ж�
if(1 == intStatus)
{ //�����н����ж�
MCF_UART_UIMR(uartNo) = 0x02;
if(uartNo==0)
{
MCF_INTC0_IMRL&=~MCF_INTC_IMRL_MASKALL; //ʹ�����ж�
MCF_INTC0_IMRL&=~MCF_INTC_IMRL_INT_MASK13; //ʹ��UART0�ж�
MCF_INTC0_ICR13=MCF_INTC_ICR_IP(6)+MCF_INTC_ICR_IL(2); //�����ж����ȼ�
}
else if(uartNo==1)
{
MCF_INTC0_IMRL&=~MCF_INTC_IMRL_MASKALL; //ʹ�����ж�
MCF_INTC0_IMRL&=~MCF_INTC_IMRL_INT_MASK14; //ʹ��UART1�ж�
MCF_INTC0_ICR14=MCF_INTC_ICR_IP(5)+MCF_INTC_ICR_IL(2); //�����ж����ȼ�
}
else
{
MCF_INTC0_IMRL&=~MCF_INTC_IMRL_MASKALL; //ʹ�����ж�
MCF_INTC0_IMRL&=~MCF_INTC_IMRL_INT_MASK15; //ʹ��UART2�ж�
MCF_INTC0_ICR15=MCF_INTC_ICR_IP(4)+MCF_INTC_ICR_IL(2); //�����ж����ȼ�
}
}
else
{ //�����н����ж�
MCF_UART_UIMR(uartNo) = 0x00;
if(uartNo==0)
{
MCF_INTC0_IMRL|=MCF_INTC_IMRL_INT_MASK13; //��ֹUART0�ж�
}
else if(uartNo==1)
{
MCF_INTC0_IMRL|=MCF_INTC_IMRL_INT_MASK14; //��ֹUART1�ж�
}
else
{
MCF_INTC0_IMRL|=MCF_INTC_IMRL_INT_MASK15; //��ֹUART2�ж�
}
}
}
