void ROM_SpeedChanged()
{
u32 b, a;
if (SNES_FastROM)
{
bprintf("Fast ROM\n");
for (b = 0x80; b < 0xC0; b++)
for (a = 0x8000; a < 0x10000; a += 0x2000)
MEM_PTR(b, a) &= ~MPTR_SLOW;
for (b = 0xC0; b < 0x100; b++)
for (a = 0x0000; a < 0x10000; a += 0x2000)
MEM_PTR(b, a) &= ~MPTR_SLOW;
}
else
{
bprintf("Slow ROM\n");
for (b = 0x80; b < 0xC0; b++)
for (a = 0x8000; a < 0x10000; a += 0x2000)
MEM_PTR(b, a) |= MPTR_SLOW;
for (b = 0xC0; b < 0x100; b++)
for (a = 0x0000; a < 0x10000; a += 0x2000)
MEM_PTR(b, a) |= MPTR_SLOW;
}
}
void *calloc(size_t nmemb, size_t size)
{
struct log_malloc_s *mem;
sig_atomic_t memuse;
sig_atomic_t memruse = 0;
size_t calloc_size = 0;
if(!DL_RESOLVE_CHECK(calloc))
return NULL;
calloc_size = (nmemb * size); //FIXME: what about check for overflow here ?
if((mem = real_calloc(1, calloc_size + MEM_OFF)) != NULL)
{
mem->size = calloc_size;
mem->cb = ~mem->size;
memuse = __sync_add_and_fetch(&g_ctx.mem_used, mem->size);
#ifdef HAVE_MALLOC_USABLE_SIZE
mem->rsize = malloc_usable_size(mem);
memruse = __sync_add_and_fetch(&g_ctx.mem_rused, mem->rsize);
#endif
}
#ifndef DISABLE_CALL_COUNTS
(void)__sync_fetch_and_add(&g_ctx.stat.calloc, 1);
g_ctx.stat.unrel_sum++;
#endif
if(!g_ctx.memlog_disabled)
{
int s;
char buf[LOG_BUFSIZE];
//getrusage(RUSAGE_SELF, &ruse);
s = snprintf(buf, sizeof(buf), "+ calloc %zu %p [%u:%u] (%zu %zu)\n",
nmemb * size, MEM_PTR(mem),
memuse, memruse,
nmemb, size);
log_trace(buf, s, sizeof(buf), 1);
}
return MEM_PTR(mem);
}
extern "C" void* wrap(realloc)(void* p, size_t sz)
{
init_lib();
fibjs::MemPool& mp = fibjs::MemPool::global();
if (p == 0)
{
void* p1 = __real_malloc(FULL_SIZE(sz));
if (p1) {
memset(p1, 0, STUB_SIZE);
mp.add(p1, sz);
}
return MEM_PTR(p1);
}
if (sz == 0)
{
void* p1 = STUB_PTR(p);
if (p1)
mp.remove(p1);
__real_free(p1);
return 0;
}
void* p1 = STUB_PTR(p);
mp.remove(p1);
void* p2 = __real_realloc(p1, FULL_SIZE(sz));
if (p2) {
memset(p2, 0, STUB_SIZE);
mp.add(p2, sz);
}
else
mp.add(p1);
return MEM_PTR(p2);
}
void* operator new[] (size_t sz)
{
void* p1 = je_malloc(FULL_SIZE(sz));
if (p1) {
memset(p1, 0, STUB_SIZE);
fibjs::MemPool::global().add(p1, sz);
}
return MEM_PTR(p1);
}
extern "C" void* wrap(malloc)(size_t sz)
{
void* p1 = je_malloc(FULL_SIZE(sz));
if (p1) {
memset(p1, 0, STUB_SIZE);
fibjs::MemPool::global().add(p1, sz);
}
return MEM_PTR(p1);
}
void *memalign(size_t boundary, size_t size)
{
struct log_malloc_s *mem;
sig_atomic_t memuse;
sig_atomic_t memruse = 0;
if(!DL_RESOLVE_CHECK(memalign))
return NULL;
if(boundary > MEM_OFF)
return NULL;
if((mem = real_memalign(boundary, size + MEM_OFF)) != NULL)
{
mem->size = size;
mem->cb = ~mem->size;
memuse = __sync_add_and_fetch(&g_ctx.mem_used, mem->size);
#ifdef HAVE_MALLOC_USABLE_SIZE
mem->rsize = malloc_usable_size(mem);
memruse = __sync_add_and_fetch(&g_ctx.mem_rused, mem->rsize);
#endif
}
#ifndef DISABLE_CALL_COUNTS
(void)__sync_fetch_and_add(&g_ctx.stat.memalign, 1);
g_ctx.stat.unrel_sum++;
#endif
if(!g_ctx.memlog_disabled)
{
int s;
char buf[LOG_BUFSIZE];
s = snprintf(buf, sizeof(buf), "+ memalign %zu %p (%zu) [%u:%u]\n",
size, MEM_PTR(mem),
boundary,
memuse, memruse);
log_trace(buf, s, sizeof(buf), 1);
}
return MEM_PTR(mem);
}
void* operator new (size_t sz)
{
init_lib();
void* p1 = __real_malloc(FULL_SIZE(sz));
if (p1) {
memset(p1, 0, STUB_SIZE);
fibjs::MemPool::global().add(p1, sz);
}
return MEM_PTR(p1);
}
void free(void *ptr)
{
int foreign;
sig_atomic_t memuse;
sig_atomic_t memruse = 0;
size_t rsize = 0;
struct log_malloc_s *mem = MEM_HEAD(ptr);
if(!DL_RESOLVE_CHECK(free) || ptr == NULL)
return;
/* check if we allocated it */
foreign = (mem->size != ~mem->cb);
memuse = __sync_sub_and_fetch(&g_ctx.mem_used, (foreign) ? 0: mem->size);
#ifdef HAVE_MALLOC_USABLE_SIZE
memruse = __sync_sub_and_fetch(&g_ctx.mem_rused, (foreign) ? 0 : mem->rsize);
if(foreign)
rsize = malloc_usable_size(ptr);
#endif
#ifndef DISABLE_CALL_COUNTS
(void)__sync_fetch_and_add(&g_ctx.stat.free, 1);
g_ctx.stat.unrel_sum++;
#endif
if(!g_ctx.memlog_disabled)
{
int s;
char buf[LOG_BUFSIZE];
//getrusage(RUSAGE_SELF, &ruse);
if(!foreign)
{
s = snprintf(buf, sizeof(buf), "+ free -%zu %p [%u:%u]\n",
mem->size, MEM_PTR(mem),
memuse, memruse);
}
else
{
s = snprintf(buf, sizeof(buf), "+ free -%zu %p [%u:%u] !f\n",
rsize, ptr,
memuse, memruse);
}
log_trace(buf, s, sizeof(buf), foreign);
}
real_free((foreign) ? ptr : mem);
return;
}
int posix_memalign(void **memptr, size_t alignment, size_t size)
{
int ret = 0;
struct log_malloc_s *mem = NULL;
sig_atomic_t memuse;
sig_atomic_t memruse = 0;
if(!DL_RESOLVE_CHECK(posix_memalign))
return ENOMEM;
if(alignment > MEM_OFF)
return ENOMEM;
if((ret = real_posix_memalign((void **)&mem, alignment, size + MEM_OFF)) == 0)
{
mem->size = size;
mem->cb = ~mem->size;
memuse = __sync_add_and_fetch(&g_ctx.mem_used, mem->size);
#ifdef HAVE_MALLOC_USABLE_SIZE
mem->rsize = malloc_usable_size(mem);
memruse = __sync_add_and_fetch(&g_ctx.mem_rused, mem->rsize);
#endif
}
#ifndef DISABLE_CALL_COUNTS
(void)__sync_fetch_and_add(&g_ctx.stat.posix_memalign, 1);
g_ctx.stat.unrel_sum++;
#endif
if(!g_ctx.memlog_disabled)
{
int s;
char buf[LOG_BUFSIZE];
s = snprintf(buf, sizeof(buf), "+ posix_memalign %zu %p (%zu %zu : %d) [%u:%u]\n",
size, MEM_PTR(mem),
alignment, size, ret,
memuse, memruse);
log_trace(buf, s, sizeof(buf), 1);
}
return ret;
}
void *realloc(void *ptr, size_t size)
{
struct log_malloc_s *mem;
sig_atomic_t memuse = 0;
sig_atomic_t memruse = 0;
sig_atomic_t memchange = 0;
#ifdef HAVE_MALLOC_USABLE_SIZE
size_t rsize = 0;
sig_atomic_t memrchange = 0;
#endif
if(!DL_RESOLVE_CHECK(realloc))
return NULL;
mem = (ptr != NULL) ? MEM_HEAD(ptr) : NULL;
//FIXME: not handling foreign memory here (seems not needed)
if(mem && (mem->size != ~mem->cb))
{
assert(mem->size != ~mem->cb);
return NULL;
}
if((mem = real_realloc(mem, size + MEM_OFF)) != NULL)
{
memchange = (ptr) ? size - mem->size : size;
memuse = __sync_add_and_fetch(&g_ctx.mem_used, memchange);
#ifdef HAVE_MALLOC_USABLE_SIZE
rsize = malloc_usable_size(mem);
memrchange = (ptr) ? rsize - mem->rsize : rsize;
memruse = __sync_add_and_fetch(&g_ctx.mem_rused, memrchange);
#endif
}
#ifndef DISABLE_CALL_COUNTS
(void)__sync_fetch_and_add(&g_ctx.stat.realloc, 1);
g_ctx.stat.unrel_sum++;
#endif
if(!g_ctx.memlog_disabled)
{
int s;
char buf[LOG_BUFSIZE];
s = snprintf(buf, sizeof(buf), "+ realloc %d %p %p (%zu %zu) [%u:%u]\n",
memchange, ptr,
MEM_PTR(mem), (mem ? mem->size : 0), size,
memuse, memruse);
log_trace(buf, s, sizeof(buf), 1);
}
/* now we can update */
if(mem != NULL)
{
mem->size = size;
mem->cb = ~mem->size;
#ifdef HAVE_MALLOC_USABLE_SIZE
mem->rsize = rsize;
#endif
}
return MEM_PTR(mem);
}
void ROM_MapBank(u32 bank, u8* ptr)
{
u32 hi_slow = SNES_FastROM ? 0 : MPTR_SLOW;
if (SNES_HiROM)
{
for (; bank < 0x80; bank += ROM_NumBanks)
{
if (bank < 0x7E)
{
MEM_PTR(bank, 0x0000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x0000];
MEM_PTR(bank, 0x2000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x2000];
MEM_PTR(bank, 0x4000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x4000];
MEM_PTR(bank, 0x6000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x6000];
MEM_PTR(bank, 0x8000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x8000];
MEM_PTR(bank, 0xA000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0xA000];
MEM_PTR(bank, 0xC000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0xC000];
MEM_PTR(bank, 0xE000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0xE000];
}
MEM_PTR(0x80 + bank, 0x0000) = hi_slow | MPTR_READONLY | (u32)&ptr[0x0000];
MEM_PTR(0x80 + bank, 0x2000) = hi_slow | MPTR_READONLY | (u32)&ptr[0x2000];
MEM_PTR(0x80 + bank, 0x4000) = hi_slow | MPTR_READONLY | (u32)&ptr[0x4000];
MEM_PTR(0x80 + bank, 0x6000) = hi_slow | MPTR_READONLY | (u32)&ptr[0x6000];
MEM_PTR(0x80 + bank, 0x8000) = hi_slow | MPTR_READONLY | (u32)&ptr[0x8000];
MEM_PTR(0x80 + bank, 0xA000) = hi_slow | MPTR_READONLY | (u32)&ptr[0xA000];
MEM_PTR(0x80 + bank, 0xC000) = hi_slow | MPTR_READONLY | (u32)&ptr[0xC000];
MEM_PTR(0x80 + bank, 0xE000) = hi_slow | MPTR_READONLY | (u32)&ptr[0xE000];
MEM_PTR(bank - 0x40, 0x8000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x8000];
MEM_PTR(bank - 0x40, 0xA000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0xA000];
MEM_PTR(bank - 0x40, 0xC000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0xC000];
MEM_PTR(bank - 0x40, 0xE000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0xE000];
MEM_PTR(0x40 + bank, 0x8000) = hi_slow | MPTR_READONLY | (u32)&ptr[0x8000];
MEM_PTR(0x40 + bank, 0xA000) = hi_slow | MPTR_READONLY | (u32)&ptr[0xA000];
MEM_PTR(0x40 + bank, 0xC000) = hi_slow | MPTR_READONLY | (u32)&ptr[0xC000];
MEM_PTR(0x40 + bank, 0xE000) = hi_slow | MPTR_READONLY | (u32)&ptr[0xE000];
}
}
else
{
for (; bank < 0x80; bank += ROM_NumBanks)
{
if (bank >= 0x40 && bank < 0x70)
{
MEM_PTR(bank, 0x0000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x0000];
MEM_PTR(bank, 0x2000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x2000];
MEM_PTR(bank, 0x4000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x4000];
MEM_PTR(bank, 0x6000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x6000];
MEM_PTR(0x80 + bank, 0x0000) = hi_slow | MPTR_READONLY | (u32)&ptr[0x0000];
MEM_PTR(0x80 + bank, 0x2000) = hi_slow | MPTR_READONLY | (u32)&ptr[0x2000];
MEM_PTR(0x80 + bank, 0x4000) = hi_slow | MPTR_READONLY | (u32)&ptr[0x4000];
MEM_PTR(0x80 + bank, 0x6000) = hi_slow | MPTR_READONLY | (u32)&ptr[0x6000];
}
if (bank < 0x7E)
{
MEM_PTR(bank, 0x8000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x0000];
MEM_PTR(bank, 0xA000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x2000];
MEM_PTR(bank, 0xC000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x4000];
MEM_PTR(bank, 0xE000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x6000];
}
MEM_PTR(0x80 + bank, 0x8000) = hi_slow | MPTR_READONLY | (u32)&ptr[0x0000];
MEM_PTR(0x80 + bank, 0xA000) = hi_slow | MPTR_READONLY | (u32)&ptr[0x2000];
MEM_PTR(0x80 + bank, 0xC000) = hi_slow | MPTR_READONLY | (u32)&ptr[0x4000];
MEM_PTR(0x80 + bank, 0xE000) = hi_slow | MPTR_READONLY | (u32)&ptr[0x6000];
}
}
ROM_ApplySpeedHacks(bank, ptr);
}
void Mem_Reset()
{
u32 i, a, b;
for (i = 0; i < (128 * 1024); i += 4)
*(u32*)&Mem_SysRAM[i] = 0x55555555; // idk about this
//fseek(ROM_File, ROM_BaseOffset, SEEK_SET);
//fread(ROM_Bank0, 0x8000, 1, ROM_File);
if (!ROM_CacheInited)
{
for (i = 0; i < 32 + 3; i++)
ROM_Cache[i] = 0;
ROM_CacheInited = 0;
}
for (i = 0; i < 32 + 3; i++)
ROM_CacheBank[i] = -1;
ROM_CacheIndex = 0;
for (i = 0; i < 0x200; i++)
ROM_CacheMisses[i] = 0;
if (Mem_SRAM) free(Mem_SRAM);
Mem_SRAM = malloc(Mem_SRAMMask + 1);
for (i = 0; i <= Mem_SRAMMask; i += 4)
*(u32*)&Mem_SRAM[i] = 0;
Mem_SRAMFile = fopen(Mem_SRAMPath, "r");
if (Mem_SRAMFile)
{
fread(Mem_SRAM, Mem_SRAMMask+1, 1, Mem_SRAMFile);
fclose(Mem_SRAMFile);
Mem_SRAMFile = NULL;
}
Mem_Status = &_Mem_PtrTable[0];
Mem_PtrTable = &_Mem_PtrTable[MEMSTATUS_SIZE >> 2];
Mem_Status->SRAMDirty = 0;
Mem_Status->HVBFlags = 0x00;
for (b = 0; b < 0x40; b++)
{
MEM_PTR(b, 0x0000) = MEM_PTR(0x80 + b, 0x0000) = MPTR_SLOW | (u32)&Mem_SysRAM[0];
MEM_PTR(b, 0x2000) = MEM_PTR(0x80 + b, 0x2000) = MPTR_SPECIAL;
MEM_PTR(b, 0x4000) = MEM_PTR(0x80 + b, 0x4000) = MPTR_SPECIAL;
if (Mem_HiROM)
MEM_PTR(b, 0x6000) = MEM_PTR(0x80 + b, 0x6000) = MPTR_SLOW | MPTR_SRAM | (u32)&Mem_SRAM[(b << 13) & Mem_SRAMMask];
else
MEM_PTR(b, 0x6000) = MEM_PTR(0x80 + b, 0x6000) = MPTR_SLOW | MPTR_SPECIAL;
}
//for (a = 0; a < 0x8000; a += 0x2000)
// MEM_PTR(0, 0x8000 + a) = MEM_PTR(0x80, 0x8000 + a) = MPTR_SLOW | MPTR_READONLY | (u32)&ROM_Bank0[a];
for (b = 1; b < 0x40; b++)
{
u32 offset = Mem_HiROM ? (0x8000 + (b << 16)) : (b << 15);
for (a = 0; a < 0x8000; a += 0x2000)
MEM_PTR(b, 0x8000 + a) = MEM_PTR(0x80 + b, 0x8000 + a) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + offset + a);
}
if (Mem_HiROM)
{
for (b = 0; b < 0x3E; b++)
for (a = 0; a < 0x10000; a += 0x2000)
MEM_PTR(0x40 + b, a) = MEM_PTR(0xC0 + b, a) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + (b << 16) + a);
for (b = 0; b < 0x02; b++)
for (a = 0; a < 0x10000; a += 0x2000)
MEM_PTR(0x7E + b, a) = MPTR_SLOW | (u32)&Mem_SysRAM[(b << 16) + a];
for (b = 0; b < 0x02; b++)
for (a = 0; a < 0x10000; a += 0x2000)
MEM_PTR(0xFE + b, a) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + 0x3E0000 + (b << 16) + a);
}
else
{
for (b = 0; b < 0x30; b++)
for (a = 0; a < 0x10000; a += 0x2000)
MEM_PTR(0x40 + b, a) = MEM_PTR(0xC0 + b, a) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + 0x200000 + (b << 15) + (a & 0x7FFF));
for (b = 0; b < 0x0E; b++)
for (a = 0; a < 0x8000; a += 0x2000)
MEM_PTR(0x70 + b, a) = MEM_PTR(0xF0 + b, a) = MPTR_SLOW | MPTR_SRAM | (u32)&Mem_SRAM[((b << 15) + a) & Mem_SRAMMask];
for (b = 0; b < 0x02; b++)
for (a = 0; a < 0x10000; a += 0x2000)
MEM_PTR(0x7E + b, a) = MEM_PTR(0xFE + b, a) = MPTR_SLOW | (u32)&Mem_SysRAM[(b << 16) + a];
}
for (i = 0; i < 32; i++)
{
u32 fofs = Mem_HiROM ? (i << 16) : (i << 15);
if (fofs >= ROM_FileSize - ROM_BaseOffset)
break;
_ROM_DoCacheBank(i, 0, true);
}
ROM_Bank0 = ROM_Cache[0];
ROM_Bank0End = Mem_HiROM ? (ROM_Bank0 + 0x10000) : (ROM_Bank0 + 0x8000);
ROM_ApplySpeedHacks();
ROM_FileOffset = -1;
iprintf("sysram = %08X\n", &Mem_SysRAM[0]);
// get uncached address
u32 ipcsize = (sizeof(IPCStruct) + 0x1F) & ~0x1F;
IPC = memalign(32, ipcsize);
DC_InvalidateRange(IPC, ipcsize);
IPC = memUncached(IPC);
iprintf("IPC struct = %08X\n", IPC);
fifoSendValue32(FIFO_USER_01, 3);
fifoSendAddress(FIFO_USER_01, IPC);
Mem_HVBJOY = 0x00;
Mem_MulA = 0;
Mem_MulRes = 0;
Mem_DivA = 0;
Mem_DivRes = 0;
PPU_Reset();
}
void _ROM_DoCacheBank(int bank, int type, bool force)
{
u8 idx;
bank &= 0x7F;
if (Mem_HiROM && bank < 0x40) bank += 0x40;
if (bank >= (Mem_HiROM ? 0x60 : 0x20))
{
if (type == 1) idx = ROMCACHE_SIZE;
else if (type == 2) idx = ROMCACHE_SIZE + 1;
else if (type == 3) idx = ROMCACHE_SIZE + 2;
else return;
}
else if (force)
idx = Mem_HiROM ? (bank - 0x40) : bank;
else
return;
int oldbank = ROM_CacheBank[idx];
if (oldbank == bank)
return;
if (oldbank != -1)
ROM_DoUncacheBank(oldbank);
ROM_CacheBank[idx] = bank;
if (!ROM_Cache[idx])
ROM_Cache[idx] = malloc(Mem_HiROM ? 0x10000 : 0x8000);
ROM_FileOffset = -1;
u8* ptr = ROM_Cache[idx];
u32 base = ROM_BaseOffset;
if (Mem_HiROM)
{
fseek(ROM_File, base + ((bank - 0x40) << 16), SEEK_SET);
fread(ptr, 0x10000, 1, ROM_File);
if (bank < 0x7E)
{
MEM_PTR(bank, 0x0000) = MEM_PTR(0x80 + bank, 0x0000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x0000];
MEM_PTR(bank, 0x2000) = MEM_PTR(0x80 + bank, 0x2000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x2000];
MEM_PTR(bank, 0x4000) = MEM_PTR(0x80 + bank, 0x4000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x4000];
MEM_PTR(bank, 0x6000) = MEM_PTR(0x80 + bank, 0x6000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x6000];
MEM_PTR(bank, 0x8000) = MEM_PTR(0x80 + bank, 0x8000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x8000];
MEM_PTR(bank, 0xA000) = MEM_PTR(0x80 + bank, 0xA000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0xA000];
MEM_PTR(bank, 0xC000) = MEM_PTR(0x80 + bank, 0xC000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0xC000];
MEM_PTR(bank, 0xE000) = MEM_PTR(0x80 + bank, 0xE000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0xE000];
}
else
{
MEM_PTR(0x80 + bank, 0x0000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x0000];
MEM_PTR(0x80 + bank, 0x2000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x2000];
MEM_PTR(0x80 + bank, 0x4000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x4000];
MEM_PTR(0x80 + bank, 0x6000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x6000];
MEM_PTR(0x80 + bank, 0x8000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x8000];
MEM_PTR(0x80 + bank, 0xA000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0xA000];
MEM_PTR(0x80 + bank, 0xC000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0xC000];
MEM_PTR(0x80 + bank, 0xE000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0xE000];
}
MEM_PTR(bank - 0x40, 0x8000) = MEM_PTR(0x40 + bank, 0x8000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x8000];
MEM_PTR(bank - 0x40, 0xA000) = MEM_PTR(0x40 + bank, 0xA000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0xA000];
MEM_PTR(bank - 0x40, 0xC000) = MEM_PTR(0x40 + bank, 0xC000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0xC000];
MEM_PTR(bank - 0x40, 0xE000) = MEM_PTR(0x40 + bank, 0xE000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0xE000];
}
else
{
if (bank < 0x7E)
{
fseek(ROM_File, base + (bank << 15), SEEK_SET);
fread(ptr, 0x8000, 1, ROM_File);
if (bank >= 0x40 && bank < 0x70)
{
MEM_PTR(bank, 0x0000) = MEM_PTR(0x80 + bank, 0x0000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x0000];
MEM_PTR(bank, 0x2000) = MEM_PTR(0x80 + bank, 0x2000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x2000];
MEM_PTR(bank, 0x4000) = MEM_PTR(0x80 + bank, 0x4000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x4000];
MEM_PTR(bank, 0x6000) = MEM_PTR(0x80 + bank, 0x6000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x6000];
}
MEM_PTR(bank, 0x8000) = MEM_PTR(0x80 + bank, 0x8000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x0000];
MEM_PTR(bank, 0xA000) = MEM_PTR(0x80 + bank, 0xA000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x2000];
MEM_PTR(bank, 0xC000) = MEM_PTR(0x80 + bank, 0xC000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x4000];
MEM_PTR(bank, 0xE000) = MEM_PTR(0x80 + bank, 0xE000) = MPTR_SLOW | MPTR_READONLY | (u32)&ptr[0x6000];
}
}
//idx++;
//idx &= 7;
//if (idx >= ROMCACHE_SIZE) idx = 0;
//ROM_CacheIndex = idx;
}
void ROM_DoUncacheBank(int bank)
{
bank &= 0x7F;
if (Mem_HiROM && bank < 0x40) bank += 0x40;
if (Mem_HiROM)
{
u32 b = (bank - 0x40) << 16;
if (bank < 0x7E)
{
MEM_PTR(bank, 0x0000) = MEM_PTR(0x80 + bank, 0x0000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + b + 0x0000);
MEM_PTR(bank, 0x2000) = MEM_PTR(0x80 + bank, 0x2000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + b + 0x2000);
MEM_PTR(bank, 0x4000) = MEM_PTR(0x80 + bank, 0x4000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + b + 0x4000);
MEM_PTR(bank, 0x6000) = MEM_PTR(0x80 + bank, 0x6000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + b + 0x6000);
MEM_PTR(bank, 0x8000) = MEM_PTR(0x80 + bank, 0x8000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + b + 0x8000);
MEM_PTR(bank, 0xA000) = MEM_PTR(0x80 + bank, 0xA000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + b + 0xA000);
MEM_PTR(bank, 0xC000) = MEM_PTR(0x80 + bank, 0xC000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + b + 0xC000);
MEM_PTR(bank, 0xE000) = MEM_PTR(0x80 + bank, 0xE000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + b + 0xE000);
}
else
{
MEM_PTR(0x80 + bank, 0x0000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + b + 0x0000);
MEM_PTR(0x80 + bank, 0x2000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + b + 0x2000);
MEM_PTR(0x80 + bank, 0x4000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + b + 0x4000);
MEM_PTR(0x80 + bank, 0x6000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + b + 0x6000);
MEM_PTR(0x80 + bank, 0x8000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + b + 0x8000);
MEM_PTR(0x80 + bank, 0xA000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + b + 0xA000);
MEM_PTR(0x80 + bank, 0xC000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + b + 0xC000);
MEM_PTR(0x80 + bank, 0xE000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + b + 0xE000);
}
MEM_PTR(bank - 0x40, 0x8000) = MEM_PTR(0x40 + bank, 0x8000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + b + 0x8000);
MEM_PTR(bank - 0x40, 0xA000) = MEM_PTR(0x40 + bank, 0xA000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + b + 0xA000);
MEM_PTR(bank - 0x40, 0xC000) = MEM_PTR(0x40 + bank, 0xC000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + b + 0xC000);
MEM_PTR(bank - 0x40, 0xE000) = MEM_PTR(0x40 + bank, 0xE000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + b + 0xE000);
}
else
{
if (bank < 0x7E)
{
if (bank >= 0x40 && bank < 0x70)
{
MEM_PTR(bank, 0x0000) = MEM_PTR(0x80 + bank, 0x0000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + (bank << 15) + 0x0000);
MEM_PTR(bank, 0x2000) = MEM_PTR(0x80 + bank, 0x2000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + (bank << 15) + 0x2000);
MEM_PTR(bank, 0x4000) = MEM_PTR(0x80 + bank, 0x4000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + (bank << 15) + 0x4000);
MEM_PTR(bank, 0x6000) = MEM_PTR(0x80 + bank, 0x6000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + (bank << 15) + 0x6000);
}
MEM_PTR(bank, 0x8000) = MEM_PTR(0x80 + bank, 0x8000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + (bank << 15) + 0x0000);
MEM_PTR(bank, 0xA000) = MEM_PTR(0x80 + bank, 0xA000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + (bank << 15) + 0x2000);
MEM_PTR(bank, 0xC000) = MEM_PTR(0x80 + bank, 0xC000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + (bank << 15) + 0x4000);
MEM_PTR(bank, 0xE000) = MEM_PTR(0x80 + bank, 0xE000) = MPTR_SLOW | MPTR_SPECIAL | MPTR_READONLY | (ROM_BaseOffset + (bank << 15) + 0x6000);
}
}
}