///////////////////////////////////////////////////////////////////////////// //! Initializes IIC driver //! \param[in] mode currently only mode 0 supported //! \return < 0 if initialisation failed ///////////////////////////////////////////////////////////////////////////// s32 MIOS32_IIC_Init(u32 mode) { int i; // currently only mode 0 supported if( mode != 0 ) return -1; // unsupported mode for(i=0; i<MIOS32_IIC_NUM; ++i) { // configure I2C peripheral MIOS32_IIC_InitPeripheral(i); // now accessible for other tasks iic_rec[i].iic_semaphore = 0; iic_rec[i].last_transfer_error = 0; } /* Install interrupt handlers */ MIOS32_IRQ_Install(I2C0_IRQn, MIOS32_IRQ_IIC_EV_PRIORITY); #if MIOS32_IIC_NUM >= 2 MIOS32_IRQ_Install(I2C1_IRQn, MIOS32_IRQ_IIC_EV_PRIORITY); #endif #if MIOS32_IIC_NUM >= 3 MIOS32_IRQ_Install(I2C2_IRQn, MIOS32_IRQ_IIC_EV_PRIORITY); #endif return 0; // no error }
///////////////////////////////////////////////////////////////////////////// //! Initialize a timer //! \param[in] timer (0..2)<BR> //! Timer allocation on STM32: 0=TIM2, 1=TIM3, 2=TIM5 //! \param[in] period in uS accuracy (1..65536) //! \param[in] _irq_handler (function name) //! \param[in] irq_priority: one of these values: //! <UL> //! <LI>MIOS32_IRQ_PRIO_LOW // lower than RTOS //! <LI>MIOS32_IRQ_PRIO_MID // higher than RTOS //! <LI>MIOS32_IRQ_PRIO_HIGH // same like SRIO, AIN, etc... //! <LI>MIOS32_IRQ_PRIO_HIGHEST // higher than SRIO, AIN, etc... //! </UL> //! //! Example:<BR> //! \code //! // initialize timer for 1000 uS (= 1 mS) period //! MIOS32_TIMER_Init(0, 1000, MyTimer, MIOS32_IRQ_PRIO_MID); //! \endcode //! this will call following function periodically: //! \code //! void MyTimer(void) //! { //! // your code //! } //! \endcode //! \return 0 if initialisation passed //! \return -1 if invalid timer number //! \return -2 if invalid period ///////////////////////////////////////////////////////////////////////////// s32 MIOS32_TIMER_Init(u8 timer, u32 period, void *_irq_handler, u8 irq_priority) { // check if valid timer if( timer >= NUM_TIMERS ) return -1; // invalid timer selected // check if valid period if( period < 1 || period >= 65537 ) return -2; // enable timer clock if( rcc[timer] == RCC_APB2Periph_TIM1 || rcc[timer] == RCC_APB2Periph_TIM8 ) RCC_APB2PeriphClockCmd(rcc[timer], ENABLE); else RCC_APB1PeriphClockCmd(rcc[timer], ENABLE); // disable interrupt (if active from previous configuration) TIM_ITConfig(timer_base[timer], TIM_IT_Update, DISABLE); // copy callback function timer_callback[timer] = _irq_handler; // time base configuration TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; TIM_TimeBaseStructure.TIM_Period = period-1; TIM_TimeBaseStructure.TIM_Prescaler = (TIM_PERIPHERAL_FRQ/1000000)-1; // for 1 uS accuracy TIM_TimeBaseStructure.TIM_ClockDivision = 0; TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; TIM_TimeBaseInit(timer_base[timer], &TIM_TimeBaseStructure); // enable interrupt TIM_ITConfig(timer_base[timer], TIM_IT_Update, ENABLE); // enable counter TIM_Cmd(timer_base[timer], ENABLE); // enable global interrupt MIOS32_IRQ_Install(timer_irq_chn[timer], irq_priority); return 0; // no error }
///////////////////////////////////////////////////////////////////////////// //! Initializes UART interfaces //! \param[in] mode currently only mode 0 supported //! \return < 0 if initialisation failed //! \note Applications shouldn't call this function directly, instead please use \ref MIOS32_COM or \ref MIOS32_MIDI layer functions ///////////////////////////////////////////////////////////////////////////// s32 MIOS32_UART_Init(u32 mode) { // currently only mode 0 supported if( mode != 0 ) return -1; // unsupported mode #if NUM_SUPPORTED_UARTS == 0 return -1; // no UARTs #else // map UART pins #if MIOS32_UART0_ASSIGNMENT != 0 MIOS32_UART0_REMAP_FUNC; #endif #if NUM_SUPPORTED_UARTS >= 2 && MIOS32_UART1_ASSIGNMENT != 0 MIOS32_UART1_REMAP_FUNC; #endif #if NUM_SUPPORTED_UARTS >= 3 && MIOS32_UART2_ASSIGNMENT != 0 MIOS32_UART2_REMAP_FUNC; #endif #if NUM_SUPPORTED_UARTS >= 4 && MIOS32_UART2_ASSIGNMENT != 0 MIOS32_UART3_REMAP_FUNC; #endif // enable all USART clocks // TODO: more generic approach for different UART selections RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_USART6, ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2 | RCC_APB1Periph_USART3 | RCC_APB1Periph_UART4 | RCC_APB1Periph_UART5, ENABLE); // initialize UARTs and clear buffers { u8 uart; for(uart=0; uart<NUM_SUPPORTED_UARTS; ++uart) { rx_buffer_tail[uart] = rx_buffer_head[uart] = rx_buffer_size[uart] = 0; tx_buffer_tail[uart] = tx_buffer_head[uart] = tx_buffer_size[uart] = 0; MIOS32_UART_InitPortDefault(uart); } } // configure and enable UART interrupts #if MIOS32_UART0_ASSIGNMENT != 0 MIOS32_IRQ_Install(MIOS32_UART0_IRQ_CHANNEL, MIOS32_IRQ_UART_PRIORITY); USART_ITConfig(MIOS32_UART0, USART_IT_RXNE, ENABLE); #endif #if NUM_SUPPORTED_UARTS >= 2 && MIOS32_UART1_ASSIGNMENT != 0 MIOS32_IRQ_Install(MIOS32_UART1_IRQ_CHANNEL, MIOS32_IRQ_UART_PRIORITY); USART_ITConfig(MIOS32_UART1, USART_IT_RXNE, ENABLE); #endif #if NUM_SUPPORTED_UARTS >= 3 && MIOS32_UART2_ASSIGNMENT != 0 MIOS32_IRQ_Install(MIOS32_UART2_TX_IRQ_CHANNEL, MIOS32_IRQ_UART_PRIORITY); MIOS32_IRQ_Install(MIOS32_UART2_RX_IRQ_CHANNEL, MIOS32_IRQ_UART_PRIORITY); USART_ITConfig(MIOS32_UART2_RX, USART_IT_RXNE, ENABLE); #endif #if NUM_SUPPORTED_UARTS >= 4 && MIOS32_UART3_ASSIGNMENT != 0 MIOS32_IRQ_Install(MIOS32_UART3_IRQ_CHANNEL, MIOS32_IRQ_UART_PRIORITY); USART_ITConfig(MIOS32_UART3, USART_IT_RXNE, ENABLE); #endif // enable UARTs #if MIOS32_UART0_ASSIGNMENT != 0 USART_Cmd(MIOS32_UART0, ENABLE); #endif #if NUM_SUPPORTED_UARTS >= 2 && MIOS32_UART1_ASSIGNMENT != 0 USART_Cmd(MIOS32_UART1, ENABLE); #endif #if NUM_SUPPORTED_UARTS >= 3 && MIOS32_UART2_ASSIGNMENT != 0 USART_Cmd(MIOS32_UART2_RX, ENABLE); USART_Cmd(MIOS32_UART2_TX, ENABLE); #endif #if NUM_SUPPORTED_UARTS >= 4 && MIOS32_UART3_ASSIGNMENT != 0 USART_Cmd(MIOS32_UART3, ENABLE); #endif return 0; // no error #endif }
///////////////////////////////////////////////////////////////////////////// //! Initializes UART interfaces //! \param[in] mode currently only mode 0 supported //! \return < 0 if initialisation failed //! \note Applications shouldn't call this function directly, instead please use \ref MIOS32_COM or \ref MIOS32_MIDI layer functions ///////////////////////////////////////////////////////////////////////////// s32 MIOS32_UART_Init(u32 mode) { // currently only mode 0 supported if( mode != 0 ) return -1; // unsupported mode #if MIOS32_UART_NUM == 0 return -1; // no UARTs #else // configure UART pins #if MIOS32_UART0_ASSIGNMENT != 0 MIOS32_UART0_TX_INIT; MIOS32_UART0_RX_INIT; #endif #if MIOS32_UART_NUM >= 2 && MIOS32_UART1_ASSIGNMENT != 0 MIOS32_UART1_TX_INIT; MIOS32_UART1_RX_INIT; #endif #if MIOS32_UART_NUM >= 3 && MIOS32_UART2_ASSIGNMENT != 0 MIOS32_UART2_TX_INIT; MIOS32_UART2_RX_INIT; #endif #if MIOS32_UART_NUM >= 4 && MIOS32_UART3_ASSIGNMENT != 0 MIOS32_UART3_TX_INIT; MIOS32_UART3_RX_INIT; #endif // clear buffer counters int i; for(i=0; i<MIOS32_UART_NUM; ++i) { rx_buffer_tail[i] = rx_buffer_head[i] = rx_buffer_size[i] = 0; tx_buffer_tail[i] = tx_buffer_head[i] = tx_buffer_size[i] = 0; } // UART configuration #if MIOS32_UART0_ASSIGNMENT != 0 MIOS32_UART_BaudrateSet(0, MIOS32_UART0_BAUDRATE); #endif #if MIOS32_UART_NUM >=2 && MIOS32_UART1_ASSIGNMENT != 0 MIOS32_UART_BaudrateSet(1, MIOS32_UART1_BAUDRATE); #endif #if MIOS32_UART_NUM >=3 && MIOS32_UART2_ASSIGNMENT != 0 MIOS32_UART_BaudrateSet(2, MIOS32_UART2_BAUDRATE); #endif #if MIOS32_UART_NUM >=4 && MIOS32_UART3_ASSIGNMENT != 0 MIOS32_UART_BaudrateSet(3, MIOS32_UART3_BAUDRATE); #endif // configure and enable UART interrupts #if MIOS32_UART0_ASSIGNMENT != 0 MIOS32_UART0->IER = (1 << 1) | (1 << 0); // enable RBR and THRE (receive/transmit buffer) interrupt MIOS32_IRQ_Install(MIOS32_UART0_IRQ_CHANNEL, MIOS32_IRQ_UART_PRIORITY); #endif #if MIOS32_UART_NUM >= 2 && MIOS32_UART1_ASSIGNMENT != 0 MIOS32_UART1->IER = (1 << 1) | (1 << 0); // enable RBR and THRE (receive/transmit buffer) interrupt MIOS32_IRQ_Install(MIOS32_UART1_IRQ_CHANNEL, MIOS32_IRQ_UART_PRIORITY); #endif #if MIOS32_UART_NUM >= 3 && MIOS32_UART2_ASSIGNMENT != 0 MIOS32_UART2->IER = (1 << 1) | (1 << 0); // enable RBR and THRE (receive/transmit buffer) interrupt MIOS32_IRQ_Install(MIOS32_UART2_IRQ_CHANNEL, MIOS32_IRQ_UART_PRIORITY); #endif #if MIOS32_UART_NUM >= 4 && MIOS32_UART2_ASSIGNMENT != 0 MIOS32_UART3->IER = (1 << 1) | (1 << 0); // enable RBR and THRE (receive/transmit buffer) interrupt MIOS32_IRQ_Install(MIOS32_UART3_IRQ_CHANNEL, MIOS32_IRQ_UART_PRIORITY); #endif return 0; // no error #endif }
///////////////////////////////////////////////////////////////////////////// //! Initializes SPI pins //! \param[in] mode currently only mode 0 supported //! \return < 0 if initialisation failed ///////////////////////////////////////////////////////////////////////////// s32 MIOS32_SPI_Init(u32 mode) { // currently only mode 0 supported if( mode != 0 ) return -1; // unsupported mode DMA_InitTypeDef DMA_InitStructure; DMA_StructInit(&DMA_InitStructure); /////////////////////////////////////////////////////////////////////////// // SPI0 /////////////////////////////////////////////////////////////////////////// #ifndef MIOS32_DONT_USE_SPI0 // disable callback function spi_callback[0] = NULL; // set RC pin(s) to 1 MIOS32_SPI_RC_PinSet(0, 0, 1); // spi, rc_pin, pin_value MIOS32_SPI_RC_PinSet(0, 1, 1); // spi, rc_pin, pin_value // IO configuration MIOS32_SPI_IO_Init(0, MIOS32_SPI_PIN_DRIVER_WEAK_OD); // enable SPI peripheral clock (APB2 == high speed) RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE); // enable DMA1 clock RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); // DMA Configuration for SPI Rx Event DMA_Cmd(MIOS32_SPI0_DMA_RX_PTR, DISABLE); DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)&MIOS32_SPI0_PTR->DR; DMA_InitStructure.DMA_MemoryBaseAddr = 0; // will be configured later DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; DMA_InitStructure.DMA_BufferSize = 0; // will be configured later DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; DMA_Init(MIOS32_SPI0_DMA_RX_PTR, &DMA_InitStructure); // DMA Configuration for SPI Tx Event // (partly re-using previous DMA setup) DMA_Cmd(MIOS32_SPI0_DMA_TX_PTR, DISABLE); DMA_InitStructure.DMA_MemoryBaseAddr = 0; // will be configured later DMA_InitStructure.DMA_BufferSize = 0; // will be configured later DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_Init(MIOS32_SPI0_DMA_TX_PTR, &DMA_InitStructure); // enable SPI SPI_Cmd(MIOS32_SPI0_PTR, ENABLE); // enable SPI interrupts to DMA SPI_I2S_DMACmd(MIOS32_SPI0_PTR, SPI_I2S_DMAReq_Tx | SPI_I2S_DMAReq_Rx, ENABLE); // Configure DMA interrupt MIOS32_IRQ_Install(MIOS32_SPI0_DMA_IRQ_CHANNEL, MIOS32_IRQ_SPI_DMA_PRIORITY); // initial SPI peripheral configuration MIOS32_SPI_TransferModeInit(0, MIOS32_SPI_MODE_CLK1_PHASE1, MIOS32_SPI_PRESCALER_128); #endif /* MIOS32_DONT_USE_SPI0 */ /////////////////////////////////////////////////////////////////////////// // SPI1 /////////////////////////////////////////////////////////////////////////// #ifndef MIOS32_DONT_USE_SPI1 // disable callback function spi_callback[1] = NULL; // set RC pin(s) to 1 MIOS32_SPI_RC_PinSet(1, 0, 1); // spi, rc_pin, pin_value MIOS32_SPI_RC_PinSet(1, 1, 1); // spi, rc_pin, pin_value // IO configuration MIOS32_SPI_IO_Init(1, MIOS32_SPI_PIN_DRIVER_WEAK_OD); // enable SPI peripheral clock (APB1 == slow speed) RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE); // enable DMA1 clock RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); // DMA Configuration for SPI Rx Event DMA_Cmd(MIOS32_SPI1_DMA_RX_PTR, DISABLE); DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)&MIOS32_SPI1_PTR->DR; DMA_InitStructure.DMA_MemoryBaseAddr = 0; // will be configured later DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; DMA_InitStructure.DMA_BufferSize = 0; // will be configured later DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; DMA_Init(MIOS32_SPI1_DMA_RX_PTR, &DMA_InitStructure); // DMA Configuration for SPI Tx Event // (partly re-using previous DMA setup) DMA_Cmd(MIOS32_SPI1_DMA_TX_PTR, DISABLE); DMA_InitStructure.DMA_MemoryBaseAddr = 0; // will be configured later DMA_InitStructure.DMA_BufferSize = 0; // will be configured later DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_Init(MIOS32_SPI1_DMA_TX_PTR, &DMA_InitStructure); // enable SPI SPI_Cmd(MIOS32_SPI1_PTR, ENABLE); // enable SPI interrupts to DMA SPI_I2S_DMACmd(MIOS32_SPI1_PTR, SPI_I2S_DMAReq_Tx | SPI_I2S_DMAReq_Rx, ENABLE); // Configure DMA interrupt MIOS32_IRQ_Install(MIOS32_SPI1_DMA_IRQ_CHANNEL, MIOS32_IRQ_SPI_DMA_PRIORITY); // initial SPI peripheral configuration MIOS32_SPI_TransferModeInit(1, MIOS32_SPI_MODE_CLK1_PHASE1, MIOS32_SPI_PRESCALER_128); #endif /* MIOS32_DONT_USE_SPI1 */ /////////////////////////////////////////////////////////////////////////// // SPI2 (software emulated) /////////////////////////////////////////////////////////////////////////// #ifndef MIOS32_DONT_USE_SPI2 // disable callback function spi_callback[2] = NULL; // set RC pin(s) to 1 MIOS32_SPI_RC_PinSet(2, 0, 1); // spi, rc_pin, pin_value MIOS32_SPI_RC_PinSet(2, 1, 1); // spi, rc_pin, pin_value // IO configuration MIOS32_SPI_IO_Init(2, MIOS32_SPI_PIN_DRIVER_WEAK_OD); // initial SPI peripheral configuration MIOS32_SPI_TransferModeInit(2, MIOS32_SPI_MODE_CLK1_PHASE1, MIOS32_SPI_PRESCALER_128); #endif /* MIOS32_DONT_USE_SPI2 */ return 0; // no error }