tBootModule *Multiboot_LoadModules(tMBoot_Info *MBInfo, tVAddr MapOffset, int *ModuleCount)
{
if( !(MBInfo->Flags & (1 << 3)) ) {
*ModuleCount = 0;
Log_Log("Arch", "No multiboot module information passed");
return NULL;
}
tMBoot_Module *mods = (void*)( MBInfo->Modules + MapOffset );
*ModuleCount = MBInfo->ModuleCount;
tBootModule *ret = malloc( MBInfo->ModuleCount * sizeof(*ret) );
for( int i = 0; i < MBInfo->ModuleCount; i ++ )
{
int ofs;
Log_Log("Arch", "Multiboot Module at 0x%08x, 0x%08x bytes (String at 0x%08x)",
mods[i].Start, mods[i].End-mods[i].Start, mods[i].String);
ret[i].PBase = mods[i].Start;
ret[i].Size = mods[i].End - mods[i].Start;
// Always HW map the module data
ofs = mods[i].Start&0xFFF;
ret[i].Base = (void*)( (tVAddr)MM_MapHWPages(mods[i].Start, (ret[i].Size+ofs+0xFFF) / 0x1000)
+ ofs );
// Assumes the string is < 4096 bytes long)
ret[i].ArgString = (char*)MM_MapHWPages(mods[i].String, 2) + (mods[i].String&0xFFF);
}
return ret;
}
// === CODE ===
void PL050_Init(Uint32 KeyboardBase, Uint8 KeyboardIRQ, Uint32 MouseBase, Uint8 MouseIRQ)
{
if( KeyboardBase ) {
LOG("KeyboardBase = 0x%x", KeyboardBase);
gpPL050_KeyboardBase = (void*)MM_MapHWPages(KeyboardBase, 1);
LOG("gpPL050_KeyboardBase = %p", gpPL050_KeyboardBase);
IRQ_AddHandler(KeyboardIRQ, PL050_KeyboardHandler, NULL);
gpPL050_KeyboardBase[0] = 0x10;
}
if( MouseBase ) {
gpPL050_MouseBase = (void*)MM_MapHWPages(MouseBase, 1);
IRQ_AddHandler(MouseIRQ, PL050_MouseHandler, NULL);
gpPL050_MouseBase[0] = 0x10;
}
}
// === CODE ===
int GIC_Install(char **Arguments)
{
// Initialise
Log_Debug("GIC", "Dist: %P, Interface: %P",
gGIC_DistributorAddr, gGIC_InterfaceAddr);
gpGIC_InterfaceBase = (void*)MM_MapHWPages(gGIC_InterfaceAddr, 1);
LOG("gpGIC_InterfaceBase = %p", gpGIC_InterfaceBase);
gpGIC_DistributorBase = (void*)MM_MapHWPages(gGIC_DistributorAddr, 1);
LOG("gpGIC_DistributorBase = %p", gpGIC_DistributorBase);
gpGIC_InterfaceBase[GICC_CTLR] = 0; // Disable CPU interaface
LOG("GICC_IAR = %x (CTLR=0)", gpGIC_InterfaceBase[GICC_IAR]);
gpGIC_InterfaceBase[GICC_PMR] = 0xFF; // Effectively disable prioritories
gpGIC_InterfaceBase[GICC_CTLR] = 1; // Enable CPU
gpGIC_DistributorBase[GICD_CTLR] = 1; // Enable Distributor
gpIRQHandler = GIC_IRQHandler;
__asm__ __volatile__ ("cpsie if"); // Enable IRQs and FIQs
#if 0
for( int i = 0; i < N_IRQS/32; i ++ ) {
Log_Debug("GIC", "GICD_ISENABLER%i %x = %08x",
i, GICD_ISENABLER0 + i,
gpGIC_DistributorBase[GICD_ISENABLER0+i]);
gpGIC_DistributorBase[GICD_ISENABLER0+i] = 0;
}
#endif
#if 0
// Testing - First 32 actual interrupts enabled
gpGIC_DistributorBase[GICD_ISENABLER0+1] = 0xFFFFFFFF;
for( int i = 0; i < 32/4; i ++ )
gpGIC_DistributorBase[GICD_ITARGETSR0+8+i] = 0x01010101;
#endif
// Clear out pending IRQs.
gpGIC_InterfaceBase[GICC_EOIR] = gpGIC_InterfaceBase[GICC_IAR];
return MODULE_ERR_OK;
}
