void
bb_deduplicate_op_il_seq_points (MonoCompile *cfg, MonoBasicBlock *bb)
{
MonoInst *ins, *n, *prev;
MONO_BB_FOR_EACH_INS_SAFE (bb, n, ins) {
if (ins->opcode != OP_IL_SEQ_POINT)
continue;
prev = mono_inst_prev (ins, FILTER_NOP);
if (!prev || ins == prev || prev->opcode != OP_IL_SEQ_POINT)
continue;
MONO_REMOVE_INS (bb, prev);
};
}
void
mono_if_conversion (MonoCompile *cfg)
{
#ifdef MONO_ARCH_HAVE_CMOV_OPS
MonoBasicBlock *bb;
gboolean changed = FALSE;
if (!(cfg->opt & MONO_OPT_CMOV))
return;
// FIXME: Make this work with extended bblocks
/*
* This pass requires somewhat optimized IR code so it should be run after
* local cprop/deadce. Also, it should be run before dominator computation, since
* it changes control flow.
*/
for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
MonoBasicBlock *bb1, *bb2;
restart:
/* Look for the IR code generated from cond ? a : b
* which is:
* BB:
* b<cond> [BB1BB2]
* BB1:
* <var> <- <a>
* br BB3
* BB2:
* <var> <- <b>
* br BB3
*/
if (!(bb->out_count == 2 && !bb->extended))
continue;
bb1 = bb->out_bb [0];
bb2 = bb->out_bb [1];
if (bb1->in_count == 1 && bb2->in_count == 1 && bb1->out_count == 1 && bb2->out_count == 1 && bb1->out_bb [0] == bb2->out_bb [0]) {
MonoInst *compare, *branch, *ins1, *ins2, *cmov, *move, *tmp;
MonoBasicBlock *true_bb, *false_bb;
gboolean simple, ret;
int dreg, tmp_reg;
CompType comp_type;
if (bb->last_ins && (bb->last_ins->opcode == OP_BR_REG || bb->last_ins->opcode == OP_BR))
continue;
/* Find the compare instruction */
if (!bb->last_ins || !bb->last_ins->prev)
continue;
branch = bb->last_ins;
compare = branch->prev;
if (!MONO_IS_COND_BRANCH_OP (branch))
/* This can happen if a cond branch is optimized away */
continue;
true_bb = branch->inst_true_bb;
false_bb = branch->inst_false_bb;
/*
* Check that bb1 and bb2 are 'simple' and both assign to the same
* variable.
*/
/* FIXME: Get rid of the nops earlier */
ins1 = true_bb->code;
while (ins1 && ins1->opcode == OP_NOP)
ins1 = ins1->next;
ins2 = false_bb->code;
while (ins2 && ins2->opcode == OP_NOP)
ins2 = ins2->next;
if (!(ins1 && ins2 && ins1->dreg == ins2->dreg && ins1->dreg != -1))
continue;
simple = TRUE;
for (tmp = ins1->next; tmp; tmp = tmp->next)
if (!((tmp->opcode == OP_NOP) || (tmp->opcode == OP_BR)))
simple = FALSE;
for (tmp = ins2->next; tmp; tmp = tmp->next)
if (!((tmp->opcode == OP_NOP) || (tmp->opcode == OP_BR)))
simple = FALSE;
if (!simple)
continue;
/* We move ins1/ins2 before the compare so they should have no side effect */
if (!(MONO_INS_HAS_NO_SIDE_EFFECT (ins1) && MONO_INS_HAS_NO_SIDE_EFFECT (ins2)))
continue;
/* Moving ins1/ins2 could change the comparison */
/* FIXME: */
if (!((compare->sreg1 != ins1->dreg) && (compare->sreg2 != ins1->dreg)))
continue;
/* FIXME: */
comp_type = mono_opcode_to_type (branch->opcode, compare->opcode);
if (!((comp_type == CMP_TYPE_I) || (comp_type == CMP_TYPE_L)))
continue;
/* FIXME: */
/* ins->type might not be set */
if (INS_INFO (ins1->opcode) [MONO_INST_DEST] != 'i')
continue;
if (cfg->verbose_level > 2) {
printf ("\tBranch -> CMove optimization in BB%d on\n", bb->block_num);
printf ("\t\t"); mono_print_ins (compare);
printf ("\t\t"); mono_print_ins (compare->next);
printf ("\t\t"); mono_print_ins (ins1);
printf ("\t\t"); mono_print_ins (ins2);
}
changed = TRUE;
//printf ("HIT!\n");
/* Assignments to the return register must remain at the end of bbs */
if (cfg->ret)
ret = ins1->dreg == cfg->ret->dreg;
else
ret = FALSE;
tmp_reg = mono_alloc_dreg (cfg, STACK_I4);
dreg = ins1->dreg;
/* Rewrite ins1 to emit to tmp_reg */
ins1->dreg = tmp_reg;
if (ret) {
dreg = mono_alloc_dreg (cfg, STACK_I4);
ins2->dreg = dreg;
}
/* Remove ins1/ins2 from bb1/bb2 */
MONO_REMOVE_INS (true_bb, ins1);
MONO_REMOVE_INS (false_bb, ins2);
/* Move ins1 and ins2 before the comparison */
/* ins1 comes first to avoid ins1 overwriting an argument of ins2 */
mono_bblock_insert_before_ins (bb, compare, ins2);
mono_bblock_insert_before_ins (bb, ins2, ins1);
/* Add cmov instruction */
MONO_INST_NEW (cfg, cmov, OP_NOP);
cmov->dreg = dreg;
cmov->sreg1 = dreg;
cmov->sreg2 = tmp_reg;
switch (mono_opcode_to_type (branch->opcode, compare->opcode)) {
case CMP_TYPE_I:
cmov->opcode = int_cmov_opcodes [mono_opcode_to_cond (branch->opcode)];
break;
case CMP_TYPE_L:
cmov->opcode = long_cmov_opcodes [mono_opcode_to_cond (branch->opcode)];
break;
default:
g_assert_not_reached ();
}
mono_bblock_insert_after_ins (bb, compare, cmov);
if (ret) {
/* Add an extra move */
MONO_INST_NEW (cfg, move, OP_MOVE);
move->dreg = cfg->ret->dreg;
move->sreg1 = dreg;
mono_bblock_insert_after_ins (bb, cmov, move);
}
/* Rewrite the branch */
branch->opcode = OP_BR;
branch->inst_target_bb = true_bb->out_bb [0];
mono_link_bblock (cfg, bb, branch->inst_target_bb);
/* Reorder bblocks */
mono_unlink_bblock (cfg, bb, true_bb);
mono_unlink_bblock (cfg, bb, false_bb);
mono_unlink_bblock (cfg, true_bb, true_bb->out_bb [0]);
mono_unlink_bblock (cfg, false_bb, false_bb->out_bb [0]);
mono_remove_bblock (cfg, true_bb);
mono_remove_bblock (cfg, false_bb);
/* Merge bb and its successor if possible */
if ((bb->out_bb [0]->in_count == 1) && (bb->out_bb [0] != cfg->bb_exit) &&
(bb->region == bb->out_bb [0]->region)) {
mono_merge_basic_blocks (cfg, bb, bb->out_bb [0]);
goto restart;
}
}
/* Look for the IR code generated from if (cond) <var> <- <a>
* which is:
* BB:
* b<cond> [BB1BB2]
* BB1:
* <var> <- <a>
* br BB2
*/
if ((bb2->in_count == 1 && bb2->out_count == 1 && bb2->out_bb [0] == bb1) ||
(bb1->in_count == 1 && bb1->out_count == 1 && bb1->out_bb [0] == bb2)) {
MonoInst *compare, *branch, *ins1, *cmov, *tmp;
gboolean simple;
int dreg, tmp_reg;
CompType comp_type;
CompRelation cond;
MonoBasicBlock *next_bb, *code_bb;
/* code_bb is the bblock containing code, next_bb is the successor bblock */
if (bb2->in_count == 1 && bb2->out_count == 1 && bb2->out_bb [0] == bb1) {
code_bb = bb2;
next_bb = bb1;
} else {
code_bb = bb1;
next_bb = bb2;
}
ins1 = code_bb->code;
if (!ins1)
continue;
/* Check that code_bb is simple */
simple = TRUE;
for (tmp = ins1->next; tmp; tmp = tmp->next)
if (!((tmp->opcode == OP_NOP) || (tmp->opcode == OP_BR)))
simple = FALSE;
if (!simple)
continue;
/* We move ins1 before the compare so it should have no side effect */
if (!MONO_INS_HAS_NO_SIDE_EFFECT (ins1))
continue;
if (bb->last_ins && bb->last_ins->opcode == OP_BR_REG)
continue;
/* Find the compare instruction */
if (!bb->last_ins || !bb->last_ins->prev)
continue;
branch = bb->last_ins;
compare = branch->prev;
if (!MONO_IS_COND_BRANCH_OP (branch))
/* This can happen if a cond branch is optimized away */
continue;
/* FIXME: */
comp_type = mono_opcode_to_type (branch->opcode, compare->opcode);
if (!((comp_type == CMP_TYPE_I) || (comp_type == CMP_TYPE_L)))
continue;
/* FIXME: */
/* ins->type might not be set */
if (INS_INFO (ins1->opcode) [MONO_INST_DEST] != 'i')
continue;
/* FIXME: */
if (cfg->ret && ins1->dreg == cfg->ret->dreg)
continue;
if (!(cfg->opt & MONO_OPT_DEADCE))
/*
* It is possible that dreg is never set before, so we can't use
* it as an sreg of the cmov instruction (#582322).
*/
continue;
if (cfg->verbose_level > 2) {
printf ("\tBranch -> CMove optimization (2) in BB%d on\n", bb->block_num);
printf ("\t\t"); mono_print_ins (compare);
printf ("\t\t"); mono_print_ins (compare->next);
printf ("\t\t"); mono_print_ins (ins1);
}
changed = TRUE;
//printf ("HIT!\n");
tmp_reg = mono_alloc_dreg (cfg, STACK_I4);
dreg = ins1->dreg;
/* Rewrite ins1 to emit to tmp_reg */
ins1->dreg = tmp_reg;
/* Remove ins1 from code_bb */
MONO_REMOVE_INS (code_bb, ins1);
/* Move ins1 before the comparison */
mono_bblock_insert_before_ins (bb, compare, ins1);
/* Add cmov instruction */
MONO_INST_NEW (cfg, cmov, OP_NOP);
cmov->dreg = dreg;
cmov->sreg1 = dreg;
cmov->sreg2 = tmp_reg;
cond = mono_opcode_to_cond (branch->opcode);
if (branch->inst_false_bb == code_bb)
cond = mono_negate_cond (cond);
switch (mono_opcode_to_type (branch->opcode, compare->opcode)) {
case CMP_TYPE_I:
cmov->opcode = int_cmov_opcodes [cond];
break;
case CMP_TYPE_L:
cmov->opcode = long_cmov_opcodes [cond];
break;
default:
g_assert_not_reached ();
}
mono_bblock_insert_after_ins (bb, compare, cmov);
/* Rewrite the branch */
branch->opcode = OP_BR;
branch->inst_target_bb = next_bb;
mono_link_bblock (cfg, bb, branch->inst_target_bb);
/* Nullify the branch at the end of code_bb */
if (code_bb->code) {
branch = code_bb->code;
MONO_DELETE_INS (code_bb, branch);
}
/* Reorder bblocks */
mono_unlink_bblock (cfg, bb, code_bb);
mono_unlink_bblock (cfg, code_bb, next_bb);
/* Merge bb and its successor if possible */
if ((bb->out_bb [0]->in_count == 1) && (bb->out_bb [0] != cfg->bb_exit) &&
(bb->region == bb->out_bb [0]->region)) {
mono_merge_basic_blocks (cfg, bb, bb->out_bb [0]);
/*
* bbn might have fallen through to the next bb without a branch,
* have to add one now (#474718).
* FIXME: Maybe need to do this more generally in
* merge_basic_blocks () ?
*/
if (!(bb->last_ins && MONO_IS_BRANCH_OP (bb->last_ins)) && bb->out_count) {
MONO_INST_NEW (cfg, ins1, OP_BR);
ins1->inst_target_bb = bb->out_bb [0];
MONO_ADD_INS (bb, ins1);
}
goto restart;
}
}
}
/*
* Optimize checks like: if (v < 0 || v > limit) by changing then to unsigned
* compares. This isn't really if conversion, but it easier to do here than in
* optimize_branches () since the IR is already optimized.
*/
for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
MonoBasicBlock *bb1, *bb2, *true_bb, *false_bb, *next_bb;
MonoInst *branch1, *branch2, *compare1, *ins;
/* Look for the IR code generated from if (<var> < 0 || v > <limit>)
* after branch opts which is:
* BB:
* icompare_imm R [0]
* int_blt [BB1BB2]
* BB2:
* icompare_imm R [<limit>]
* int_ble [BB3BB1]
*/
if (!(bb->out_count == 2 && !bb->extended))
continue;
bb1 = bb->out_bb [0];
bb2 = bb->out_bb [1];
// FIXME: Add more cases
/* Check structure */
if (!(bb1->in_count == 2 && bb1->in_bb [0] == bb && bb1->in_bb [1] == bb2 && bb2->in_count == 1 && bb2->out_count == 2))
continue;
next_bb = bb2;
/* Check first branch */
branch1 = bb->last_ins;
if (!(branch1 && ((branch1->opcode == OP_IBLT) || (branch1->opcode == OP_LBLT)) && (branch1->inst_false_bb == next_bb)))
continue;
true_bb = branch1->inst_true_bb;
/* Check second branch */
branch2 = next_bb->last_ins;
if (!branch2)
continue;
/* mcs sometimes generates inverted branches */
if (((branch2->opcode == OP_IBGT) || (branch2->opcode == OP_LBGT)) && branch2->inst_true_bb == branch1->inst_true_bb)
false_bb = branch2->inst_false_bb;
else if (((branch2->opcode == OP_IBLE) || (branch2->opcode == OP_LBLE)) && branch2->inst_false_bb == branch1->inst_true_bb)
false_bb = branch2->inst_true_bb;
else
continue;
/* Check first compare */
compare1 = bb->last_ins->prev;
if (!(compare1 && ((compare1->opcode == OP_ICOMPARE_IMM) || (compare1->opcode == OP_LCOMPARE_IMM)) && compare1->inst_imm == 0))
continue;
/* Check second bblock */
ins = next_bb->code;
if (!ins)
continue;
if (((ins->opcode == OP_ICOMPARE_IMM) || (ins->opcode == OP_LCOMPARE_IMM)) && ins->sreg1 == compare1->sreg1 && ins->next == branch2) {
/* The second arg must be positive */
if (ins->inst_imm < 0)
continue;
} else if (((ins->opcode == OP_LDLEN) || (ins->opcode == OP_STRLEN)) && ins->dreg != compare1->sreg1 && ins->next && ins->next->opcode == OP_ICOMPARE && ins->next->sreg1 == compare1->sreg1 && ins->next->sreg2 == ins->dreg && ins->next->next == branch2) {
/* Another common case: if (index < 0 || index > arr.Length) */
} else {
continue;
}
if (cfg->verbose_level > 2) {
printf ("\tSigned->unsigned compare optimization in BB%d on\n", bb->block_num);
printf ("\t\t"); mono_print_ins (compare1);
printf ("\t\t"); mono_print_ins (compare1->next);
printf ("\t\t"); mono_print_ins (ins);
}
/* Rewrite the first compare+branch */
MONO_DELETE_INS (bb, compare1);
branch1->opcode = OP_BR;
mono_unlink_bblock (cfg, bb, branch1->inst_true_bb);
mono_unlink_bblock (cfg, bb, branch1->inst_false_bb);
branch1->inst_target_bb = next_bb;
mono_link_bblock (cfg, bb, next_bb);
/* Rewrite the second branch */
branch2->opcode = br_to_br_un (branch2->opcode);
mono_merge_basic_blocks (cfg, bb, next_bb);
}
#if 0
for (bb = cfg->bb_entry; bb; bb = bb->next_bb) {
MonoBasicBlock *bb1, *bb2;
MonoInst *prev, *compare, *branch, *ins1, *ins2, *cmov, *move, *tmp;
gboolean simple, ret;
int dreg, tmp_reg;
CompType comp_type;
/* Look for the IR code generated from if (cond) <var> <- <a>
* after branch opts which is:
* BB:
* compare
* b<cond> [BB1]
* <var> <- <a>
* BB1:
*/
if (!(bb->out_count == 1 && bb->extended && bb->code && bb->code->next && bb->code->next->next))
continue;
mono_print_bb (bb, "");
/* Find the compare instruction */
prev = NULL;
compare = bb->code;
g_assert (compare);
while (compare->next->next && compare->next->next != bb->last_ins) {
prev = compare;
compare = compare->next;
}
branch = compare->next;
if (!MONO_IS_COND_BRANCH_OP (branch))
continue;
}
#endif
if (changed) {
if (cfg->opt & MONO_OPT_BRANCH)
mono_optimize_branches (cfg);
/* Merging bblocks could make some variables local */
mono_handle_global_vregs (cfg);
if (cfg->opt & (MONO_OPT_CONSPROP | MONO_OPT_COPYPROP))
mono_local_cprop (cfg);
if (cfg->opt & MONO_OPT_DEADCE)
mono_local_deadce (cfg);
}
#endif
}
