/**
* ipq806x_uart_init - initializes UART
*
* Initializes clocks, GPIO and UART controller.
*/
void uart_init(int idx)
{
/* Note int idx isn't used in this driver. */
void *dm_base;
void *gsbi_base;
dm_base = uart_board_param.uart_dm_base;
if (read32(MSM_BOOT_UART_DM_CSR(dm_base)) == UART_DM_CLK_RX_TX_BIT_RATE)
return; /* UART must have been already initialized. */
gsbi_base = uart_board_param.uart_gsbi_base;
ipq_configure_gpio(uart_board_param.dbg_uart_gpio,
NO_OF_DBG_UART_GPIOS);
/* Configure the uart clock */
uart_clock_config(uart_board_param.uart_gsbi,
uart_board_param.mnd_value.m_value,
uart_board_param.mnd_value.n_value,
uart_board_param.mnd_value.d_value,
0);
write32(GSBI_CTRL_REG(gsbi_base),
GSBI_PROTOCOL_CODE_I2C_UART << GSBI_CTRL_REG_PROTOCOL_CODE_S);
write32(MSM_BOOT_UART_DM_CSR(dm_base), UART_DM_CLK_RX_TX_BIT_RATE);
/* Intialize UART_DM */
msm_boot_uart_dm_init(dm_base);
}
/**
* @brief ipq40xx_uart_init - initializes UART
*
* Initializes clocks, GPIO and UART controller.
*/
void uart_init(int idx)
{
/* Note int idx isn't used in this driver. */
void *dm_base;
dm_base = uart_board_param.uart_dm_base;
if (read32(MSM_BOOT_UART_DM_CSR(dm_base)) == UART_DM_CLK_RX_TX_BIT_RATE)
return; /* UART must have been already initialized. */
ipq_configure_gpio(uart_board_param.dbg_uart_gpio,
NO_OF_DBG_UART_GPIOS);
/* Configure the uart clock */
uart_clock_config(uart_board_param.blsp_uart,
uart_board_param.mnd_value.m_value,
uart_board_param.mnd_value.n_value,
uart_board_param.mnd_value.d_value);
write32(MSM_BOOT_UART_DM_CSR(dm_base), UART_DM_CLK_RX_TX_BIT_RATE);
/* Initialize UART_DM */
msm_boot_uart_dm_init(dm_base);
}
/* Configure UART clock - based on the gsbi id */
void clock_config_uart_dm(uint8_t id)
{
/* Enable gsbi_uart_clk */
clock_config(UART_DM_CLK_NS_115200,
UART_DM_CLK_MD_115200,
GSBIn_QUP_APPS_NS(id),
GSBIn_QUP_APPS_MD(id));
/* Configure clock selection register for tx and rx rates.
* Selecting 115.2k for both RX and TX.
*/
writel(UART_DM_CLK_RX_TX_BIT_RATE, MSM_BOOT_UART_DM_CSR(id));
/* Enable gsbi_pclk */
writel(GSBI_HCLK_CTL_CLK_ENA << GSBI_HCLK_CTL_S, GSBIn_HCLK_CTL(id));
}
static void configure_uart_dm(uart_cfg_t *uart_cfg)
{
ipq_configure_gpio(uart_cfg->dbg_uart_gpio, NO_OF_DBG_UART_GPIOS);
uart_clock_config(uart_cfg->base,
uart_cfg->uart_mnd_value.m_value,
uart_cfg->uart_mnd_value.n_value,
uart_cfg->uart_mnd_value.d_value,
gboard_param->clk_dummy);
writel(GSBI_PROTOCOL_CODE_I2C_UART <<
GSBI_CTRL_REG_PROTOCOL_CODE_S,
GSBI_CTRL_REG(uart_cfg->gsbi_base));
writel(UART_DM_CLK_RX_TX_BIT_RATE,
MSM_BOOT_UART_DM_CSR(uart_cfg->uart_dm_base));
/* Intialize UART_DM */
msm_boot_uart_dm_init(uart_cfg->uart_dm_base);
}
/* Defining functions that's exposed to outside world and in coformance to
* existing uart implemention. These functions are being called to initialize
* UART and print debug messages in bootloader.
*/
void uart_dm_init(uint8_t id, uint32_t gsbi_base, uint32_t uart_dm_base)
{
static uint8_t port = 0;
char *data = "Android Bootloader - UART_DM Initialized!!!\n";
/* Configure the uart clock */
clock_config_uart_dm(id);
dsb();
/* Configure GPIO to provide connectivity between UART block
product ports and chip pads */
gpio_config_uart_dm(id);
dsb();
/* Configure GSBI for UART_DM protocol.
* I2C on 2 ports, UART (without HS flow control) on the other 2.
* This is only on chips that have GSBI block
*/
if(gsbi_base)
writel(GSBI_PROTOCOL_CODE_I2C_UART <<
GSBI_CTRL_REG_PROTOCOL_CODE_S,
GSBI_CTRL_REG(gsbi_base));
dsb();
/* Configure clock selection register for tx and rx rates.
* Selecting 115.2k for both RX and TX.
*/
writel(UART_DM_CLK_RX_TX_BIT_RATE, MSM_BOOT_UART_DM_CSR(uart_dm_base));
dsb();
/* Intialize UART_DM */
msm_boot_uart_dm_init(uart_dm_base);
msm_boot_uart_dm_write(uart_dm_base, data, 44);
ASSERT(port < ARRAY_SIZE(port_lookup));
port_lookup[port++] = uart_dm_base;
/* Set UART init flag */
uart_init_flag = 1;
}
