static ssize_t
fullWrite (int fd, const char *buf, size_t count)
// Retry partial or EAGAIN writes until count is completely written.
{
size_t written = 0;
while (written < count) {
ssize_t rv = MY_WRITE (fd, buf+written, count-written);
if (rv < 0) {
if ((errno == EAGAIN) || (errno == EINTR)) {
continue;
}
return rv;
}
written += rv;
}
assert (written == count);
return written;
}
void UartInit(void)
{
unsigned int rdata;
unsigned int baudRateDivisor, clock_step;
unsigned int fcEnable = 0;
ath_sys_frequency();
MY_WRITE(0xb8040000, 0xcff);
MY_WRITE(0xb8040008, 0x3b);
/* Enable UART , SPI and Disable S26 UART */
MY_WRITE(0xb8040028, (ath_reg_rd(0xb8040028) | 0x48002));
MY_WRITE(0xb8040008, 0x2f);
#ifdef CONFIG_HORNET_EMULATION
baudRateDivisor = (ath_ahb_freq / (16 * ATH_CONSOLE_BAUD)) - 1; // 24 MHz clock is taken as UART clock
#else
rdata = ath_reg_rd(HORNET_BOOTSTRAP_STATUS);
rdata &= HORNET_BOOTSTRAP_SEL_25M_40M_MASK;
if (rdata)
baudRateDivisor = (40000000 / (16 * ATH_CONSOLE_BAUD)) - 1; // 40 MHz clock is taken as UART clock
else
baudRateDivisor = (25000000 / (16 * ATH_CONSOLE_BAUD)) - 1; // 25 MHz clock is taken as UART clock
#endif
clock_step = 8192;
rdata =
UARTCLOCK_UARTCLOCKSCALE_SET(baudRateDivisor) |
UARTCLOCK_UARTCLOCKSTEP_SET(clock_step);
uart_reg_write(UARTCLOCK_ADDRESS, rdata);
/* Config Uart Controller */
#if 1 /* No interrupt */
rdata =
UARTCS_UARTDMAEN_SET(0) | UARTCS_UARTHOSTINTEN_SET(0) |
UARTCS_UARTHOSTINT_SET(0)
| UARTCS_UARTSERIATXREADY_SET(0) |
UARTCS_UARTTXREADYORIDE_SET(~fcEnable)
| UARTCS_UARTRXREADYORIDE_SET(~fcEnable) |
UARTCS_UARTHOSTINTEN_SET(0);
#else
rdata =
UARTCS_UARTDMAEN_SET(0) | UARTCS_UARTHOSTINTEN_SET(0) |
UARTCS_UARTHOSTINT_SET(0)
| UARTCS_UARTSERIATXREADY_SET(0) |
UARTCS_UARTTXREADYORIDE_SET(~fcEnable)
| UARTCS_UARTRXREADYORIDE_SET(~fcEnable) |
UARTCS_UARTHOSTINTEN_SET(1);
#endif
/* is_dte == 1 */
rdata = rdata | UARTCS_UARTINTERFACEMODE_SET(2);
if (fcEnable) {
rdata = rdata | UARTCS_UARTFLOWCONTROLMODE_SET(2);
}
/* invert_fc ==0 (Inverted Flow Control) */
//rdata = rdata | UARTCS_UARTFLOWCONTROLMODE_SET(3);
/* parityEnable == 0 */
//rdata = rdata | UARTCS_UARTPARITYMODE_SET(2); -->Parity Odd
//rdata = rdata | UARTCS_UARTPARITYMODE_SET(3); -->Parity Even
uart_reg_write(UARTCS_ADDRESS, rdata);
serial_inited = 1;
}
