Esempio n. 1
0
static void Aliaslistaction(const void *node, const VISIT which, const int depth)
{
	const struct tree_node *p = *(struct tree_node * const *) node;
	(void) depth;
	char SN_address[SERIAL_NUMBER_SIZE*2] ;
	
	switch (which) {
	case leaf:
	case postorder:
		if ( p->tk.p != Alias_Marker ) {
			return ;
		}
		// Add sn address
		bytes2string(SN_address, p->tk.sn, SERIAL_NUMBER_SIZE);
		MemblobAdd( (BYTE *) SN_address, SERIAL_NUMBER_SIZE*2, aliaslist_mb ) ;
		// Add '='
		MemblobAdd( (BYTE *) "=", 1, aliaslist_mb ) ;
		// Add alias name
		MemblobAdd( (const BYTE *)CONST_TREE_DATA(p), p->dsize, aliaslist_mb ) ;
		// Add <CR>
		MemblobAdd( (BYTE *) "\x0D\x0A", 2, aliaslist_mb ) ;
		return ;
	case preorder:
	case endorder:
		break;
	}
}
Esempio n. 2
0
/* See if the item can be packed
   return gbBAD -- cannot be packed at all
   return gbOTHER -- should be at start
   return gbGOOD       -- added successfully
*/
static GOOD_OR_BAD Pack_item(const struct transaction_log *tl, struct transaction_bundle *tb)
{
	GOOD_OR_BAD ret = 0;				//default return value for good packets;
	//printf("PACK_ITEM used=%d size=%d max=%d\n",MemblobLength(&(tl>mb)),tl->size,tb->max_size);
	switch (tl->type) {
	case trxn_select:			// select a 1-wire device (by unique ID)
		LEVEL_DEBUG("pack=SELECT");
		if (tb->packets != 0) {
			return gbOTHER;		// select must be first
		}
		tb->select_first = 1;
		break;
	case trxn_compare:			// match two strings -- no actual 1-wire
	case trxn_bitcompare:			// match two strings -- no actual 1-wire
		LEVEL_DEBUG("pack=COMPARE");
		break;
	case trxn_read:
	case trxn_bitread:
		LEVEL_DEBUG(" pack=READ");
		if (tl->size > tb->max_size) {
			return gbBAD;		// too big for any bundle
		}
		if (tl->size + MemblobLength(&(tb->mb)) > tb->max_size) {
			return gbOTHER;		// too big for this partial bundle
		}
		if (MemblobAddChar(0xFF, tl->size, &tb->mb)) {
			return gbBAD;
		}
		break;
	case trxn_match:			// write data and match response
	case trxn_bitmatch:			// write data and match response
	case trxn_modify:			// write data and read response. No match needed
	case trxn_bitmodify:			// write data and read response. No match needed
	case trxn_blind:			// write data and ignore response
		LEVEL_DEBUG("pack=MATCH MODIFY BLIND");
		if (tl->size > tb->max_size) {
			return gbBAD;		// too big for any bundle
		}
		if (tl->size + MemblobLength(&(tb->mb)) > tb->max_size) {
			return gbOTHER;		// too big for this partial bundle
		}
		if (MemblobAdd(tl->out, tl->size, &tb->mb)) {
			return gbBAD;
		}
		break;
	case trxn_power:
	case trxn_bitpower:
	case trxn_program:
		LEVEL_DEBUG("pack=POWER PROGRAM");
		if (1 > tb->max_size) {
			return gbBAD;		// too big for any bundle
		}
		if (1 + MemblobLength(&(tb->mb)) > tb->max_size) {
			return gbOTHER;		// too big for this partial bundle
		}
		if (MemblobAdd(tl->out, 1, &tb->mb)) {
			return gbBAD;
		}
		ret = gbGOOD;			// needs delay
		break;
	case trxn_crc8:
	case trxn_crc8seeded:
	case trxn_crc16:
	case trxn_crc16seeded:
		LEVEL_DEBUG("pack=CRC*");
		break;
	case trxn_delay:
	case trxn_udelay:
		LEVEL_DEBUG("pack=(U)DELAYS");
		ret = gbGOOD;
		break;
	case trxn_reset:
	case trxn_end:
	case trxn_verify:
		LEVEL_DEBUG("pack=RESET END VERIFY");
		return gbBAD;
	case trxn_nop:
		LEVEL_DEBUG("pack=NOP");
		break;
	}
	if (tb->packets == 0) {
		tb->start = tl;
	}
	++tb->packets;
	return ret;
}