static int ndfc_probe(struct platform_device *ofdev) { struct ndfc_controller *ndfc; const __be32 *reg; u32 ccr; u32 cs; int err, len; /* Read the reg property to get the chip select */ reg = of_get_property(ofdev->dev.of_node, "reg", &len); if (reg == NULL || len != 12) { dev_err(&ofdev->dev, "unable read reg property (%d)\n", len); return -ENOENT; } cs = be32_to_cpu(reg[0]); if (cs >= NDFC_MAX_CS) { dev_err(&ofdev->dev, "invalid CS number (%d)\n", cs); return -EINVAL; } ndfc = &ndfc_ctrl[cs]; ndfc->chip_select = cs; spin_lock_init(&ndfc->ndfc_control.lock); init_waitqueue_head(&ndfc->ndfc_control.wq); ndfc->ofdev = ofdev; dev_set_drvdata(&ofdev->dev, ndfc); ndfc->ndfcbase = of_iomap(ofdev->dev.of_node, 0); if (!ndfc->ndfcbase) { dev_err(&ofdev->dev, "failed to get memory\n"); return -EIO; } ccr = NDFC_CCR_BS(ndfc->chip_select); /* It is ok if ccr does not exist - just default to 0 */ reg = of_get_property(ofdev->dev.of_node, "ccr", NULL); if (reg) ccr |= be32_to_cpup(reg); out_be32(ndfc->ndfcbase + NDFC_CCR, ccr); /* Set the bank settings if given */ reg = of_get_property(ofdev->dev.of_node, "bank-settings", NULL); if (reg) { int offset = NDFC_BCFG0 + (ndfc->chip_select << 2); out_be32(ndfc->ndfcbase + offset, be32_to_cpup(reg)); } err = ndfc_chip_init(ndfc, ofdev->dev.of_node); if (err) { iounmap(ndfc->ndfcbase); return err; } return 0; }
static void ndfc_select_chip(struct mtd_info *mtd, int chip) { uint32_t ccr; struct ndfc_controller *ndfc = &ndfc_ctrl; ccr = in_be32(ndfc->ndfcbase + NDFC_CCR); if (chip >= 0) { ccr &= ~NDFC_CCR_BS_MASK; ccr |= NDFC_CCR_BS(chip + ndfc->chip_select); } else ccr |= NDFC_CCR_RESET_CE; out_be32(ndfc->ndfcbase + NDFC_CCR, ccr); }
static int __devinit ndfc_probe(struct of_device *ofdev, const struct of_device_id *match) { struct ndfc_controller *ndfc = &ndfc_ctrl; const u32 *reg; u32 ccr; int err, len; spin_lock_init(&ndfc->ndfc_control.lock); init_waitqueue_head(&ndfc->ndfc_control.wq); ndfc->ofdev = ofdev; dev_set_drvdata(&ofdev->dev, ndfc); reg = of_get_property(ofdev->node, "reg", &len); if (reg == NULL || len != 12) { dev_err(&ofdev->dev, "unable read reg property (%d)\n", len); return -ENOENT; } ndfc->chip_select = reg[0]; ndfc->ndfcbase = of_iomap(ofdev->node, 0); if (!ndfc->ndfcbase) { dev_err(&ofdev->dev, "failed to get memory\n"); return -EIO; } ccr = NDFC_CCR_BS(ndfc->chip_select); reg = of_get_property(ofdev->node, "ccr", NULL); if (reg) ccr |= *reg; out_be32(ndfc->ndfcbase + NDFC_CCR, ccr); reg = of_get_property(ofdev->node, "bank-settings", NULL); if (reg) { int offset = NDFC_BCFG0 + (ndfc->chip_select << 2); out_be32(ndfc->ndfcbase + offset, *reg); } err = ndfc_chip_init(ndfc, ofdev->node); if (err) { iounmap(ndfc->ndfcbase); return err; } return 0; }
static void ndfc_select_chip(struct mtd_info *mtd, int chip) { uint32_t ccr; struct nand_chip *nchip = mtd_to_nand(mtd); struct ndfc_controller *ndfc = nand_get_controller_data(nchip); ccr = in_be32(ndfc->ndfcbase + NDFC_CCR); if (chip >= 0) { ccr &= ~NDFC_CCR_BS_MASK; ccr |= NDFC_CCR_BS(chip + ndfc->chip_select); } else ccr |= NDFC_CCR_RESET_CE; out_be32(ndfc->ndfcbase + NDFC_CCR, ccr); }
static void ndfc_select_chip(struct mtd_info *mtd, int chip) { uint32_t ccr; struct ndfc_controller *ndfc = &ndfc_ctrl; struct nand_chip *nandchip = mtd->priv; struct ndfc_nand_mtd *nandmtd = nandchip->priv; struct platform_nand_chip *pchip = nandmtd->pl_chip; ccr = __raw_readl(ndfc->ndfcbase + NDFC_CCR); if (chip >= 0) { ccr &= ~NDFC_CCR_BS_MASK; ccr |= NDFC_CCR_BS(chip + pchip->chip_offset); } else ccr |= NDFC_CCR_RESET_CE; __raw_writel(ccr, ndfc->ndfcbase + NDFC_CCR); }
.num_resources = 1, .resource = &bamboo_sram, }; #define CS_NAND_0 1 /* use chip select 1 for NAND device 0 */ static struct mtd_partition nand_parts[] = { { .name = "content", .offset = 0, .size = MTDPART_SIZ_FULL, } }; struct ndfc_controller_settings bamboo_ndfc_settings = { .ccr_settings = (NDFC_CCR_BS(CS_NAND_0) | NDFC_CCR_ARAC1), .ndfc_erpn = 0, }; struct platform_nand_ctrl bamboo_nand_ctrl = { .priv = &bamboo_ndfc_settings, }; static struct platform_device bamboo_ndfc_device = { .name = "ndfc-nand", .id = 0, .dev = { .platform_data = &bamboo_nand_ctrl, }, .num_resources = 1,