/**
* @brief Handle interrupt event
* @note Call this function, judge whether a payload is received
and processes received payload in EXTIx_IRQHandler()
* @param Pointer to nRF24L01P_Object
* @retval STATUS register in nRF24L01P.
*/
uint8_t NRF_IRQ_Handler(nRF24L01P_Object* nrf)
{
uint8_t status;
NRF_CS_LOW(nrf);
status = NRF_SPI_SendByte(nrf, NRF_NOP);
NRF_CS_HIGH(nrf);
if(EXTI_GetITStatus(nrf->EXTI_LINE) != RESET)
{
nrf->ReceivedPayload.Datapipe = NRF_STATUS_RX_P_NO(status);
if(status & NRF_STATUS_RX_DR)
{
NRF_GetPayload(nrf);
NRF_WriteReg(nrf, NRF_STATUS, NRF_STATUS_RX_DR);
}
if(status & NRF_STATUS_TX_DS)
{
NRF_WriteReg(nrf, NRF_STATUS, NRF_STATUS_TX_DS);
}
if(status & NRF_STATUS_MAX_RT)
{
NRF_Flush_TX(nrf);
NRF_WriteReg(nrf, NRF_STATUS, NRF_STATUS_MAX_RT);
}
EXTI_ClearITPendingBit(nrf->EXTI_LINE);
}
return status;
}
/**
* @brief SPI peripheral configuration
* @note None
* @param Pointer to nRF24L01P_Object
* @retval None
*/
void NRF_SPI_Config(nRF24L01P_Object* nrf)
{
SPI_InitTypeDef SPI_InitStructure;
SPI_StructInit(&SPI_InitStructure);
/* Set nRF24L01 SPI Idle */
NRF_CS_HIGH(nrf);
/* Enable SPI clock */
nrf->SPI_CLK_ENABLE_FUNCTION(nrf->SPI_PERIPH_CLK, ENABLE);
/* Disable SPI */
SPI_Cmd(nrf->SPIx, DISABLE);
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = nrf->SPI_BaudRatePrescaler; //Parameter check will be performed in SPI_Init()
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(nrf->SPIx, &SPI_InitStructure);
/* Enable SPI */
SPI_Cmd(nrf->SPIx, ENABLE);
}
/**
* @brief Set ACK payload for RX device
* @note require NRF_ACK_PAY_ENABLE, NRF_DPL_ENABLE
and enable DynamicPayload on a specific datapipe
* @param Pointer to nRF24L01P_Object.
* @retval STATUS register in nRF24L01P.
*/
uint8_t NRF_SetACKPayload(nRF24L01P_Object* nrf)
{
uint8_t bytecnt, status;
if(nrf->MasterMode == NRF_MASTER_MODE_RX)
{
/* Reset CE pin to enable register write */
NRF_CE_LOW(nrf);
/* Reset CS pin to initiate an SPI transmission */
NRF_CS_LOW(nrf);
/* Send NRF_W_ACK_PAYLOAD command */
assert_param(nrf->ACKPayload.PayloadWidth <= NRF_MAX_PAYLOAD_WIDTH);
status = NRF_SPI_SendByte(nrf, NRF_W_ACK_PAYLOAD);
/* Send payload contents */
for(bytecnt = 0; bytecnt < nrf->ACKPayload.PayloadWidth; bytecnt++)
{
NRF_SPI_SendByte(nrf, nrf->ACKPayload.Payload[bytecnt]);
}
/* Set CS pin to complete transmission */
NRF_CS_HIGH(nrf);
NRF_CE_HIGH(nrf);
}
return status;
}
void
nrf_send_frame (uint8_t * frame, int send_mode)
{
int ret;
if (mode != MODE_NOMODE)
return;
UART2PutStr ("sf\n\r");
nrf_write_reg (R_CONFIG, R_CONFIG_PWR_UP | R_CONFIG_EN_CRC);
NRF_CS_LOW ();
mLED_2_On ();
SPI2_xmit (C_W_TX_PAYLOAD);
SPI2_transmit (frame, 32);
mLED_2_Off ();
NRF_CS_HIGH ();
NRF_CE_HIGH ();
while (1)
{
ret = nrf_read_reg (R_FIFO_STATUS);
if (send_mode)
{
if ((ret & R_FIFO_STATUS_TX_EMPTY) == R_FIFO_STATUS_TX_EMPTY)
break;
}
else
{
if ((ret & R_FIFO_STATUS_TX_FULL) == 0)
break;
}
}
NRF_CE_LOW ();
}
/**
* @brief Send a payload which does not require acknowledgement from RX device.
* @note
* @param Pointer to nRF24L01P_Object.
* @retval STATUS register in nRF24L01P.
*/
uint8_t NRF_SendPayload_NOACK(nRF24L01P_Object* nrf)
{
uint8_t bytecnt, status;
/* Reset CE pin to enable register write */
NRF_CE_LOW(nrf);
/* Reset CS pin to initiate an SPI transmission */
NRF_CS_LOW(nrf);
/* Send NRF_W_TX_PAYLOAD_NOACK command */
assert_param(nrf->PayloadToSend.PayloadWidth <= NRF_MAX_PAYLOAD_WIDTH);
status = NRF_SPI_SendByte(nrf, NRF_W_TX_PAYLOAD_NOACK);
/* Send payload contents */
for(bytecnt = 0; bytecnt < nrf->PayloadToSend.PayloadWidth; bytecnt++)
{
NRF_SPI_SendByte(nrf, nrf->PayloadToSend.Payload[bytecnt]);
}
/* Set CS pin to complete transmission */
NRF_CS_HIGH(nrf);
/* Hold CE high for at least 10us to send payload */
NRF_CE_HIGH(nrf);
return status;
}
uint8_t
nrf_cmd_status (uint8_t data)
{
NRF_CS_LOW ();
data = SPI2_xmit (data);
NRF_CS_HIGH ();
return data;
}
void
nrf_write_longX (const uint8_t cmd, int len, const uint8_t * data)
{
NRF_CS_LOW ();
SPI2_xmit (cmd);
SPI2_transmit (data, len);
NRF_CS_HIGH ();
}
void
nrf_write_reg (const uint8_t reg, const uint8_t val)
{
NRF_CS_LOW ();
SPI2_xmit (C_W_REGISTER | reg);
SPI2_xmit (val);
NRF_CS_HIGH ();
}
void
nrf_reset (void)
{
NRF_POWER_OFF ();
NRF_CS_HIGH ();
NRF_CE_LOW ();
delay_ms (10);
NRF_POWER_ON ();
delay_ms (100); // see nRF24L01+ Product Specification Page 22
}
void
nrf_read_long (const uint8_t cmd, int len, uint8_t * data)
{
int i;
NRF_CS_LOW ();
SPI2_xmit (cmd);
for (i = 0; i < len; i++)
data[i] = 0x00;
SPI2_transmit (data, len);
NRF_CS_HIGH ();
};
void
nrf_read_pkt (int len, uint8_t * data)
{
int i;
NRF_CS_LOW ();
SPI2_xmit (C_R_RX_PAYLOAD);
for (i = 0; i < len; i++)
data[i] = 0x00;
SPI2_transmit (data, len);
NRF_CS_HIGH ();
};
uint8_t
nrf_read_reg (const uint8_t reg)
{
uint8_t val;
NRF_CS_LOW ();
/*
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
__asm__ ("nop");
*/
SPI2_xmit (C_R_REGISTER | reg);
val = SPI2_xmit (0xff);
NRF_CS_HIGH ();
return val;
};
/**
* @brief Read a multi-byte register using NRF_READ_REG command
* @note
* @param Pointer to nRF24L01P_Object
* @param Register address, can be a value of @ref SPI(nRF24L01) register addresses.
* @param Buffer pointer.
* @param Number of byte(s) to read.
* @retval Requested register content.
*/
uint8_t NRF_ReadReg(nRF24L01P_Object* nrf, uint8_t addr)
{
uint8_t data;
/* Reset CS pin to initiate an SPI transmission */
NRF_CS_LOW(nrf);
/* Send NRF_READ_REG command with register address */
assert_param(IS_NRF_REGISTER(addr));
NRF_SPI_SendByte(nrf, NRF_READ_REG | addr);
/* Read byte*/
data = NRF_SPI_SendByte(nrf, NRF_NOP);
/* Set CS pin to complete transmission */
NRF_CS_HIGH(nrf);
/* Return register content */
return data;
}
uint8_t NRF_WriteReg(nRF24L01P_Object* nrf, uint8_t addr, uint8_t pData)
{
uint8_t status;
/* Reset CS pin to initiate an SPI transmission */
NRF_CS_LOW(nrf);
/* Send NRF_WRITE_REG command with register address */
assert_param(IS_NRF_REGISTER(addr));
status = NRF_SPI_SendByte(nrf, NRF_WRITE_REG | addr);
/* Send remaining bytes */
NRF_SPI_SendByte(nrf, pData);
/* Set CS pin to complete transmission */
NRF_CS_HIGH(nrf);
/* Return STATUS register */
return status;
}
/**
* @brief Read incoming payload width and datapipe
* @note
* @param Pointer to nRF24L01P_Object
* @retval Payload width in bytes
*/
uint8_t NRF_SPI_GetReceivedPayloadInfo(nRF24L01P_Object* nrf)
{
uint8_t status;
/* Reset CS pin to initiate an SPI transmission */
NRF_CS_LOW(nrf);
/* Send NRF_R_RX_PL_WID command */
status = NRF_SPI_SendByte(nrf, NRF_R_RX_PL_WID);
/* Continue sending NRF_NOP command to retrive data */
nrf->ReceivedPayload.PayloadWidth = NRF_SPI_SendByte(nrf, NRF_NOP);
nrf->ReceivedPayload.Datapipe = (status & 0x0E) >> 1;
/* Set CS pin to complete transmission */
NRF_CS_HIGH(nrf);
return status;
}
void
nrf_send_frame (uint8_t * frame)
{
int ret;
nrf_write_reg (R_CONFIG, R_CONFIG_PWR_UP | R_CONFIG_EN_CRC);
for (ret = 0; ret < 32; ret++)
{
UART2PutHex (frame[ret]);
UART2PutStr (" ");
}
UART2PutStr ("\n\r");
NRF_CS_LOW ();
SPI2_xmit (C_W_TX_PAYLOAD);
SPI2_transmit (frame, 32);
NRF_CS_HIGH ();
NRF_CE_HIGH ();
while (1)
{
ret = nrf_read_reg (R_FIFO_STATUS);
if ((ret & R_FIFO_STATUS_TX_EMPTY) == R_FIFO_STATUS_TX_EMPTY)
break;
}
NRF_CE_LOW ();
nrf_write_reg (R_STATUS,
R_CONFIG_MASK_RX_DR | R_CONFIG_MASK_TX_DS |
R_CONFIG_MASK_MAX_RT);
ret = nrf_cmd_status (C_NOP);
}
/**
* @brief Read incoming payload data using NRF_RD_RX_PLOAD command
* @note
* @param Pointer to nRF24L01P_Object
* @param Buffer pointer.
* @param Payload width.
* @retval STATUS register in nRF24L01P.
*/
uint8_t NRF_ReadPayloadData(nRF24L01P_Object* nrf, uint8_t* pData, uint8_t width)
{
uint8_t status;
uint8_t bytecnt;
/* Reset CS pin to initiate an SPI transmission */
NRF_CS_LOW(nrf);
/* Send read payload command */
status = NRF_SPI_SendByte(nrf, NRF_RD_RX_PLOAD);
/* Read remaining bytes */
for(bytecnt = 0; bytecnt < width; bytecnt++)
{
pData[bytecnt] = NRF_SPI_SendByte(nrf, NRF_NOP);
}
/* Set CS pin to complete transmission */
NRF_CS_HIGH(nrf);
/* Return STATUS register */
return status;
}
/**
* @brief GPIO & AFIO configuration
* @note Pointer to nRF24L01P_Object
* @param None
* @retval None
*/
void NRF_LowLevel_Config(nRF24L01P_Object* nrf)
{
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_StructInit(&GPIO_InitStructure);
/* Enable GPIO & AFIO Clocks */
RCC_APB2PeriphClockCmd(nrf->SPI_GPIO_CLK | nrf->IRQ_GPIO_CLK | \
RCC_APB2Periph_AFIO | nrf->CE_GPIO_CLK | \
nrf->CS_GPIO_CLK, ENABLE);
/* Configurate SPI GPIOs */
GPIO_InitStructure.GPIO_Pin = nrf->SPI_SCK_PIN | nrf->SPI_MISO_PIN | nrf->SPI_MOSI_PIN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_Init(nrf->SPI_GPIO_PORT, &GPIO_InitStructure);
/* Configurate CS GPIO Pin */
GPIO_InitStructure.GPIO_Pin = nrf->CS_GPIO_PIN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_Init(nrf->CS_GPIO_PORT, &GPIO_InitStructure);
NRF_CS_HIGH(nrf);
/* Configurate CE GPIO Pin */
GPIO_InitStructure.GPIO_Pin = nrf->CE_GPIO_PIN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_Init(nrf->CE_GPIO_PORT, &GPIO_InitStructure);
// GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);
/* Configurate IRQ GPIO Pin */
GPIO_InitStructure.GPIO_Pin = nrf->IRQ_GPIO_PIN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
GPIO_Init(nrf->IRQ_GPIO_PORT, &GPIO_InitStructure);
}
/**
* @brief Read a multi-byte register using NRF_READ_REG command
* @note
* @param Pointer to nRF24L01P_Object
* @param Register address, can be a value of @ref SPI(nRF24L01) register addresses.
* @param Buffer pointer.
* @param Number of byte(s) to read.
* @retval STATUS register in nRF24L01P.
*/
uint8_t NRF_ReadMultiByteReg(nRF24L01P_Object* nrf, uint8_t addr, uint8_t *pBuf, uint8_t numbyte)
{
uint8_t status;
uint8_t bytecnt;
/* Reset CS pin to initiate an SPI transmission */
NRF_CS_LOW(nrf);
/* Send NRF_READ_REG command with register address */
assert_param(IS_NRF_REGISTER(addr));
status = NRF_SPI_SendByte(nrf, NRF_READ_REG | addr);
/* Read remaining bytes */
for(bytecnt = 0; bytecnt < numbyte; bytecnt++)
{
pBuf[bytecnt] = NRF_SPI_SendByte(nrf, NRF_READ_REG);
}
/* Set CS pin to complete transmission */
NRF_CS_HIGH(nrf);
/* Return STATUS register */
return status;
}
/**
* @brief Clear TX cache
* @note
* @param Pointer to nRF24L01P_Object
* @retval none
*/
void NRF_Flush_TX(nRF24L01P_Object* nrf)
{
NRF_CS_LOW(nrf);
NRF_SPI_SendByte(nrf, NRF_FLUSH_TX);
NRF_CS_HIGH(nrf);
}
