// // OVERRIDE_DDR_BUS_SPEED(SocketID, ChannelID, USER_MEMORY_TIMING_MODE, MEMORY_BUS_SPEED) // Specifies DDR bus speed of channel ChannelID on socket SocketID. // // DRAM_TECHNOLOGY(SocketID, TECHNOLOGY_TYPE) // Specifies the DRAM technology type of socket SocketID (DDR2, DDR3,...) // // WRITE_LEVELING_SEED(SocketID, ChannelID, DimmID, Byte0Seed, Byte1Seed, Byte2Seed, Byte3Seed, Byte4Seed, Byte5Seed, // Byte6Seed, Byte7Seed, ByteEccSeed) // Specifies the write leveling seed for a channel of a socket. // // HW_RXEN_SEED(SocketID, ChannelID, DimmID, Byte0Seed, Byte1Seed, Byte2Seed, Byte3Seed, Byte4Seed, Byte5Seed, // Byte6Seed, Byte7Seed, ByteEccSeed) // Speicifes the HW RXEN training seed for a channel of a socket // NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 1), NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 2), MEMCLK_DIS_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), CKE_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x05, 0x0A), ODT_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00), CS_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), PSO_END }; /* * These tables are optional and may be used to adjust memory timing settings */ #include "mm.h" #include "mn.h"
SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A, SEED_A), HW_RXEN_SEED( ANY_SOCKET, CHANNEL_B, ALL_DIMMS, SEED_B, SEED_B, SEED_B, SEED_B, SEED_B, SEED_B, SEED_B, SEED_B, SEED_B), HW_RXEN_SEED( ANY_SOCKET, CHANNEL_C, ALL_DIMMS, SEED_C, SEED_C, SEED_C, SEED_C, SEED_C, SEED_C, SEED_C, SEED_C, SEED_C), HW_RXEN_SEED( ANY_SOCKET, CHANNEL_D, ALL_DIMMS, SEED_D, SEED_D, SEED_D, SEED_D, SEED_D, SEED_D, SEED_D, SEED_D, SEED_D), NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 2), //max 3 PSO_END }; /* * These tables are optional and may be used to adjust memory timing settings */ //HY Customer table UINT8 AGESA_MEM_TABLE_HY[][sizeof (MEM_TABLE_ALIAS)] = { // Hardcoded Memory Training Values // The following macro should be used to override training values for your platform // // DQSACCESS(MTAfterDqsRwPosTrn, MTNodes, MTDcts, MTDIMMs, BFRdDqsDly, MTOverride, 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, 0x18, 0x1c, 0x20), //