/* ===================================================================*/ LDD_TDeviceData* ExtIntLdd1_Init(LDD_TUserData *UserDataPtr) { /* Allocate LDD device structure */ ExtIntLdd1_TDeviceData *DeviceDataPrv; /* {FreeRTOS RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */ DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC; /* Store the UserData pointer */ DeviceDataPrv->UserData = UserDataPtr; /* Interrupt vector(s) allocation */ /* {FreeRTOS RTOS Adapter} Set interrupt vector: IVT is static, ISR parameter is passed by the global variable */ INT_PORTD__BAREBOARD_RTOS_ISRPARAM = DeviceDataPrv; /* Initialization of Port Control registers */ /* PORTD_PCR4: ISF=0,MUX=1 */ PORTD_PCR4 = (uint32_t)((PORTD_PCR4 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_MUX(0x06) )) | (uint32_t)( PORT_PCR_MUX(0x01) )); /* PORTD_PCR4: ISF=1,IRQC=9 */ PORTD_PCR4 = (uint32_t)((PORTD_PCR4 & (uint32_t)~(uint32_t)( PORT_PCR_IRQC(0x06) )) | (uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_IRQC(0x09) )); /* NVIC_IPR7: PRI_31=0 */ NVIC_IPR7 &= (uint32_t)~(uint32_t)(NVIC_IP_PRI_31(0xFF)); /* NVIC_ISER: SETENA|=0x80000000 */ NVIC_ISER |= NVIC_ISER_SETENA(0x80000000); /* Registration of the device structure */ PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_ExtIntLdd1_ID,DeviceDataPrv); return ((LDD_TDeviceData *)DeviceDataPrv); }
/* ** =================================================================== ** Method : ExtIntLdd7_Init (component ExtInt_LDD) ** ** Description : ** This method initializes the associated peripheral(s) and the ** component internal variables. The method is called ** automatically as a part of the application initialization ** code. ** Parameters : ** NAME - DESCRIPTION ** * UserDataPtr - Pointer to the RTOS device ** structure. This pointer will be passed to ** all events as parameter. ** Returns : ** --- - Pointer to the dynamically allocated ** private structure or NULL if there was an ** error. ** =================================================================== */ LDD_TDeviceData* ExtIntLdd7_Init(LDD_TUserData *UserDataPtr) { /* Allocate LDD device structure */ ExtIntLdd7_TDeviceData *DeviceDataPrv; /* {Default RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */ DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC; /* Store the UserData pointer */ DeviceDataPrv->UserData = UserDataPtr; /* Set device as Disable */ DeviceDataPrv->UserEnabled = FALSE; /* Interrupt vector(s) allocation */ /* {Default RTOS Adapter} Set interrupt vector: IVT is static, ISR parameter is passed by the global variable */ INT_PORTD__DEFAULT_RTOS_ISRPARAM = DeviceDataPrv; /* Clear interrupt status flag - w1c */ PORTD_ISFR = PORT_ISFR_ISF(0x80); /* Initialization of Port Control registers */ /* PORTD_PCR7: ISF=0,IRQC=0,MUX=1 */ PORTD_PCR7 = (uint32_t)((PORTD_PCR7 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_IRQC(0x0F) | PORT_PCR_MUX(0x06) )) | (uint32_t)( PORT_PCR_MUX(0x01) )); /* NVIC_IPR7: PRI_31=0x80 */ NVIC_IPR7 = (uint32_t)((NVIC_IPR7 & (uint32_t)~(uint32_t)( NVIC_IP_PRI_31(0x7F) )) | (uint32_t)( NVIC_IP_PRI_31(0x80) )); /* NVIC_ISER: SETENA|=0x80000000 */ NVIC_ISER |= NVIC_ISER_SETENA(0x80000000); /* Registration of the device structure */ PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_ExtIntLdd7_ID,DeviceDataPrv); return ((LDD_TDeviceData *)DeviceDataPrv); }
/* ** =================================================================== ** Method : PE_low_level_init (component MKL26Z128FT4) ** ** Description : ** Initializes beans and provides common register initialization. ** The method is called automatically as a part of the ** application initialization code. ** This method is internal. It is used by Processor Expert only. ** =================================================================== */ void PE_low_level_init(void) { #ifdef PEX_RTOS_INIT PEX_RTOS_INIT(); /* Initialization of the selected RTOS. Macro is defined by the RTOS component. */ #endif /* Initialization of the SIM module */ /* PORTA_PCR4: ISF=0,MUX=7 */ PORTA_PCR4 = (uint32_t)((PORTA_PCR4 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK )) | (uint32_t)( PORT_PCR_MUX(0x07) )); /* Initialization of the FTFL_FlashConfig module */ /* Initialization of the PMC module */ /* PMC_LVDSC1: LVDACK=1,LVDIE=0,LVDRE=1,LVDV=0 */ PMC_LVDSC1 = (uint8_t)((PMC_LVDSC1 & (uint8_t)~(uint8_t)( PMC_LVDSC1_LVDIE_MASK | PMC_LVDSC1_LVDV(0x03) )) | (uint8_t)( PMC_LVDSC1_LVDACK_MASK | PMC_LVDSC1_LVDRE_MASK )); /* PMC_LVDSC2: LVWACK=1,LVWIE=0,LVWV=0 */ PMC_LVDSC2 = (uint8_t)((PMC_LVDSC2 & (uint8_t)~(uint8_t)( PMC_LVDSC2_LVWIE_MASK | PMC_LVDSC2_LVWV(0x03) )) | (uint8_t)( PMC_LVDSC2_LVWACK_MASK )); /* PMC_REGSC: BGEN=0,ACKISO=0,BGBE=0 */ PMC_REGSC &= (uint8_t)~(uint8_t)( PMC_REGSC_BGEN_MASK | PMC_REGSC_ACKISO_MASK | PMC_REGSC_BGBE_MASK ); /* SMC_PMPROT: ??=0,??=0,AVLP=0,??=0,ALLS=0,??=0,AVLLS=0,??=0 */ SMC_PMPROT = 0x00U; /* Setup Power mode protection register */ /* Common initialization of the CPU registers */ /* PORTD_ISFR: ISF=0xD2 */ PORTD_ISFR = PORT_ISFR_ISF(0xD2); /* Common initialization of the CPU registers */ /* PORTD_PCR1: ISF=0,IRQC=0x0B,PE=1 */ PORTD_PCR1 = (uint32_t)((PORTD_PCR1 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_IRQC(0x04) )) | (uint32_t)( PORT_PCR_IRQC(0x0B) | PORT_PCR_PE_MASK )); /* PORTD_PCR2: ISF=0,PE=1,PS=1 */ PORTD_PCR2 = (uint32_t)((PORTD_PCR2 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK )) | (uint32_t)( PORT_PCR_PE_MASK | PORT_PCR_PS_MASK )); /* PORTD_PCR4: ISF=0,IRQC=0x0B,PE=1 */ PORTD_PCR4 = (uint32_t)((PORTD_PCR4 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_IRQC(0x04) )) | (uint32_t)( PORT_PCR_IRQC(0x0B) | PORT_PCR_PE_MASK )); /* PORTD_PCR5: ISF=0,PE=1 */ PORTD_PCR5 = (uint32_t)((PORTD_PCR5 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK )) | (uint32_t)( PORT_PCR_PE_MASK )); /* PORTD_PCR6: ISF=0,IRQC=0x0B,DSE=0,PE=1 */ PORTD_PCR6 = (uint32_t)((PORTD_PCR6 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_IRQC(0x04) | PORT_PCR_DSE_MASK )) | (uint32_t)( PORT_PCR_IRQC(0x0B) | PORT_PCR_PE_MASK )); /* PORTD_PCR7: ISF=0,IRQC=0x0B,DSE=0,PE=1 */ PORTD_PCR7 = (uint32_t)((PORTD_PCR7 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK | PORT_PCR_IRQC(0x04) | PORT_PCR_DSE_MASK )) | (uint32_t)( PORT_PCR_IRQC(0x0B) | PORT_PCR_PE_MASK )); /* NVIC_ISER: SETENA|=0x80000040 */ NVIC_ISER |= NVIC_ISER_SETENA(0x80000040); /* NVIC_IPR7: PRI_31=0 */ NVIC_IPR7 &= (uint32_t)~(uint32_t)(NVIC_IP_PRI_31(0xFF)); /* PORTC_PCR3: ISF=0,PE=1 */ PORTC_PCR3 = (uint32_t)((PORTC_PCR3 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK )) | (uint32_t)( PORT_PCR_PE_MASK )); /* PORTC_PCR5: ISF=0,PE=1,PS=1 */ PORTC_PCR5 = (uint32_t)((PORTC_PCR5 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK )) | (uint32_t)( PORT_PCR_PE_MASK | PORT_PCR_PS_MASK )); /* NVIC_IPR5: PRI_21=0,PRI_20=0 */ NVIC_IPR5 &= (uint32_t)~(uint32_t)( NVIC_IP_PRI_21(0xFF) | NVIC_IP_PRI_20(0xFF) ); /* PORTB_PCR0: ISF=0,PE=1,PS=1 */ PORTB_PCR0 = (uint32_t)((PORTB_PCR0 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK )) | (uint32_t)( PORT_PCR_PE_MASK | PORT_PCR_PS_MASK )); /* PORTB_PCR1: ISF=0,PE=1,PS=1 */ PORTB_PCR1 = (uint32_t)((PORTB_PCR1 & (uint32_t)~(uint32_t)( PORT_PCR_ISF_MASK )) | (uint32_t)( PORT_PCR_PE_MASK | PORT_PCR_PS_MASK )); /* NVIC_IPR1: PRI_6=0 */ NVIC_IPR1 &= (uint32_t)~(uint32_t)(NVIC_IP_PRI_6(0xFF)); /* ### FreeRTOS "FRTOS1" init code ... */ #if configSYSTICK_USE_LOW_POWER_TIMER /* enable clocking for low power timer, otherwise vPortStopTickTimer() will crash */ SIM_SCGC5 |= SIM_SCGC5_LPTMR_MASK; /* SIM_SCGC5: LPTMR=1 */ #endif vPortStopTickTimer(); /* tick timer shall not run until the RTOS scheduler is started */ /* ### Serial_LDD "IO1" component auto initialization. Auto initialization feature can be disabled by component property "Auto initialization". */ (void)IO1_Init(NULL); /* ### Init_GPIO "PTD" init code ... */ PTD_Init(); /* ### BitIO_LDD "StartStopButton" component auto initialization. Auto initialization feature can be disabled by component property "Auto initialization". */ (void)StartStopButton_Init(NULL); /* ### BitIO_LDD "BitIoLdd1" component auto initialization. Auto initialization feature can be disabled by component property "Auto initialization". */ (void)BitIoLdd1_Init(NULL); /* ### BitIO_LDD "BitIoLdd2" component auto initialization. Auto initialization feature can be disabled by component property "Auto initialization". */ (void)BitIoLdd2_Init(NULL); /* ### BitIO_LDD "BitIoLdd3" component auto initialization. Auto initialization feature can be disabled by component property "Auto initialization". */ (void)BitIoLdd3_Init(NULL); /* ### BitIO_LDD "BitIoLdd4" component auto initialization. Auto initialization feature can be disabled by component property "Auto initialization". */ (void)BitIoLdd4_Init(NULL); /* ### BitIO_LDD "BitIoLdd5" component auto initialization. Auto initialization feature can be disabled by component property "Auto initialization". */ (void)BitIoLdd5_Init(NULL); /* ### BitIO_LDD "ModeButton" component auto initialization. Auto initialization feature can be disabled by component property "Auto initialization". */ (void)ModeButton_Init(NULL); /* ### Init_GPIO "PTC" init code ... */ PTC_Init(); /* ### BitIO_LDD "BitIoLdd6" component auto initialization. Auto initialization feature can be disabled by component property "Auto initialization". */ (void)BitIoLdd6_Init(NULL); /* ### BitIO_LDD "EncoderA" component auto initialization. Auto initialization feature can be disabled by component property "Auto initialization". */ (void)EncoderA_Init(NULL); /* ### BitIO_LDD "EncoderB" component auto initialization. Auto initialization feature can be disabled by component property "Auto initialization". */ (void)EncoderB_Init(NULL); /* ### BitIO_LDD "PreampEnable" component auto initialization. Auto initialization feature can be disabled by component property "Auto initialization". */ (void)PreampEnable_Init(NULL); /* ### Init_SRTC "RTC" init code ... */ RTC_Init(); /* ### Init_GPIO "PTB" init code ... */ PTB_Init(); /* ### DMATransfer_LDD "SSI1_TxDMA" component auto initialization. Auto initialization feature can be disabled by component's property "Auto initialization". */ (void)SSI1_TxDMA_Init(NULL); /* ### BitIO_LDD "BitIoLdd7" component auto initialization. Auto initialization feature can be disabled by component property "Auto initialization". */ (void)BitIoLdd7_Init(NULL); }
/* ===================================================================*/ LDD_TDeviceData* CAN1_Init(LDD_TUserData *UserDataPtr) { /* Allocate LDD device structure */ CAN1_TDeviceDataPtr DeviceDataPrv; /* {Default RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */ DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC; DeviceDataPrv->BaseAddr = MSCAN_BASE_PTR; /* Device base address*/ DeviceDataPrv->UserData = UserDataPtr; /* Store the RTOS device structure */ DeviceDataPrv->MaxDataLen = 0x08U; /* Max number of data to be sent in one frame */ DeviceDataPrv->MaxBufferIndex = (LDD_CAN_TMBIndex)(CAN1_CAN_MBUFFERS-1U); /* Number of max. message buffer index */ DeviceDataPrv->BuffersNumber = (LDD_CAN_TMBIndex)CAN1_CAN_MBUFFERS; /* Number of message buffers */ DeviceDataPrv->RxBufferMask = 0x01U; /* Bit mask for message buffers configured as receive */ DeviceDataPrv->TxBufferMask = 0x02U; /* Bit mask for message buffers configured as transmit */ DeviceDataPrv->BuffersIdxToHwPtr = (LDD_CAN_TMBIndex *)RemapBuffersIdxToHw; /* Set pointer to BuffersIdxToHwPtr remap table */ DeviceDataPrv->HwToRxBuffersIdxPtr = (LDD_CAN_TMBIndex *)RemapHwToRxBuffersIdx; /* Set pointer to HwToRxBuffersIdx remap table */ DeviceDataPrv->HwToTxBuffersIdxPtr = (LDD_CAN_TMBIndex *)RemapHwToTxBuffersIdx; /* Set pointer to HwToTxBuffersIdx remap table */ DeviceDataPrv->TxBuffersPendingMask = 0x00U; /* Initialize used Tx buffers mask variable */ DeviceDataPrv->Index = 0x00U; /* Set the component instance index */ /* Clock Gating initialization */ /* SIM_SCGC: MSCAN=1 */ SIM_SCGC |= SIM_SCGC_MSCAN_MASK; /* Allocate interrupt vectors */ /* {Default RTOS Adapter} Set interrupt vector: IVT is static, ISR parameter is passed by the global variable */ INT_MSCAN_TX__DEFAULT_RTOS_ISRPARAM = DeviceDataPrv; /* {Default RTOS Adapter} Set interrupt vector: IVT is static, ISR parameter is passed by the global variable */ INT_MSCAN_RX__DEFAULT_RTOS_ISRPARAM = DeviceDataPrv; /* SIM_PINSEL1: MSCANPS=1 */ SIM_PINSEL1 |= SIM_PINSEL1_MSCANPS_MASK; /* Interrupt priorities */ /* NVIC_IPR7: PRI_31=1 */ NVIC_IPR7 = (uint32_t)((NVIC_IPR7 & (uint32_t)~(uint32_t)( NVIC_IP_PRI_31(0x02) )) | (uint32_t)( NVIC_IP_PRI_31(0x01) )); /* NVIC_ISER: SETENA31=1,SETENA30=0,SETENA29=0,SETENA28=0,SETENA27=0,SETENA26=0,SETENA25=0,SETENA24=0,SETENA23=0,SETENA22=0,SETENA21=0,SETENA20=0,SETENA19=0,SETENA18=0,SETENA17=0,SETENA16=0,SETENA15=0,SETENA14=0,SETENA13=0,SETENA12=0,SETENA11=0,SETENA10=0,SETENA9=0,SETENA8=0,SETENA7=0,SETENA6=0,SETENA5=0,SETENA4=0,SETENA3=0,SETENA2=0,SETENA1=0,SETENA0=0 */ NVIC_ISER = NVIC_ISER_SETENA31_MASK; /* NVIC_ICER: CLRENA31=0,CLRENA30=0,CLRENA29=0,CLRENA28=0,CLRENA27=0,CLRENA26=0,CLRENA25=0,CLRENA24=0,CLRENA23=0,CLRENA22=0,CLRENA21=0,CLRENA20=0,CLRENA19=0,CLRENA18=0,CLRENA17=0,CLRENA16=0,CLRENA15=0,CLRENA14=0,CLRENA13=0,CLRENA12=0,CLRENA11=0,CLRENA10=0,CLRENA9=0,CLRENA8=0,CLRENA7=0,CLRENA6=0,CLRENA5=0,CLRENA4=0,CLRENA3=0,CLRENA2=0,CLRENA1=0,CLRENA0=0 */ NVIC_ICER = 0x00U; /* NVIC_IPR7: PRI_30=1 */ NVIC_IPR7 = (uint32_t)((NVIC_IPR7 & (uint32_t)~(uint32_t)( NVIC_IP_PRI_30(0x02) )) | (uint32_t)( NVIC_IP_PRI_30(0x01) )); /* NVIC_ISER: SETENA31=0,SETENA30=1,SETENA29=0,SETENA28=0,SETENA27=0,SETENA26=0,SETENA25=0,SETENA24=0,SETENA23=0,SETENA22=0,SETENA21=0,SETENA20=0,SETENA19=0,SETENA18=0,SETENA17=0,SETENA16=0,SETENA15=0,SETENA14=0,SETENA13=0,SETENA12=0,SETENA11=0,SETENA10=0,SETENA9=0,SETENA8=0,SETENA7=0,SETENA6=0,SETENA5=0,SETENA4=0,SETENA3=0,SETENA2=0,SETENA1=0,SETENA0=0 */ NVIC_ISER = NVIC_ISER_SETENA30_MASK; /* NVIC_ICER: CLRENA31=0,CLRENA30=0,CLRENA29=0,CLRENA28=0,CLRENA27=0,CLRENA26=0,CLRENA25=0,CLRENA24=0,CLRENA23=0,CLRENA22=0,CLRENA21=0,CLRENA20=0,CLRENA19=0,CLRENA18=0,CLRENA17=0,CLRENA16=0,CLRENA15=0,CLRENA14=0,CLRENA13=0,CLRENA12=0,CLRENA11=0,CLRENA10=0,CLRENA9=0,CLRENA8=0,CLRENA7=0,CLRENA6=0,CLRENA5=0,CLRENA4=0,CLRENA3=0,CLRENA2=0,CLRENA1=0,CLRENA0=0 */ NVIC_ICER = 0x00U; /* MSCAN_CANCTL1: CANE=1,CLKSRC=1,LOOPB=0,LISTEN=0,BORM=0,WUPM=0,SLPAK=0,INITAK=0 */ MSCAN_CANCTL1 = (MSCAN_CANCTL1_CANE_MASK | MSCAN_CANCTL1_CLKSRC_MASK); /* Set control 1 register */ /* MSCAN_CANCTL0: RXFRM=0,RXACT=0,CSWAI=0,SYNCH=0,TIME=0,WUPE=0,SLPRQ=0,INITRQ=1 */ MSCAN_CANCTL0 = MSCAN_CANCTL0_INITRQ_MASK; /* Set control 0 register */ /* MSCAN_CANIDAC: ??=0,??=0,IDAM=0,??=0,IDHIT=0 */ MSCAN_CANIDAC = (MSCAN_CANIDAC_IDAM(0x00) | MSCAN_CANIDAC_IDHIT(0x00)); /* Set identifier acceptance control register */ /* MSCAN_CANIDMR0: AM=0xFF */ MSCAN_CANIDMR0 = MSCAN_CANIDMR_BANK_1_AM(0xFF); /* Set the acceptance mask - register MSCAN_CANIDMR0 */ /* MSCAN_CANIDMR1: AM=0xFF */ MSCAN_CANIDMR1 = MSCAN_CANIDMR_BANK_1_AM(0xFF); /* Set the acceptance mask - register MSCAN_CANIDMR1 */ /* MSCAN_CANIDMR2: AM=0xFF */ MSCAN_CANIDMR2 = MSCAN_CANIDMR_BANK_1_AM(0xFF); /* Set the acceptance mask - register MSCAN_CANIDMR2 */ /* MSCAN_CANIDMR3: AM=0xFF */ MSCAN_CANIDMR3 = MSCAN_CANIDMR_BANK_1_AM(0xFF); /* Set the acceptance mask - register MSCAN_CANIDMR3 */ /* MSCAN_CANIDMR4: AM=0xFF */ MSCAN_CANIDMR4 = MSCAN_CANIDMR_BANK_2_AM(0xFF); /* Set the acceptance mask - register MSCAN_CANIDMR4 */ /* MSCAN_CANIDMR5: AM=0xFF */ MSCAN_CANIDMR5 = MSCAN_CANIDMR_BANK_2_AM(0xFF); /* Set the acceptance mask - register MSCAN_CANIDMR5 */ /* MSCAN_CANIDMR6: AM=0xFF */ MSCAN_CANIDMR6 = MSCAN_CANIDMR_BANK_2_AM(0xFF); /* Set the acceptance mask - register MSCAN_CANIDMR6 */ /* MSCAN_CANIDMR7: AM=0xFF */ MSCAN_CANIDMR7 = MSCAN_CANIDMR_BANK_2_AM(0xFF); /* Set the acceptance mask - register MSCAN_CANIDMR7 */ /* MSCAN_CANIDAR0: AC=0xFF */ MSCAN_CANIDAR0 = MSCAN_CANIDAR_BANK_1_AC(0xFF); /* Set the acceptance code - register MSCAN_CANIDAR0 */ /* MSCAN_CANIDAR1: AC=0xFF */ MSCAN_CANIDAR1 = MSCAN_CANIDAR_BANK_1_AC(0xFF); /* Set the acceptance code - register MSCAN_CANIDAR1 */ /* MSCAN_CANIDAR2: AC=0xFF */ MSCAN_CANIDAR2 = MSCAN_CANIDAR_BANK_1_AC(0xFF); /* Set the acceptance code - register MSCAN_CANIDAR2 */ /* MSCAN_CANIDAR3: AC=0xFF */ MSCAN_CANIDAR3 = MSCAN_CANIDAR_BANK_1_AC(0xFF); /* Set the acceptance code - register MSCAN_CANIDAR3 */ /* MSCAN_CANIDAR4: AC=0xFF */ MSCAN_CANIDAR4 = MSCAN_CANIDAR_BANK_2_AC(0xFF); /* Set the acceptance code - register MSCAN_CANIDAR4 */ /* MSCAN_CANIDAR5: AC=0xFF */ MSCAN_CANIDAR5 = MSCAN_CANIDAR_BANK_2_AC(0xFF); /* Set the acceptance code - register MSCAN_CANIDAR5 */ /* MSCAN_CANIDAR6: AC=0xFF */ MSCAN_CANIDAR6 = MSCAN_CANIDAR_BANK_2_AC(0xFF); /* Set the acceptance code - register MSCAN_CANIDAR6 */ /* MSCAN_CANIDAR7: AC=0xFF */ MSCAN_CANIDAR7 = MSCAN_CANIDAR_BANK_2_AC(0xFF); /* Set the acceptance code - register MSCAN_CANIDAR7 */ /* MSCAN_CANBTR0: SJW=0,BRP=6 */ MSCAN_CANBTR0 = (MSCAN_CANBTR0_SJW(0x00) | MSCAN_CANBTR0_BRP(0x06)); /* Set the timing register 0 */ /* MSCAN_CANBTR1: SAMP=0,TSEG2=1,TSEG1=3 */ MSCAN_CANBTR1 = (MSCAN_CANBTR1_TSEG2(0x01) | MSCAN_CANBTR1_TSEG1(0x03)); /* Set the timing register 1 */ DeviceDataPrv->TxBuffersPendingMask = 0x00U; /* Clear Tx request pending message buffer mask */ MSCAN_PDD_EnableInitializationMode(MSCAN_BASE_PTR, PDD_DISABLE); /* Exit from initialization mode */ while(MSCAN_PDD_GetInitializationModeAcknowledgeFlag(MSCAN_BASE_PTR) != 0U) {} /* Wait for enable */ MSCAN_PDD_ClearRxStatusInterruptFlags(MSCAN_BASE_PTR, (MSCAN_PDD_WAKEUP_REQUESTED_FLAG | MSCAN_PDD_ERROR_COUNTER_CHANGE_FLAG | MSCAN_PDD_RX_BUFFER_OVERRUN_FLAG)); /* Reset interrupt flags */ MSCAN_PDD_EnableRxInterruptsMask(MSCAN_BASE_PTR, MSCAN_PDD_RX_BUFFER_FULL_INT); /* Enable/configure interrupt */ /* Registration of the device structure */ PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_CAN1_ID,DeviceDataPrv); return ((LDD_TDeviceDataPtr)DeviceDataPrv); }