__s32 lcdc_clk_exit(__u32 screen_id)
{
	if(screen_id == 0) {
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_lcd0ch0mclk0, RST_VAILD);
#endif
		OSAL_CCMU_MclkOnOff(h_lcd0ahbclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd0ch0mclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk1, CLK_OFF);
		OSAL_CCMU_CloseMclk(h_lcd0ahbclk);
		OSAL_CCMU_CloseMclk(h_lcd0ch0mclk0);
		OSAL_CCMU_CloseMclk(h_lcd0ch1mclk1);

		g_clk_status &= (CLK_LCDC0_AHB_OFF & CLK_LCDC0_MOD0_OFF & CLK_LCDC0_MOD1_OFF);
	}	else if(screen_id == 1)	{
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_lcd1ch0mclk0, RST_VAILD);
#endif
		OSAL_CCMU_MclkOnOff(h_lcd1ahbclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd1ch0mclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk1, CLK_OFF);
		OSAL_CCMU_CloseMclk(h_lcd1ahbclk);
		OSAL_CCMU_CloseMclk(h_lcd1ch0mclk0);
		OSAL_CCMU_CloseMclk(h_lcd1ch1mclk1);

		g_clk_status &= (CLK_LCDC1_AHB_OFF & CLK_LCDC1_MOD0_OFF & CLK_LCDC1_MOD1_OFF);
	}
	return DIS_SUCCESS;
}
Esempio n. 2
0
//0: mod clk gating, rst
//1: dram clk gating
__s32 deu_clk_open(__u32 sel, __u32 type)
{
	if(!sel) {
		if(type == 0) {
			//OSAL_CCMU_MclkReset(h_deumclk0, RST_INVAILD);
			OSAL_CCMU_MclkOnOff(h_deuahbclk0, CLK_ON);
			OSAL_CCMU_MclkOnOff(h_deumclk0, CLK_ON);

			g_deu_clk_status  |= (CLK_DEU0_AHB_ON | CLK_DEU0_MOD_ON);
		}	else {
			OSAL_CCMU_MclkOnOff(h_deudramclk0, CLK_ON);
			g_deu_clk_status |= (CLK_DEU0_DRAM_ON);
		}
	} else {
		if(type == 0) {
			//OSAL_CCMU_MclkReset(h_deumclk1, RST_INVAILD);
			OSAL_CCMU_MclkOnOff(h_deuahbclk1, CLK_ON);
			OSAL_CCMU_MclkOnOff(h_deumclk1, CLK_ON);

			g_deu_clk_status  |= (CLK_DEU1_AHB_ON | CLK_DEU1_MOD_ON);
		}	else {
			OSAL_CCMU_MclkOnOff(h_deudramclk1, CLK_ON);
			g_deu_clk_status |= (CLK_DEU1_DRAM_ON);
		}
	}
	return DIS_SUCCESS;
}
Esempio n. 3
0
__s32 image_clk_exit(__u32 sel)
{
	if (sel == 0) {
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_debe0mclk, RST_VALID);
#endif
		OSAL_CCMU_MclkOnOff(h_debe0ahbclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_debe0dramclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_debe0mclk, CLK_OFF);
		OSAL_CCMU_CloseMclk(h_debe0ahbclk);
		OSAL_CCMU_CloseMclk(h_debe0dramclk);
		OSAL_CCMU_CloseMclk(h_debe0mclk);

		g_clk_status &= ~(CLK_DEBE0_AHB_ON | CLK_DEBE0_MOD_ON |
				  CLK_DEBE0_DRAM_ON);
	} else if (sel == 1) {
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_debe1mclk, RST_VALID);
#endif
		OSAL_CCMU_MclkOnOff(h_debe1ahbclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_debe1dramclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_debe1mclk, CLK_OFF);
		OSAL_CCMU_CloseMclk(h_debe1ahbclk);
		OSAL_CCMU_CloseMclk(h_debe1dramclk);
		OSAL_CCMU_CloseMclk(h_debe1mclk);

		g_clk_status &= ~(CLK_DEBE1_AHB_ON | CLK_DEBE1_MOD_ON |
				  CLK_DEBE1_DRAM_ON);
	}

	return DIS_SUCCESS;
}
__s32 scaler_clk_exit(__u32 scaler_id)
{
	if(scaler_id == 0) {
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_defe0mclk, RST_VAILD);
#endif
		OSAL_CCMU_MclkOnOff(h_defe0ahbclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_defe0dramclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_defe0mclk, CLK_OFF);
		OSAL_CCMU_CloseMclk(h_defe0ahbclk);
		OSAL_CCMU_CloseMclk(h_defe0dramclk);
		OSAL_CCMU_CloseMclk(h_defe0mclk);

		g_clk_status &= (CLK_DEFE0_AHB_OFF & CLK_DEFE0_MOD_OFF & CLK_DEFE0_DRAM_OFF);
	}	else if(scaler_id == 1) {
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_defe1mclk, RST_VAILD);
#endif
		OSAL_CCMU_MclkOnOff(h_defe1ahbclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_defe1dramclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_defe1mclk, CLK_OFF);
		OSAL_CCMU_CloseMclk(h_defe1ahbclk);
		OSAL_CCMU_CloseMclk(h_defe1dramclk);
		OSAL_CCMU_CloseMclk(h_defe1mclk);

		g_clk_status &= (CLK_DEFE1_AHB_OFF & CLK_DEFE1_MOD_OFF & CLK_DEFE1_DRAM_OFF);
	}

	return DIS_SUCCESS;
}
Esempio n. 5
0
//0: mod clk gating, rst
//1: dram clk gating
__s32 drc_clk_close(__u32 sel, __u32 type)
{
	if(!sel) {
		if(type == 0) {
			OSAL_CCMU_MclkOnOff(h_drcahbclk0, CLK_OFF);
			OSAL_CCMU_MclkOnOff(h_drcmclk0, CLK_OFF);
			//OSAL_CCMU_MclkReset(h_drcmclk0, RST_VAILD);
			g_drc_clk_status &= (CLK_DRC0_AHB_OFF & CLK_DRC0_MOD_OFF);
		}	else {
			OSAL_CCMU_MclkOnOff(h_drcdramclk0, CLK_OFF);
			g_drc_clk_status &= (CLK_DRC0_DRAM_OFF);
		}
	} else {
		if(type == 0)	{
			OSAL_CCMU_MclkOnOff(h_drcahbclk1, CLK_OFF);
			OSAL_CCMU_MclkOnOff(h_drcmclk1, CLK_OFF);
			//OSAL_CCMU_MclkReset(h_drcmclk1, RST_VAILD);
			g_drc_clk_status &= (CLK_DRC1_AHB_OFF & CLK_DRC1_MOD_OFF);
		}	else {
			OSAL_CCMU_MclkOnOff(h_drcdramclk1, CLK_OFF);
			g_drc_clk_status &= (CLK_DRC1_DRAM_OFF);
		}
	}
	return DIS_SUCCESS;
}
__s32 dsi_clk_init(void)
{
	DE_INF("dsi clk init\n");
	h_dsiahbclk= OSAL_CCMU_OpenMclk(AHB_CLK_MIPIDSI);
	h_dsimclk_s= OSAL_CCMU_OpenMclk(MOD_CLK_MIPIDSIS);
	h_dsimclk_p = OSAL_CCMU_OpenMclk(MOD_CLK_MIPIDSIP);

	OSAL_CCMU_SetMclkSrc(h_dsimclk_s, CLK_DSI_SRC);
	OSAL_CCMU_SetMclkDiv(h_dsimclk_s, 1);
	OSAL_CCMU_SetMclkSrc(h_dsimclk_p, CLK_DSI_SRC);
	OSAL_CCMU_SetMclkDiv(h_dsimclk_p, 2);

	OSAL_CCMU_MclkOnOff(h_dsimclk_s, CLK_ON);
	OSAL_CCMU_MclkOnOff(h_dsimclk_s, CLK_OFF);
	OSAL_CCMU_MclkOnOff(h_dsimclk_p, CLK_ON);
	OSAL_CCMU_MclkOnOff(h_dsimclk_p, CLK_OFF);
#ifdef RESET_OSAL
	OSAL_CCMU_MclkReset(h_dsimclk_s, RST_INVAILD);
	OSAL_CCMU_MclkReset(h_dsimclk_p, RST_INVAILD);
#endif

	return DIS_SUCCESS;
}
Esempio n. 7
0
//----------------------------
//----hdmi local functions----
//----------------------------
s32 hdmi_clk_init(struct disp_hdmi *hdmi)
{
	struct disp_hdmi_private_data *hdmip = disp_hdmi_get_priv(hdmi);
	if(!hdmi || !hdmip) {
	    DE_WRN("hdmi clk init null hdl!\n");
	    return DIS_FAIL;
	}

	if(hdmip->hdmi_clk.clk && hdmip->hdmi_ddc_clk.clk && hdmi_init_flags == 0) {
		hdmi_init_flags = 1;

		hdmip->hdmi_clk.h_clk = OSAL_CCMU_OpenMclk(hdmip->hdmi_clk.clk);
		OSAL_CCMU_SetMclkSrc(hdmip->hdmi_clk.h_clk);
		OSAL_CCMU_MclkOnOff(hdmip->hdmi_clk.h_clk, CLK_ON);
		OSAL_CCMU_CloseMclk(hdmip->hdmi_clk.h_clk);

		hdmip->hdmi_ddc_clk.h_clk = OSAL_CCMU_OpenMclk(hdmip->hdmi_ddc_clk.clk);
		OSAL_CCMU_MclkOnOff(hdmip->hdmi_ddc_clk.h_clk, CLK_ON);
		OSAL_CCMU_CloseMclk(hdmip->hdmi_ddc_clk.h_clk);

#if defined(__LINUX_PLAT__)
		{
			unsigned long flags;
			spin_lock_irqsave(&hdmi_data_lock, flags);
#endif
			hdmip->hdmi_clk.enabled = 1;
			hdmip->hdmi_ddc_clk.enabled = 1;

#if defined(__LINUX_PLAT__)
			spin_unlock_irqrestore(&hdmi_data_lock, flags);
		}
#endif

	}

	return 0;
}
Esempio n. 8
0
__s32 hdmi_clk_init(void)
{
	h_hdmiahbclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_AHB_HDMI);
	h_hdmimclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_HDMI);
#ifdef RESET_OSAL
	OSAL_CCMU_MclkReset(h_hdmimclk, RST_INVALID);
#endif
#ifdef CONFIG_ARCH_SUN4I
	OSAL_CCMU_SetMclkSrc(h_hdmimclk, AW_SYS_CLK_PLL7);
#else
	OSAL_CCMU_SetMclkSrc(h_hdmimclk, AW_SYS_CLK_PLL3);
#endif
	OSAL_CCMU_SetMclkDiv(h_hdmimclk, 1);

	OSAL_CCMU_MclkOnOff(h_hdmiahbclk, CLK_ON);
	g_clk_status |= CLK_HDMI_AHB_ON;

#ifdef CONFIG_ARCH_SUN5I
	OSAL_CCMU_MclkOnOff(h_hdmimclk, CLK_ON);
	g_clk_status |= CLK_HDMI_MOD_ON;
#endif

	return DIS_SUCCESS;
}
__s32 hdmi_clk_init(void)
{
	h_hdmiahbclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_AHB_HDMI);
	h_hdmimclk   = OSAL_CCMU_OpenMclk(AW_MOD_CLK_HDMI);
#ifdef RESET_OSAL
	OSAL_CCMU_MclkReset(h_hdmimclk, RST_INVAILD);
#endif	
	OSAL_CCMU_SetMclkSrc(h_hdmimclk, AW_SYS_CLK_PLL7);
	OSAL_CCMU_SetMclkDiv(h_hdmimclk, 1);

	OSAL_CCMU_MclkOnOff(h_hdmiahbclk, CLK_ON);
	g_clk_status |= CLK_HDMI_AHB_ON;
        hdmi_clk_on();
	return DIS_SUCCESS;
}
Esempio n. 10
0
__s32 deu_clk_exit(__u32 sel)
{
	if(!sel)
	{
		OSAL_CCMU_MclkReset(h_deumclk0, RST_VAILD);

		if(g_deu_clk_status & CLK_DEU0_DRAM_ON)
		{
			OSAL_CCMU_MclkOnOff(h_deudramclk0, CLK_OFF);
		}

		if(g_deu_clk_status & CLK_DEU0_MOD_ON)
		{
			OSAL_CCMU_MclkOnOff(h_deumclk0, CLK_OFF);
		}

		if(g_deu_clk_status & CLK_DEU0_AHB_ON)
		{
			OSAL_CCMU_MclkOnOff(h_deuahbclk0, CLK_OFF);
		}

		OSAL_CCMU_CloseMclk(h_deuahbclk0);
	    OSAL_CCMU_CloseMclk(h_deudramclk0);
	    OSAL_CCMU_CloseMclk(h_deumclk0);

		g_deu_clk_status &= (CLK_DEU0_AHB_OFF & CLK_DEU0_MOD_OFF & CLK_DEU0_DRAM_OFF);
	}
	else
	{
		OSAL_CCMU_MclkReset(h_deumclk1, RST_VAILD);

		if(g_deu_clk_status & CLK_DEU1_DRAM_ON)
		{
			OSAL_CCMU_MclkOnOff(h_deudramclk1, CLK_OFF);
		}

		if(g_deu_clk_status & CLK_DEU1_MOD_ON)
		{
			OSAL_CCMU_MclkOnOff(h_deumclk1, CLK_OFF);
		}

		if(g_deu_clk_status & CLK_DEU1_AHB_ON)
		{
			OSAL_CCMU_MclkOnOff(h_deuahbclk1, CLK_OFF);
		}

		OSAL_CCMU_CloseMclk(h_deuahbclk1);
	    OSAL_CCMU_CloseMclk(h_deudramclk1);
	    OSAL_CCMU_CloseMclk(h_deumclk1);

		g_deu_clk_status &= (CLK_DEU1_AHB_OFF & CLK_DEU1_MOD_OFF & CLK_DEU1_DRAM_OFF);
	}
    return DIS_SUCCESS;
}
Esempio n. 11
0
//type 0:rst, ahb clk
//type 1: mod clk
__s32 lcdc_clk_on(__u32 screen_id, __u32 tcon_index, __u32 type)
{
	if(screen_id == 0) {
		if(type == 0)	{
			OSAL_CCMU_MclkOnOff(h_lcd0ahbclk, CLK_ON);
#ifdef RESET_OSAL
			OSAL_CCMU_MclkReset(h_lcd0ch0mclk0, RST_INVAILD);
#endif
			g_clk_status |= CLK_LCDC0_AHB_ON;
		}	else if(type == 1) {
			if((tcon_index == 0) || (tcon_index == 0xff))	{
				OSAL_CCMU_MclkOnOff(h_lcd0ch0mclk0, CLK_ON);
				g_clk_status |= CLK_LCDC0_MOD0_ON;
			}	else if((tcon_index == 1) || (tcon_index == 0xff)) {
				OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk1, CLK_ON);
				OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk2, CLK_ON);

				g_clk_status |= CLK_LCDC0_MOD1_ON;
			}
		}
	}	else if(screen_id == 1)	{
		if(type == 0)	{
			OSAL_CCMU_MclkOnOff(h_lcd1ahbclk, CLK_ON);
#ifdef RESET_OSAL
			OSAL_CCMU_MclkReset(h_lcd1ch0mclk0, RST_INVAILD);
#endif
			g_clk_status |= CLK_LCDC1_AHB_ON;
		}	else if(type == 1) {
			if((tcon_index == 0) || (tcon_index == 0xff))	{
				OSAL_CCMU_MclkOnOff(h_lcd1ch0mclk0, CLK_ON);
				g_clk_status |= CLK_LCDC1_MOD0_ON;
			}	else if((tcon_index == 1) || (tcon_index == 0xff)) {
				OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk1, CLK_ON);
				OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk2, CLK_ON);

				g_clk_status |= CLK_LCDC1_MOD1_ON;
			}
		}
	}
	return	DIS_SUCCESS;
}
Esempio n. 12
0
static s32 hdmi_clk_disable(struct disp_hdmi *hdmi)
{
	struct disp_hdmi_private_data *hdmip = disp_hdmi_get_priv(hdmi);
	if(!hdmi || !hdmip) {
	    DE_WRN("hdmi clk init null hdl!\n");
	    return DIS_FAIL;
	}

	disp_al_hdmi_disable(hdmi->channel_id);

	hdmip->lcd_clk.h_clk = OSAL_CCMU_OpenMclk(hdmip->lcd_clk.clk);
	OSAL_CCMU_MclkOnOff(hdmip->lcd_clk.h_clk, CLK_OFF);
	OSAL_CCMU_CloseMclk(hdmip->lcd_clk.h_clk);

	if(hdmip->drc_clk.clk)
		disp_al_hdmi_clk_disable(hdmip->drc_clk.clk);

	return 0;
}
Esempio n. 13
0
__s32 drc_clk_exit(__u32 sel)
{
	if(!sel) {
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_drcmclk0, RST_VAILD);
#endif

		if(g_drc_clk_status & CLK_DRC0_DRAM_ON) {
			OSAL_CCMU_MclkOnOff(h_drcdramclk0, CLK_OFF);
		}

		if(g_drc_clk_status & CLK_DRC0_MOD_ON) {
			OSAL_CCMU_MclkOnOff(h_drcmclk0, CLK_OFF);
		}

		if(g_drc_clk_status & CLK_DRC0_AHB_ON) {
			OSAL_CCMU_MclkOnOff(h_drcahbclk0, CLK_OFF);
		}

		OSAL_CCMU_CloseMclk(h_drcahbclk0);
		OSAL_CCMU_CloseMclk(h_drcdramclk0);
		OSAL_CCMU_CloseMclk(h_drcmclk0);
		g_drc_clk_status &= (CLK_DRC0_AHB_OFF & CLK_DRC0_MOD_OFF & CLK_DRC0_DRAM_OFF);
	} else {
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_drcmclk1, RST_VAILD);
#endif

		if(g_drc_clk_status & CLK_DRC1_DRAM_ON) {
			OSAL_CCMU_MclkOnOff(h_drcdramclk1, CLK_OFF);
		}

		if(g_drc_clk_status & CLK_DRC1_MOD_ON) {
			OSAL_CCMU_MclkOnOff(h_drcmclk1, CLK_OFF);
		}

		if(g_drc_clk_status & CLK_DRC1_AHB_ON) {
			OSAL_CCMU_MclkOnOff(h_drcahbclk1, CLK_OFF);
		}

		OSAL_CCMU_CloseMclk(h_drcahbclk1);
		OSAL_CCMU_CloseMclk(h_drcdramclk1);
		OSAL_CCMU_CloseMclk(h_drcmclk1);
		g_drc_clk_status &= (CLK_DRC1_AHB_OFF & CLK_DRC1_MOD_OFF & CLK_DRC1_DRAM_OFF);
	}
    return DIS_SUCCESS;
}
Esempio n. 14
0
__s32 lcdc_clk_off(__u32 sel)
{
	if (sel == 0) {
		OSAL_CCMU_MclkOnOff(h_lcd0ch0mclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk1, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk2, CLK_OFF);

		g_clk_status &= ~(CLK_LCDC0_MOD0_ON | CLK_LCDC0_MOD1_ON);
	} else if (sel == 1) {
		OSAL_CCMU_MclkOnOff(h_lcd1ch0mclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk1, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk2, CLK_OFF);

		g_clk_status &= ~(CLK_LCDC1_MOD0_ON | CLK_LCDC1_MOD1_ON);
	}
	return DIS_SUCCESS;
}
Esempio n. 15
0
static s32 hdmi_clk_config(struct disp_hdmi *hdmi)
{
	struct disp_hdmi_private_data *hdmip = disp_hdmi_get_priv(hdmi);
	if(!hdmi || !hdmip) {
	    DE_WRN("hdmi clk init null hdl!\n");
	    return DIS_FAIL;
	}

	//set hdmi clk
	hdmip->hdmi_clk.h_clk = OSAL_CCMU_OpenMclk(hdmip->hdmi_clk.clk);

	OSAL_CCMU_SetMclkFreq(hdmip->hdmi_clk.h_clk, hdmip->video_info->pixel_clk * (hdmip->video_info->avi_pr + 1));

	OSAL_CCMU_CloseMclk(hdmip->hdmi_clk.h_clk);

	//set lcd clk
	hdmip->lcd_clk.h_clk = OSAL_CCMU_OpenMclk(hdmip->lcd_clk.clk);
	OSAL_CCMU_SetMclkSrc(hdmip->lcd_clk.h_clk);
	OSAL_CCMU_SetMclkFreq(hdmip->lcd_clk.h_clk, hdmip->video_info->pixel_clk * (hdmip->video_info->avi_pr + 1));
	OSAL_CCMU_MclkOnOff(hdmip->lcd_clk.h_clk, CLK_ON);
	OSAL_CCMU_CloseMclk(hdmip->lcd_clk.h_clk);

	return 0;
}
Esempio n. 16
0
__s32 scaler_clk_init(__u32 scaler_id)
{
	__u32 pll_freq;
	__u32 mclk_div;

	DE_INF("scaler %d clk init\n", scaler_id);
	if(scaler_id == 0) {
		h_defe0ahbclk = OSAL_CCMU_OpenMclk(AHB_CLK_DEFE0);
		h_defe0dramclk = OSAL_CCMU_OpenMclk(DRAM_CLK_DEFE0);
		h_defe0mclk = OSAL_CCMU_OpenMclk(MOD_CLK_DEFE0);

		OSAL_CCMU_SetMclkSrc(h_defe0mclk, CLK_FE_SRC);
		pll_freq = OSAL_CCMU_GetSrcFreq(CLK_FE_SRC);
		mclk_div = 1;
#if (defined(CONFIG_ARCH_SUN8IW3P1) || defined (CONFIG_ARCH_SUN8IW5P1))
		while((pll_freq / mclk_div) > 300000000) {
			mclk_div ++;
		}
#else
		while((pll_freq / mclk_div) > 300000000) {
			mclk_div ++;
		}
#endif

		OSAL_CCMU_SetMclkDiv(h_defe0mclk, mclk_div);

		OSAL_CCMU_MclkOnOff(h_defe0ahbclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_defe0ahbclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_defe0mclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_defe0mclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_defe0dramclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_defe0dramclk, CLK_OFF);
#ifdef RESET_OSAL
		//OSAL_CCMU_MclkReset(h_defe0mclk, RST_INVAILD);
#endif
	}	else if(scaler_id == 1)	{
		h_defe1ahbclk = OSAL_CCMU_OpenMclk(AHB_CLK_DEFE1);
		h_defe1dramclk = OSAL_CCMU_OpenMclk(DRAM_CLK_DEFE1);
		h_defe1mclk = OSAL_CCMU_OpenMclk(MOD_CLK_DEFE1);

		OSAL_CCMU_SetMclkSrc(h_defe1mclk, CLK_FE_SRC);
		pll_freq = OSAL_CCMU_GetSrcFreq(CLK_FE_SRC);
		mclk_div = 1;
#if (defined(CONFIG_ARCH_SUN8IW3P1) || defined (CONFIG_ARCH_SUN8IW5P1))
		while((pll_freq / mclk_div) > 300000000) {
			mclk_div ++;
		}
#else
		while((pll_freq / mclk_div) > 300000000) {
			mclk_div ++;
		}
#endif

		OSAL_CCMU_SetMclkDiv(h_defe1mclk, mclk_div);

		OSAL_CCMU_MclkOnOff(h_defe1ahbclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_defe1ahbclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_defe1mclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_defe1mclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_defe1dramclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_defe1dramclk, CLK_OFF);
#ifdef RESET_OSAL
		//OSAL_CCMU_MclkReset(h_defe1mclk, RST_INVAILD);
#endif
	}
	return DIS_SUCCESS;
}
Esempio n. 17
0
//type==1: open ahb clk and image mclk
//type==2: open all clk except ahb clk and image mclk
//type==3: open all clk
__s32 BSP_disp_clk_on(__u32 type)
{
    if(type & 1)
    {
//AHB CLK
    	if((g_clk_status & CLK_DEFE0_AHB_ON) == CLK_DEFE0_AHB_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_defe0ahbclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_DEFE1_AHB_ON) == CLK_DEFE1_AHB_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_defe1ahbclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_DEBE0_AHB_ON) == CLK_DEBE0_AHB_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_debe0ahbclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_DEBE1_AHB_ON) == CLK_DEBE1_AHB_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_debe1ahbclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_LCDC0_AHB_ON) == CLK_LCDC0_AHB_ON)	//OK?? REG wont clear?
    	{
    		OSAL_CCMU_MclkOnOff(h_lcd0ahbclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_LCDC1_AHB_ON) == CLK_LCDC1_AHB_ON)	//OK?? REG wont clear?
    	{
    		OSAL_CCMU_MclkOnOff(h_lcd1ahbclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_HDMI_AHB_ON) == CLK_HDMI_AHB_ON)	
    	{
    		OSAL_CCMU_MclkOnOff(h_hdmiahbclk, CLK_ON);
    	}
    	//OSAL_CCMU_MclkOnOff(h_tveahbclk, CLK_ON);

//MODULE CLK
    	if((g_clk_status & CLK_DEBE0_MOD_ON) == CLK_DEBE0_MOD_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_debe0mclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_DEBE1_MOD_ON) == CLK_DEBE1_MOD_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_debe1mclk, CLK_ON);
    	}
        if((g_clk_status & CLK_HDMI_MOD_ON) == CLK_HDMI_MOD_ON)
        {
                OSAL_CCMU_MclkOnOff(h_hdmimclk, CLK_ON);
        }

	}
	
	if(type & 2)
	{
//DRAM CLK
    	if((g_clk_status & CLK_DEFE0_DRAM_ON) == CLK_DEFE0_DRAM_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_defe0dramclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_DEFE1_DRAM_ON) == CLK_DEFE1_DRAM_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_defe1dramclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_DEBE0_DRAM_ON) == CLK_DEBE0_DRAM_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_debe0dramclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_DEBE1_DRAM_ON) == CLK_DEBE1_DRAM_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_debe1dramclk, CLK_ON);
    	}
    	
//MODULE CLK
    	if((g_clk_status & CLK_DEFE0_MOD_ON) == CLK_DEFE0_MOD_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_defe0mclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_DEFE1_MOD_ON) == CLK_DEFE1_MOD_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_defe1mclk, CLK_ON);
    	}
    	if((g_clk_status & CLK_LCDC0_MOD0_ON) == CLK_LCDC0_MOD0_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_lcd0ch0mclk0, CLK_ON);
    	}
    	if((g_clk_status & CLK_LCDC0_MOD1_ON) == CLK_LCDC0_MOD1_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk1, CLK_ON);
    		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk2, CLK_ON);
    	}
    	if((g_clk_status & CLK_LCDC1_MOD0_ON) == CLK_LCDC1_MOD0_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_lcd1ch0mclk0, CLK_ON);
    	}
    	if((g_clk_status & CLK_LCDC1_MOD1_ON) == CLK_LCDC1_MOD1_ON)
    	{
    		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk1, CLK_ON);
    		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk2, CLK_ON);
    	}
    }
    
    if(type == 2)
    {
    	if((g_clk_status & CLK_DEBE0_MOD_ON) == CLK_DEBE0_MOD_ON)
    	{
    		OSAL_CCMU_SetMclkDiv(h_debe0mclk, 2);
    	}
    	if((g_clk_status & CLK_DEBE1_MOD_ON) == CLK_DEBE1_MOD_ON)
    	{
    		OSAL_CCMU_SetMclkDiv(h_debe1mclk, 2);
    	}
    }

	return DIS_SUCCESS;
}
Esempio n. 18
0
__s32 lcdc_clk_init(__u32 screen_id)
{
	DE_INF("lcd %d clk init\n", screen_id);
	if(screen_id == 0) {
		h_lcd0ahbclk   = OSAL_CCMU_OpenMclk(AHB_CLK_LCD0);
		h_lcd0ch0mclk0 = OSAL_CCMU_OpenMclk(MOD_CLK_LCD0CH0);
		h_lcd0ch1mclk1 = OSAL_CCMU_OpenMclk(MOD_CLK_LCD0CH1);
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_lcd0ch0mclk0, RST_INVAILD);
#endif
		OSAL_CCMU_SetMclkSrc(h_lcd0ch0mclk0, CLK_LCD_CH0_SRC);
		OSAL_CCMU_SetMclkSrc(h_lcd0ch1mclk1, CLK_LCD_CH1_SRC);
		OSAL_CCMU_SetMclkDiv(h_lcd0ch1mclk1, 10);

		OSAL_CCMU_MclkOnOff(h_lcd0ahbclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd0ahbclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd0ch0mclk0, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd0ch0mclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk1, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk1, CLK_OFF);
	}	else if(screen_id == 1)	{
		h_lcd1ahbclk   = OSAL_CCMU_OpenMclk(AHB_CLK_LCD1);
		h_lcd1ch0mclk0 = OSAL_CCMU_OpenMclk(MOD_CLK_LCD1CH0);
		h_lcd1ch1mclk1 = OSAL_CCMU_OpenMclk(MOD_CLK_LCD1CH1);
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_lcd1ch0mclk0, RST_INVAILD);
#endif
		OSAL_CCMU_SetMclkSrc(h_lcd1ch0mclk0, CLK_LCD_CH0_SRC);
		OSAL_CCMU_SetMclkSrc(h_lcd1ch1mclk1, CLK_LCD_CH1_SRC);
		OSAL_CCMU_SetMclkDiv(h_lcd1ch1mclk1, 10);

		OSAL_CCMU_MclkOnOff(h_lcd1ahbclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd1ahbclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd1ch0mclk0, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd1ch0mclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk1, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk1, CLK_OFF);
	}
	return DIS_SUCCESS;
}
Esempio n. 19
0
__s32 image_clk_init(__u32 sel)
{
	__u32 dram_pll;
	
	if(sel == 0)
	{
		h_debe0ahbclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_AHB_DEBE0);
		h_debe0mclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_DEBE0);
		h_debe0dramclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_SDRAM_DEBE0);

		//NEW OSAL_clk reset
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_debe0mclk, RST_INVAILD);
#endif	
		OSAL_CCMU_SetMclkSrc(h_debe0mclk, AW_SYS_CLK_PLL5P);	//FIX CONNECT TO DRAM PLL

		dram_pll = OSAL_CCMU_GetSrcFreq(AW_SYS_CLK_PLL5P);
		if(dram_pll < 300000000)
		{
			OSAL_CCMU_SetMclkDiv(h_debe0mclk, 1);
		}
		else
		{
			OSAL_CCMU_SetMclkDiv(h_debe0mclk, 2);
		}
		OSAL_CCMU_MclkOnOff(h_debe0ahbclk, CLK_ON);
		//OSAL_CCMU_MclkOnOff(h_debe0dramclk, CLK_ON);
		//OSAL_CCMU_MclkOnOff(h_debe0dramclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_debe0mclk, CLK_ON);

		g_clk_status |= (CLK_DEBE0_AHB_ON | CLK_DEBE0_MOD_ON);
	}
	else if(sel == 1)
	{
		h_debe1ahbclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_AHB_DEBE1);
		h_debe1mclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_DEBE1);
		h_debe1dramclk = OSAL_CCMU_OpenMclk(AW_MOD_CLK_SDRAM_DEBE1);
#ifdef RESET_OSAL
	
        OSAL_CCMU_MclkReset(h_debe1mclk, RST_INVAILD);
#endif 
        OSAL_CCMU_SetMclkSrc(h_debe1mclk, AW_SYS_CLK_PLL5P);	//FIX CONNECT TO DRAM PLL

		dram_pll = OSAL_CCMU_GetSrcFreq(AW_SYS_CLK_PLL5P);
		if(dram_pll < 300000000)
		{
			OSAL_CCMU_SetMclkDiv(h_debe1mclk, 1);
		}
		else
		{
			OSAL_CCMU_SetMclkDiv(h_debe1mclk, 2);
		}

		OSAL_CCMU_MclkOnOff(h_debe1ahbclk, CLK_ON);
		//OSAL_CCMU_MclkOnOff(h_debe1dramclk, CLK_ON);
		//OSAL_CCMU_MclkOnOff(h_debe1dramclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_debe1mclk, CLK_ON);

		g_clk_status |= (CLK_DEBE1_AHB_ON | CLK_DEBE1_MOD_ON);
	}
	return DIS_SUCCESS;

}
Esempio n. 20
0
__s32 lcdc_clk_init(__u32 sel)
{
	if(sel == 0)
	{
		h_lcd0ahbclk   = OSAL_CCMU_OpenMclk(AW_MOD_CLK_AHB_LCD0);
		h_lcd0ch0mclk0 = OSAL_CCMU_OpenMclk(AW_MOD_CLK_LCD0CH0);
		h_lcd0ch1mclk1 = OSAL_CCMU_OpenMclk(AW_MOD_CLK_LCD0CH1_S1);
		h_lcd0ch1mclk2 = OSAL_CCMU_OpenMclk(AW_MOD_CLK_LCD0CH1_S2);
	
		OSAL_CCMU_SetMclkSrc(h_lcd0ch0mclk0, AW_SYS_CLK_PLL3);	//Default to Video Pll0
		OSAL_CCMU_SetMclkSrc(h_lcd0ch1mclk1, AW_SYS_CLK_PLL3);	//Default to Video Pll0
		OSAL_CCMU_SetMclkDiv(h_lcd0ch1mclk2, 10);
		OSAL_CCMU_SetMclkDiv(h_lcd0ch1mclk1, 10);
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_lcd0ch0mclk0, RST_INVAILD);
#endif
		OSAL_CCMU_MclkOnOff(h_lcd0ahbclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd0ch0mclk0, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd0ch0mclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk1, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk1, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk2, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk2, CLK_OFF);

		g_clk_status |= CLK_LCDC0_AHB_ON;
	}
	else if(sel == 1)
	{
		h_lcd1ahbclk   = OSAL_CCMU_OpenMclk(AW_MOD_CLK_AHB_LCD1);
		h_lcd1ch0mclk0 = OSAL_CCMU_OpenMclk(AW_MOD_CLK_LCD1CH0);
		h_lcd1ch1mclk1 = OSAL_CCMU_OpenMclk(AW_MOD_CLK_LCD1CH1_S1);
		h_lcd1ch1mclk2 = OSAL_CCMU_OpenMclk(AW_MOD_CLK_LCD1CH1_S2);

		OSAL_CCMU_SetMclkSrc(h_lcd1ch0mclk0, AW_SYS_CLK_PLL3);	//Default to Video Pll0
		OSAL_CCMU_SetMclkSrc(h_lcd1ch1mclk1, AW_SYS_CLK_PLL3);	//Default to Video Pll0
		OSAL_CCMU_SetMclkDiv(h_lcd1ch1mclk2, 10);
		OSAL_CCMU_SetMclkDiv(h_lcd1ch1mclk1, 10);
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_lcd1ch0mclk0, RST_INVAILD);
#endif
		OSAL_CCMU_MclkOnOff(h_lcd1ahbclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd1ch0mclk0, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd1ch0mclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk1, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk1, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk2, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk2, CLK_OFF);

		g_clk_status |= CLK_LCDC1_AHB_ON;
	}
	return DIS_SUCCESS; 
	
}
Esempio n. 21
0
//type==1: close ahb clk and image mclk
//type==2: close all clk except ahb clk and image mclk
//type==3: close all clk
__s32 bsp_disp_clk_off(__u32 type)
{
	if(type & 1) {
		/* AHB CLK */
		if((g_clk_status & CLK_DEFE0_AHB_ON) == CLK_DEFE0_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe0ahbclk, CLK_OFF);
		}
		if((g_clk_status & CLK_DEFE1_AHB_ON) == CLK_DEFE1_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe1ahbclk, CLK_OFF);
		}
		if((g_clk_status & CLK_DEBE0_AHB_ON) == CLK_DEBE0_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe0ahbclk, CLK_OFF);
		}
		if((g_clk_status & CLK_DEBE1_AHB_ON) == CLK_DEBE1_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe1ahbclk, CLK_OFF);
		}
		if((g_clk_status & CLK_LCDC0_AHB_ON) == CLK_LCDC0_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd0ahbclk, CLK_OFF);
		}
		if((g_clk_status & CLK_LCDC1_AHB_ON) == CLK_LCDC1_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd1ahbclk, CLK_OFF);
		}
		if((g_clk_status & CLK_HDMI_AHB_ON) == CLK_HDMI_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_hdmiahbclk, CLK_OFF);
		}
		if((g_clk_status & CLK_DSI_AHB_ON) == CLK_DSI_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_dsiahbclk, CLK_OFF);
		}
		//OSAL_CCMU_MclkOnOff(h_tveahbclk, CLK_OFF);

		/* MODULE CLK */
		if((g_clk_status & CLK_DEBE0_MOD_ON) == CLK_DEBE0_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe0mclk, CLK_OFF);
		}
		if((g_clk_status & CLK_DEBE1_MOD_ON) == CLK_DEBE1_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe1mclk, CLK_OFF);
		}
	}

	if(type & 2) {
		/* DRAM CLK */
		if((g_clk_status & CLK_DEFE0_DRAM_ON) == CLK_DEFE0_DRAM_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe0dramclk, CLK_OFF);
		}
		if((g_clk_status & CLK_DEFE1_DRAM_ON) == CLK_DEFE1_DRAM_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe1dramclk, CLK_OFF);
		}
		if((g_clk_status & CLK_DEBE0_DRAM_ON) == CLK_DEBE0_DRAM_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe0dramclk, CLK_OFF);
		}
		if((g_clk_status & CLK_DEBE1_DRAM_ON) == CLK_DEBE1_DRAM_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe1dramclk, CLK_OFF);
		}

		/* MODULE CLK */
		if((g_clk_status & CLK_DEFE0_MOD_ON) == CLK_DEFE0_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe0mclk, CLK_OFF);
		}
		if((g_clk_status & CLK_DEFE1_MOD_ON) == CLK_DEFE1_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe1mclk, CLK_OFF);
		}
		if((g_clk_status & CLK_LCDC0_MOD0_ON) == CLK_LCDC0_MOD0_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd0ch0mclk0, CLK_OFF);
		}
		if((g_clk_status & CLK_LCDC0_MOD1_ON) == CLK_LCDC0_MOD1_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk1, CLK_OFF);
		}
		if((g_clk_status & CLK_LCDC1_MOD0_ON) == CLK_LCDC1_MOD0_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd1ch0mclk0, CLK_OFF);
		}
		if((g_clk_status & CLK_LCDC1_MOD1_ON) == CLK_LCDC1_MOD1_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk1, CLK_OFF);
		}
		if((g_clk_status & CLK_HDMI_MOD_ON) == CLK_HDMI_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_hdmimclk, CLK_OFF);
		}
		if((g_clk_status & CLK_HDMI_MOD_DDC_ON) == CLK_HDMI_MOD_DDC_ON) {
			OSAL_CCMU_MclkOnOff(h_hdmimclk_ddc, CLK_OFF);
		}
		if((g_clk_status & CLK_DSI_MOD_ON) == CLK_DSI_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_dsimclk_s, CLK_OFF);
			OSAL_CCMU_MclkOnOff(h_dsimclk_p, CLK_OFF);
		}
	}

	if(type == 2)	{
		if((g_clk_status & CLK_DEBE0_MOD_ON) == CLK_DEBE0_MOD_ON)	{
			OSAL_CCMU_SetMclkDiv(h_debe0mclk, 16);
		}
		if((g_clk_status & CLK_DEBE1_MOD_ON) == CLK_DEBE1_MOD_ON)	{
			OSAL_CCMU_SetMclkDiv(h_debe1mclk, 16);
		}
	}

	return DIS_SUCCESS;
}
Esempio n. 22
0
//type==1: open ahb clk and image mclk
//type==2: open all clk except ahb clk and image mclk
//type==3: open all clk
__s32 bsp_disp_clk_on(__u32 type)
{
	if(type & 1) {
		/* AHB CLK */
		if((g_clk_status & CLK_DEFE0_AHB_ON) == CLK_DEFE0_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe0ahbclk, CLK_ON);
		}
		if((g_clk_status & CLK_DEFE1_AHB_ON) == CLK_DEFE1_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe1ahbclk, CLK_ON);
		}
		if((g_clk_status & CLK_DEBE0_AHB_ON) == CLK_DEBE0_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe0ahbclk, CLK_ON);
		}
		if((g_clk_status & CLK_DEBE1_AHB_ON) == CLK_DEBE1_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe1ahbclk, CLK_ON);
		}
		if((g_clk_status & CLK_LCDC0_AHB_ON) == CLK_LCDC0_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd0ahbclk, CLK_ON);
		}
		if((g_clk_status & CLK_LCDC1_AHB_ON) == CLK_LCDC1_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd1ahbclk, CLK_ON);
		}
		if((g_clk_status & CLK_HDMI_AHB_ON) == CLK_HDMI_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_hdmiahbclk, CLK_ON);
		}
		if((g_clk_status & CLK_DSI_AHB_ON) == CLK_DSI_AHB_ON)	{
			OSAL_CCMU_MclkOnOff(h_dsiahbclk, CLK_ON);
		}
		//OSAL_CCMU_MclkOnOff(h_tveahbclk, CLK_ON);

		/* MODULE CLK */
		if((g_clk_status & CLK_DEBE0_MOD_ON) == CLK_DEBE0_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe0mclk, CLK_ON);
		}
		if((g_clk_status & CLK_DEBE1_MOD_ON) == CLK_DEBE1_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe1mclk, CLK_ON);
		}
	}

	if(type & 2) {
		/* DRAM CLK */
		if((g_clk_status & CLK_DEFE0_DRAM_ON) == CLK_DEFE0_DRAM_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe0dramclk, CLK_ON);
		}
		if((g_clk_status & CLK_DEFE1_DRAM_ON) == CLK_DEFE1_DRAM_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe1dramclk, CLK_ON);
		}
		if((g_clk_status & CLK_DEBE0_DRAM_ON) == CLK_DEBE0_DRAM_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe0dramclk, CLK_ON);
		}
		if((g_clk_status & CLK_DEBE1_DRAM_ON) == CLK_DEBE1_DRAM_ON)	{
			OSAL_CCMU_MclkOnOff(h_debe1dramclk, CLK_ON);
		}

		/* MODULE CLK */
		if((g_clk_status & CLK_DEFE0_MOD_ON) == CLK_DEFE0_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe0mclk, CLK_ON);
		}
		if((g_clk_status & CLK_DEFE1_MOD_ON) == CLK_DEFE1_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_defe1mclk, CLK_ON);
		}
		if((g_clk_status & CLK_LCDC0_MOD0_ON) == CLK_LCDC0_MOD0_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd0ch0mclk0, CLK_ON);
		}
		if((g_clk_status & CLK_LCDC0_MOD1_ON) == CLK_LCDC0_MOD1_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd0ch1mclk1, CLK_ON);
		}
		if((g_clk_status & CLK_LCDC1_MOD0_ON) == CLK_LCDC1_MOD0_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd1ch0mclk0, CLK_ON);
		}
		if((g_clk_status & CLK_LCDC1_MOD1_ON) == CLK_LCDC1_MOD1_ON)	{
			OSAL_CCMU_MclkOnOff(h_lcd1ch1mclk1, CLK_ON);
		}
		if((g_clk_status & CLK_HDMI_MOD_ON) == CLK_HDMI_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_hdmimclk, CLK_ON);
		}
		if((g_clk_status & CLK_HDMI_MOD_DDC_ON) == CLK_HDMI_MOD_DDC_ON)	{
			OSAL_CCMU_MclkOnOff(h_hdmimclk_ddc, CLK_ON);
		}
		if((g_clk_status & CLK_DSI_MOD_ON) == CLK_DSI_MOD_ON)	{
			OSAL_CCMU_MclkOnOff(h_dsimclk_s, CLK_ON);
			OSAL_CCMU_MclkOnOff(h_dsimclk_p, CLK_ON);
		}
	}

	if(type == 2)	{
		if((g_clk_status & CLK_DEBE0_MOD_ON) == CLK_DEBE0_MOD_ON)	{
			__u32 pll_freq;
			__u32 mclk_div;

			pll_freq = OSAL_CCMU_GetSrcFreq(CLK_BE_SRC);
			mclk_div = 1;
#if (defined(CONFIG_ARCH_SUN8IW3P1) || defined (CONFIG_ARCH_SUN8IW5P1))
			while((pll_freq / mclk_div) > 130000000) {
				mclk_div ++;
			}
#else
			while((pll_freq / mclk_div) > 300000000) {
				mclk_div ++;
			}
#endif
			OSAL_CCMU_SetMclkDiv(h_debe0mclk, mclk_div);
		}
		if((g_clk_status & CLK_DEBE1_MOD_ON) == CLK_DEBE1_MOD_ON) {
			__u32 pll_freq;
			__u32 mclk_div;

			pll_freq = OSAL_CCMU_GetSrcFreq(CLK_BE_SRC);
			mclk_div = 1;
#if (defined(CONFIG_ARCH_SUN8IW3P1) || defined (CONFIG_ARCH_SUN8IW5P1))
			while((pll_freq / mclk_div) > 130000000) {
				mclk_div ++;
			}
#else
			while((pll_freq / mclk_div) > 300000000) {
				mclk_div ++;
			}
#endif
			OSAL_CCMU_SetMclkDiv(h_debe1mclk, mclk_div);
		}
	}

	return DIS_SUCCESS;
}
Esempio n. 23
0
__s32 image_clk_init(__u32 screen_id)
{
	__u32 pll_freq;
	__u32 mclk_div;

	DE_INF("image%d clk_init\n", screen_id);
	if(screen_id == 0) {
		h_debe0ahbclk = OSAL_CCMU_OpenMclk(AHB_CLK_DEBE0);
		h_debe0mclk = OSAL_CCMU_OpenMclk(MOD_CLK_DEBE0);
		h_debe0dramclk = OSAL_CCMU_OpenMclk(DRAM_CLK_DEBE0);

#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_debe0mclk, RST_INVAILD);
#endif
		OSAL_CCMU_SetMclkSrc(h_debe0mclk, CLK_BE_SRC);

		pll_freq = OSAL_CCMU_GetSrcFreq(CLK_BE_SRC);
		mclk_div = 1;
#if (defined(CONFIG_ARCH_SUN8IW3P1) || defined (CONFIG_ARCH_SUN8IW5P1))
		while((pll_freq / mclk_div) > 130000000) {
			mclk_div ++;
		}
#else
		while((pll_freq / mclk_div) > 300000000) {
			mclk_div ++;
		}
#endif
		OSAL_CCMU_SetMclkDiv(h_debe0mclk, mclk_div);

		OSAL_CCMU_MclkOnOff(h_debe0ahbclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_debe0dramclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_debe0dramclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_debe0mclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_debe0mclk, CLK_OFF);

		g_clk_status |= (CLK_DEBE0_AHB_ON | CLK_DEBE0_MOD_ON);
	}	else if(screen_id == 1)	{
		h_debe1ahbclk = OSAL_CCMU_OpenMclk(AHB_CLK_DEBE1);
		h_debe1mclk = OSAL_CCMU_OpenMclk(MOD_CLK_DEBE1);
		h_debe1dramclk = OSAL_CCMU_OpenMclk(DRAM_CLK_DEBE1);
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_debe1mclk, RST_INVAILD);
#endif
		OSAL_CCMU_SetMclkSrc(h_debe1mclk, CLK_BE_SRC);//

		pll_freq = OSAL_CCMU_GetSrcFreq(CLK_BE_SRC);
		mclk_div = 1;
#if defined(CONFIG_ARCH_SUN8IW3P1)
		while((pll_freq / mclk_div) > 130000000) {
			mclk_div ++;
		}
#else
		while((pll_freq / mclk_div) > 300000000) {
			mclk_div ++;
		}
#endif
		OSAL_CCMU_SetMclkDiv(h_debe1mclk, mclk_div);

		OSAL_CCMU_MclkOnOff(h_debe1ahbclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_debe1dramclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_debe1dramclk, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_debe1mclk, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_debe1mclk, CLK_OFF);

		g_clk_status |= (CLK_DEBE1_AHB_ON | CLK_DEBE1_MOD_ON);
	}
	return DIS_SUCCESS;
}
Esempio n. 24
0
__s32 deu_clk_init(__u32 sel)
{
	__u32 pll_freq;
	__u32 mclk_div;

	DE_INF("deu %d clk init\n", sel);
	if(!sel) {
		h_deuahbclk0 = OSAL_CCMU_OpenMclk(AHB_CLK_DEU0);
		h_deudramclk0 = OSAL_CCMU_OpenMclk(DRAM_CLK_DEU0);
		h_deumclk0 = OSAL_CCMU_OpenMclk(MOD_CLK_IEPDEU0);


		OSAL_CCMU_SetMclkSrc(h_deumclk0, CLK_FE_SRC);	//FIX CONNECT TO  PLL10
		OSAL_CCMU_SetMclkDiv(h_deumclk0, 1);
		pll_freq = OSAL_CCMU_GetSrcFreq(CLK_FE_SRC);
		mclk_div = 1;
		while((pll_freq / mclk_div) > 300000000) {
			mclk_div ++;
		}
		OSAL_CCMU_SetMclkDiv(h_deumclk0, mclk_div);

		OSAL_CCMU_MclkOnOff(h_deuahbclk0, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_deuahbclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_deudramclk0, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_deudramclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_deumclk0, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_deumclk0, CLK_OFF);
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_deumclk0, RST_INVAILD);
#endif
	}	else {
		h_deuahbclk1 = OSAL_CCMU_OpenMclk(AHB_CLK_DEU1);
		h_deudramclk1 = OSAL_CCMU_OpenMclk(DRAM_CLK_DEU1);
		h_deumclk1 = OSAL_CCMU_OpenMclk(MOD_CLK_IEPDEU1);

		OSAL_CCMU_SetMclkSrc(h_deumclk1, CLK_FE_SRC);	//FIX CONNECT TO PLL9
		OSAL_CCMU_SetMclkDiv(h_deumclk1, 1);
		pll_freq = OSAL_CCMU_GetSrcFreq(CLK_FE_SRC);
		mclk_div = 1;
		while((pll_freq / mclk_div) > 300000000) {
			mclk_div ++;
		}
		OSAL_CCMU_SetMclkDiv(h_deumclk1, mclk_div);

		OSAL_CCMU_MclkOnOff(h_deuahbclk1, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_deuahbclk1, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_deudramclk1, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_deudramclk1, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_deumclk1, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_deumclk1, CLK_OFF);
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_deumclk1, RST_INVAILD);
#endif
	}
	return DIS_SUCCESS;
}
Esempio n. 25
0
__s32 drc_clk_init(__u32 sel)
{
	__u32 pll_freq;
	__u32 mclk_div;

	DE_INF("drc %d clk init\n", sel);
	if(!sel) {
		h_drcahbclk0 = OSAL_CCMU_OpenMclk(AHB_CLK_DRC0);
		h_drcdramclk0 = OSAL_CCMU_OpenMclk(DRAM_CLK_DRC0);
		h_drcmclk0 = OSAL_CCMU_OpenMclk(MOD_CLK_IEPDRC0);

		OSAL_CCMU_SetMclkSrc(h_drcmclk0, CLK_BE_SRC);

		pll_freq = OSAL_CCMU_GetSrcFreq(CLK_BE_SRC);
		mclk_div = 1;
#if defined(CONFIG_ARCH_SUN8IW3P1)
		while((pll_freq / mclk_div) > 200000000) {
			mclk_div ++;
		}
#else
		while((pll_freq / mclk_div) > 300000000) {
			mclk_div ++;
		}
#endif

		OSAL_CCMU_SetMclkDiv(h_drcmclk0, mclk_div);

		OSAL_CCMU_MclkOnOff(h_drcahbclk0, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_drcahbclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_drcdramclk0, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_drcdramclk0, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_drcmclk0, CLK_ON);
		//OSAL_CCMU_MclkOnOff(h_drcmclk0, CLK_OFF);
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_drcmclk0, RST_INVAILD);
#endif
	}	else {
		h_drcahbclk1 = OSAL_CCMU_OpenMclk(AHB_CLK_DRC1);
		h_drcdramclk1 = OSAL_CCMU_OpenMclk(DRAM_CLK_DRC1);
		h_drcmclk1 = OSAL_CCMU_OpenMclk(MOD_CLK_IEPDRC1);

		OSAL_CCMU_SetMclkSrc(h_drcmclk1, CLK_BE_SRC);

		pll_freq = OSAL_CCMU_GetSrcFreq(CLK_BE_SRC);
		mclk_div = 1;
#if defined(CONFIG_ARCH_SUN8IW3P1)
		while((pll_freq / mclk_div) > 200000000) {
			mclk_div ++;
		}
#else
		while((pll_freq / mclk_div) > 300000000) {
			mclk_div ++;
		}
#endif

		OSAL_CCMU_SetMclkDiv(h_drcmclk1, mclk_div);

		OSAL_CCMU_MclkOnOff(h_drcahbclk1, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_drcahbclk1, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_drcdramclk1, CLK_ON);
		OSAL_CCMU_MclkOnOff(h_drcdramclk1, CLK_OFF);
		OSAL_CCMU_MclkOnOff(h_drcmclk1, CLK_ON);
		//OSAL_CCMU_MclkOnOff(h_drcmclk1, CLK_OFF);
#ifdef RESET_OSAL
		OSAL_CCMU_MclkReset(h_drcmclk1, RST_INVAILD);
#endif
	}
	return DIS_SUCCESS;
}