PVRSRV_ERROR IMG_CALLCONV PVRSRVGetMiscInfoKM(PVRSRV_MISC_INFO *psMiscInfo)
#endif
{
SYS_DATA *psSysData;
if(!psMiscInfo)
{
PVR_DPF((PVR_DBG_ERROR,"PVRSRVGetMiscInfoKM: invalid parameters"));
return PVRSRV_ERROR_INVALID_PARAMS;
}
psMiscInfo->ui32StatePresent = 0;
if(psMiscInfo->ui32StateRequest & ~(PVRSRV_MISC_INFO_TIMER_PRESENT
|PVRSRV_MISC_INFO_CLOCKGATE_PRESENT
|PVRSRV_MISC_INFO_MEMSTATS_PRESENT
|PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT
|PVRSRV_MISC_INFO_DDKVERSION_PRESENT
|PVRSRV_MISC_INFO_CPUCACHEOP_PRESENT
|PVRSRV_MISC_INFO_RESET_PRESENT
|PVRSRV_MISC_INFO_FREEMEM_PRESENT))
{
PVR_DPF((PVR_DBG_ERROR,"PVRSRVGetMiscInfoKM: invalid state request flags"));
return PVRSRV_ERROR_INVALID_PARAMS;
}
SysAcquireData(&psSysData);
if(((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_TIMER_PRESENT) != 0UL) &&
(psSysData->pvSOCTimerRegisterKM != IMG_NULL))
{
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_TIMER_PRESENT;
psMiscInfo->pvSOCTimerRegisterKM = psSysData->pvSOCTimerRegisterKM;
psMiscInfo->hSOCTimerRegisterOSMemHandle = psSysData->hSOCTimerRegisterOSMemHandle;
}
else
{
psMiscInfo->pvSOCTimerRegisterKM = IMG_NULL;
psMiscInfo->hSOCTimerRegisterOSMemHandle = IMG_NULL;
}
if(((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_CLOCKGATE_PRESENT) != 0UL) &&
(psSysData->pvSOCClockGateRegsBase != IMG_NULL))
{
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_CLOCKGATE_PRESENT;
psMiscInfo->pvSOCClockGateRegs = psSysData->pvSOCClockGateRegsBase;
psMiscInfo->ui32SOCClockGateRegsSize = psSysData->ui32SOCClockGateRegsSize;
}
if(((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_MEMSTATS_PRESENT) != 0UL) &&
(psMiscInfo->pszMemoryStr != IMG_NULL))
{
RA_ARENA **ppArena;
IMG_CHAR *pszStr;
IMG_UINT32 ui32StrLen;
IMG_INT32 i32Count;
pszStr = psMiscInfo->pszMemoryStr;
ui32StrLen = psMiscInfo->ui32MemoryStrLen;
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_MEMSTATS_PRESENT;
ppArena = &psSysData->apsLocalDevMemArena[0];
while(*ppArena)
{
CHECK_SPACE(ui32StrLen);
i32Count = OSSNPrintf(pszStr, 100, "\nLocal Backing Store:\n");
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
RA_GetStats(*ppArena,
&pszStr,
&ui32StrLen);
ppArena++;
}
List_PVRSRV_DEVICE_NODE_PVRSRV_ERROR_Any_va(psSysData->psDeviceNodeList,
&PVRSRVGetMiscInfoKM_Device_AnyVaCb,
&ui32StrLen,
&i32Count,
&pszStr,
PVRSRV_MISC_INFO_MEMSTATS_PRESENT);
i32Count = OSSNPrintf(pszStr, 100, "\n");
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
}
if(((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_FREEMEM_PRESENT) != 0)
&& psMiscInfo->pszMemoryStr)
{
IMG_CHAR *pszStr;
IMG_UINT32 ui32StrLen;
IMG_INT32 i32Count;
pszStr = psMiscInfo->pszMemoryStr;
ui32StrLen = psMiscInfo->ui32MemoryStrLen;
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_FREEMEM_PRESENT;
List_PVRSRV_DEVICE_NODE_PVRSRV_ERROR_Any_va(psSysData->psDeviceNodeList,
&PVRSRVGetMiscInfoKM_Device_AnyVaCb,
&ui32StrLen,
&i32Count,
&pszStr,
PVRSRV_MISC_INFO_FREEMEM_PRESENT);
i32Count = OSSNPrintf(pszStr, 100, "\n");
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
}
if(((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT) != 0UL) &&
(psSysData->psGlobalEventObject != IMG_NULL))
{
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT;
psMiscInfo->sGlobalEventObject = *psSysData->psGlobalEventObject;
}
if (((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_DDKVERSION_PRESENT) != 0UL)
&& ((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_MEMSTATS_PRESENT) == 0UL)
&& (psMiscInfo->pszMemoryStr != IMG_NULL))
{
IMG_CHAR *pszStr;
IMG_UINT32 ui32StrLen;
IMG_UINT32 ui32LenStrPerNum = 12;
IMG_INT32 i32Count;
IMG_INT i;
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_DDKVERSION_PRESENT;
psMiscInfo->aui32DDKVersion[0] = PVRVERSION_MAJ;
psMiscInfo->aui32DDKVersion[1] = PVRVERSION_MIN;
psMiscInfo->aui32DDKVersion[2] = PVRVERSION_BRANCH;
psMiscInfo->aui32DDKVersion[3] = PVRVERSION_BUILD;
pszStr = psMiscInfo->pszMemoryStr;
ui32StrLen = psMiscInfo->ui32MemoryStrLen;
for (i=0; i<4; i++)
{
if (ui32StrLen < ui32LenStrPerNum)
{
return PVRSRV_ERROR_INVALID_PARAMS;
}
i32Count = OSSNPrintf(pszStr, ui32LenStrPerNum, "%u", psMiscInfo->aui32DDKVersion[i]);
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
if (i != 3)
{
i32Count = OSSNPrintf(pszStr, 2, ".");
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
}
}
}
if((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_CPUCACHEOP_PRESENT) != 0UL)
{
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_CPUCACHEOP_PRESENT;
if(psMiscInfo->sCacheOpCtl.bDeferOp)
{
psSysData->ePendingCacheOpType = psMiscInfo->sCacheOpCtl.eCacheOpType;
}
else
{
#if defined (SUPPORT_SID_INTERFACE)
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo = psMiscInfo->sCacheOpCtl.psKernelMemInfo;
if(!psMiscInfo->sCacheOpCtl.psKernelMemInfo)
#else
PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
PVRSRV_PER_PROCESS_DATA *psPerProc;
if(!psMiscInfo->sCacheOpCtl.u.psKernelMemInfo)
#endif
{
PVR_DPF((PVR_DBG_WARNING, "PVRSRVGetMiscInfoKM: "
"Ignoring non-deferred cache op with no meminfo"));
return PVRSRV_ERROR_INVALID_PARAMS;
}
if(psSysData->ePendingCacheOpType != PVRSRV_MISC_INFO_CPUCACHEOP_NONE)
{
PVR_DPF((PVR_DBG_WARNING, "PVRSRVGetMiscInfoKM: "
"Deferred cache op is pending. It is unlikely you want "
"to combine deferred cache ops with immediate ones"));
}
#if defined (SUPPORT_SID_INTERFACE)
PVR_DBG_BREAK
#else
psPerProc = PVRSRVFindPerProcessData();
if(PVRSRVLookupHandle(psPerProc->psHandleBase,
(IMG_PVOID *)&psKernelMemInfo,
psMiscInfo->sCacheOpCtl.u.psKernelMemInfo,
PVRSRV_HANDLE_TYPE_MEM_INFO) != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR, "PVRSRVGetMiscInfoKM: "
"Can't find kernel meminfo"));
return PVRSRV_ERROR_INVALID_PARAMS;
}
#endif
if(psMiscInfo->sCacheOpCtl.eCacheOpType == PVRSRV_MISC_INFO_CPUCACHEOP_FLUSH)
{
if(!OSFlushCPUCacheRangeKM(psKernelMemInfo->sMemBlk.hOSMemHandle,
psMiscInfo->sCacheOpCtl.pvBaseVAddr,
psMiscInfo->sCacheOpCtl.ui32Length))
{
return PVRSRV_ERROR_CACHEOP_FAILED;
}
}
else if(psMiscInfo->sCacheOpCtl.eCacheOpType == PVRSRV_MISC_INFO_CPUCACHEOP_CLEAN)
{
if(!OSCleanCPUCacheRangeKM(psKernelMemInfo->sMemBlk.hOSMemHandle,
psMiscInfo->sCacheOpCtl.pvBaseVAddr,
psMiscInfo->sCacheOpCtl.ui32Length))
{
return PVRSRV_ERROR_CACHEOP_FAILED;
}
}
/* FIXME: Temporary fix needs to be revisited
* LinuxMemArea struct listing is not registered for memory areas
* wrapped through PVR2DMemWrap() call. For now, we are doing
* cache flush/inv by grabbing the physical pages through
* get_user_pages() for every blt call.
*/
else if (psMiscInfo->sCacheOpCtl.eCacheOpType ==
PVRSRV_MISC_INFO_CPUCACHEOP_CUSTOM_FLUSH)
{
#if defined(CONFIG_OUTER_CACHE) && defined(PVR_NO_FULL_CACHE_OPS)
if (1)
{
IMG_SIZE_T uPageOffset, uPageCount;
IMG_VOID *pvPageAlignedCPUVAddr;
IMG_SYS_PHYADDR *psIntSysPAddr = IMG_NULL;
IMG_HANDLE hOSWrapMem = IMG_NULL;
PVRSRV_ERROR eError;
int i;
uPageOffset = (IMG_UINTPTR_T)psMiscInfo->sCacheOpCtl.pvBaseVAddr & (HOST_PAGESIZE() - 1);
uPageCount =
HOST_PAGEALIGN(psMiscInfo->sCacheOpCtl.ui32Length + uPageOffset)/HOST_PAGESIZE();
pvPageAlignedCPUVAddr = (IMG_VOID *)((IMG_UINTPTR_T)psMiscInfo->sCacheOpCtl.pvBaseVAddr - uPageOffset);
if(OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
uPageCount * sizeof(IMG_SYS_PHYADDR),
(IMG_VOID **)&psIntSysPAddr, IMG_NULL,
"Array of Page Addresses") != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"PVRSRVWrapExtMemoryKM: Failed to alloc memory for block"));
return PVRSRV_ERROR_OUT_OF_MEMORY;
}
eError = OSAcquirePhysPageAddr(pvPageAlignedCPUVAddr,
uPageCount * HOST_PAGESIZE(),
psIntSysPAddr,
&hOSWrapMem);
for (i = 0; i < uPageCount; i++)
{
outer_flush_range(psIntSysPAddr[i].uiAddr, psIntSysPAddr[i].uiAddr + HOST_PAGESIZE() -1);
}
OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
uPageCount * sizeof(IMG_SYS_PHYADDR),
psIntSysPAddr, IMG_NULL);
OSReleasePhysPageAddr(hOSWrapMem);
}
#else
OSFlushCPUCacheKM();
#endif /* CONFIG_OUTER_CACHE && PVR_NO_FULL_CACHE_OPS*/
}
else if (psMiscInfo->sCacheOpCtl.eCacheOpType ==
PVRSRV_MISC_INFO_CPUCACHEOP_CUSTOM_INV)
{
#if defined(CONFIG_OUTER_CACHE)
/* TODO: Need to check full cache invalidation, but
* currently it is not exported through
* outer_cache interface.
*/
if (1)
{
IMG_SIZE_T uPageOffset, uPageCount;
IMG_VOID *pvPageAlignedCPUVAddr;
IMG_SYS_PHYADDR *psIntSysPAddr = IMG_NULL;
IMG_HANDLE hOSWrapMem = IMG_NULL;
PVRSRV_ERROR eError;
int i;
uPageOffset = (IMG_UINTPTR_T)psMiscInfo->sCacheOpCtl.pvBaseVAddr & (HOST_PAGESIZE() - 1);
uPageCount =
HOST_PAGEALIGN(psMiscInfo->sCacheOpCtl.ui32Length + uPageOffset)/HOST_PAGESIZE();
pvPageAlignedCPUVAddr = (IMG_VOID *)((IMG_UINTPTR_T)psMiscInfo->sCacheOpCtl.pvBaseVAddr - uPageOffset);
if(OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
uPageCount * sizeof(IMG_SYS_PHYADDR),
(IMG_VOID **)&psIntSysPAddr, IMG_NULL,
"Array of Page Addresses") != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"PVRSRVWrapExtMemoryKM: Failed to alloc memory for block"));
return PVRSRV_ERROR_OUT_OF_MEMORY;
}
eError = OSAcquirePhysPageAddr(pvPageAlignedCPUVAddr,
uPageCount * HOST_PAGESIZE(),
psIntSysPAddr,
&hOSWrapMem);
for (i = 0; i < uPageCount; i++)
{
outer_inv_range(psIntSysPAddr[i].uiAddr, psIntSysPAddr[i].uiAddr + HOST_PAGESIZE() -1);
}
OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP,
uPageCount * sizeof(IMG_SYS_PHYADDR),
psIntSysPAddr, IMG_NULL);
OSReleasePhysPageAddr(hOSWrapMem);
}
#endif /* CONFIG_OUTER_CACHE */
}
}
}
#if defined(PVRSRV_RESET_ON_HWTIMEOUT)
if((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_RESET_PRESENT) != 0UL)
{
PVR_LOG(("User requested OS reset"));
OSPanic();
}
#endif
return PVRSRV_OK;
}
IMG_EXPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetMiscInfoKM(PVRSRV_MISC_INFO *psMiscInfo)
{
SYS_DATA *psSysData;
if(!psMiscInfo)
{
PVR_DPF((PVR_DBG_ERROR,"PVRSRVGetMiscInfoKM: invalid parameters"));
return PVRSRV_ERROR_INVALID_PARAMS;
}
psMiscInfo->ui32StatePresent = 0;
if(psMiscInfo->ui32StateRequest & ~( PVRSRV_MISC_INFO_TIMER_PRESENT
|PVRSRV_MISC_INFO_CLOCKGATE_PRESENT
|PVRSRV_MISC_INFO_MEMSTATS_PRESENT
|PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT
|PVRSRV_MISC_INFO_DDKVERSION_PRESENT
|PVRSRV_MISC_INFO_CPUCACHEFLUSH_PRESENT
|PVRSRV_MISC_INFO_RESET_PRESENT))
{
PVR_DPF((PVR_DBG_ERROR,"PVRSRVGetMiscInfoKM: invalid state request flags"));
return PVRSRV_ERROR_INVALID_PARAMS;
}
SysAcquireData(&psSysData);
if(((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_TIMER_PRESENT) != 0UL) &&
(psSysData->pvSOCTimerRegisterKM != IMG_NULL))
{
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_TIMER_PRESENT;
psMiscInfo->pvSOCTimerRegisterKM = psSysData->pvSOCTimerRegisterKM;
psMiscInfo->hSOCTimerRegisterOSMemHandle = psSysData->hSOCTimerRegisterOSMemHandle;
}
else
{
psMiscInfo->pvSOCTimerRegisterKM = IMG_NULL;
psMiscInfo->hSOCTimerRegisterOSMemHandle = IMG_NULL;
}
if(((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_CLOCKGATE_PRESENT) != 0UL) &&
(psSysData->pvSOCClockGateRegsBase != IMG_NULL))
{
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_CLOCKGATE_PRESENT;
psMiscInfo->pvSOCClockGateRegs = psSysData->pvSOCClockGateRegsBase;
psMiscInfo->ui32SOCClockGateRegsSize = psSysData->ui32SOCClockGateRegsSize;
}
if(((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_MEMSTATS_PRESENT) != 0UL) &&
(psMiscInfo->pszMemoryStr != IMG_NULL))
{
RA_ARENA **ppArena;
IMG_CHAR *pszStr;
IMG_UINT32 ui32StrLen;
IMG_INT32 i32Count;
pszStr = psMiscInfo->pszMemoryStr;
ui32StrLen = psMiscInfo->ui32MemoryStrLen;
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_MEMSTATS_PRESENT;
ppArena = &psSysData->apsLocalDevMemArena[0];
while(*ppArena)
{
CHECK_SPACE(ui32StrLen);
i32Count = OSSNPrintf(pszStr, 100, "\nLocal Backing Store:\n");
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
RA_GetStats(*ppArena,
&pszStr,
&ui32StrLen);
ppArena++;
}
List_PVRSRV_DEVICE_NODE_PVRSRV_ERROR_Any_va(psSysData->psDeviceNodeList,
PVRSRVGetMiscInfoKM_Device_AnyVaCb,
&ui32StrLen,
&i32Count,
&pszStr);
i32Count = OSSNPrintf(pszStr, 100, "\n\0");
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
}
if(((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT) != 0UL) &&
(psSysData->psGlobalEventObject != IMG_NULL))
{
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_GLOBALEVENTOBJECT_PRESENT;
psMiscInfo->sGlobalEventObject = *psSysData->psGlobalEventObject;
}
if (((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_DDKVERSION_PRESENT) != 0UL)
&& ((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_MEMSTATS_PRESENT) == 0UL)
&& (psMiscInfo->pszMemoryStr != IMG_NULL))
{
IMG_CHAR *pszStr;
IMG_UINT32 ui32StrLen;
IMG_UINT32 ui32LenStrPerNum = 12;
IMG_INT32 i32Count;
IMG_INT i;
psMiscInfo->ui32StatePresent |= PVRSRV_MISC_INFO_DDKVERSION_PRESENT;
psMiscInfo->aui32DDKVersion[0] = PVRVERSION_MAJ;
psMiscInfo->aui32DDKVersion[1] = PVRVERSION_MIN;
psMiscInfo->aui32DDKVersion[2] = PVRVERSION_BRANCH;
psMiscInfo->aui32DDKVersion[3] = PVRVERSION_BUILD;
pszStr = psMiscInfo->pszMemoryStr;
ui32StrLen = psMiscInfo->ui32MemoryStrLen;
for (i=0; i<4; i++)
{
if (ui32StrLen < ui32LenStrPerNum)
{
return PVRSRV_ERROR_INVALID_PARAMS;
}
i32Count = OSSNPrintf(pszStr, ui32LenStrPerNum, "%ld", psMiscInfo->aui32DDKVersion[i]);
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
if (i != 3)
{
i32Count = OSSNPrintf(pszStr, 2, ".");
UPDATE_SPACE(pszStr, i32Count, ui32StrLen);
}
}
}
#if defined(SUPPORT_CPU_CACHED_BUFFERS)
if((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_CPUCACHEFLUSH_PRESENT) != 0UL)
{
if(psMiscInfo->bDeferCPUCacheFlush)
{
if(!psMiscInfo->bCPUCacheFlushAll)
{
PVR_DPF((PVR_DBG_MESSAGE,"PVRSRVGetMiscInfoKM: don't support deferred range flushes"));
PVR_DPF((PVR_DBG_MESSAGE," using deferred flush all instead"));
}
psSysData->bFlushAll = IMG_TRUE;
}
else
{
if(psMiscInfo->bCPUCacheFlushAll)
{
OSFlushCPUCacheKM();
psSysData->bFlushAll = IMG_FALSE;
}
else
{
OSFlushCPUCacheRangeKM(psMiscInfo->pvRangeAddrStart, psMiscInfo->pvRangeAddrEnd);
}
}
}
#endif
#if defined(PVRSRV_RESET_ON_HWTIMEOUT)
if((psMiscInfo->ui32StateRequest & PVRSRV_MISC_INFO_RESET_PRESENT) != 0UL)
{
PVR_LOG(("User requested OS reset"));
OSPanic();
}
#endif
return PVRSRV_OK;
}
