#include <vendorcode/google/chromeos/chromeos.h>
static const struct pad_config sdmmc1_pad[] = {
/* MMC1(SDCARD) */
PAD_CFG_SFIO(SDMMC1_CLK, PINMUX_INPUT_ENABLE, SDMMC1),
PAD_CFG_SFIO(SDMMC1_CMD, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC1),
PAD_CFG_SFIO(SDMMC1_DAT0, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC1),
PAD_CFG_SFIO(SDMMC1_DAT1, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC1),
PAD_CFG_SFIO(SDMMC1_DAT2, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC1),
PAD_CFG_SFIO(SDMMC1_DAT3, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC1),
/* MMC1 Card Detect pin */
PAD_CFG_GPIO_INPUT(GPIO_PZ1, PINMUX_PULL_UP),
/* Disable SD card reader power so it can be reset even on warm boot.
Payloads must enable power before accessing SD card slots. */
PAD_CFG_GPIO_OUT0(GPIO_PZ4, PINMUX_PULL_NONE),
};
static const struct pad_config audio_codec_pads[] = {
/* GPIO_X1_AUD(BB3) is AUDIO_LDO_EN (->CODEC RESET_N pin) */
PAD_CFG_GPIO_OUT1(GPIO_X1_AUD, PINMUX_PULL_DOWN),
};
static const struct pad_config padcfgs[] = {
/* We pull the USB VBUS signals up but keep them as inputs since the
* voltage source likes to drive them low on overcurrent conditions */
PAD_CFG_GPIO_INPUT(USB_VBUS_EN1, PINMUX_PULL_NONE | PINMUX_PARKED |
PINMUX_INPUT_ENABLE | PINMUX_LPDR | PINMUX_IO_HV),
/* Add backlight vdd/enable/pwm/dp hpd pad cfgs here */
};
vh = cbmem_find(CBMEM_ID_VBOOT_HANDOFF);
if (vh == NULL) {
printk(BIOS_ERR, "No vboot handoff struct found\n");
return;
}
VbSharedDataHeader *vb_sd = (VbSharedDataHeader *)vh->shared_data;
vb_sd->flags &= ~VBSD_EC_SOFTWARE_SYNC;
#endif
}
static const struct pad_config lcd_gpio_padcfgs[] = {
/* LCD_EN */
PAD_CFG_GPIO_OUT0(GPIO_PH5, PINMUX_PULL_UP),
/* LCD_RST_L */
PAD_CFG_GPIO_OUT0(GPIO_PH3, PINMUX_PULL_UP),
/* EN_VDD_LCD */
PAD_CFG_GPIO_OUT0(GPIO_PBB6, PINMUX_PULL_NONE),
/* EN_VDD18_LCD */
PAD_CFG_GPIO_OUT0(DVFS_PWM, PINMUX_PULL_DOWN),
};
static void configure_display_clocks(void)
{
u32 lclks = CLK_L_HOST1X | CLK_L_DISP1; /* dc */
u32 hclks = CLK_H_MIPI_CAL | CLK_H_DSI; /* mipi phy, mipi-dsi a */
u32 uclks = CLK_U_DSIB; /* mipi-dsi b */
u32 xclks = CLK_X_CLK72MHZ; /* clk src of mipi_cal */
static const struct pad_config sdmmc3_pad[] = {
/* MMC3(SDCARD) */
PAD_CFG_SFIO(SDMMC3_CLK, PINMUX_INPUT_ENABLE, SDMMC3),
PAD_CFG_SFIO(SDMMC3_CMD, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC3),
PAD_CFG_SFIO(SDMMC3_DAT0, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC3),
PAD_CFG_SFIO(SDMMC3_DAT1, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC3),
PAD_CFG_SFIO(SDMMC3_DAT2, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC3),
PAD_CFG_SFIO(SDMMC3_DAT3, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC3),
PAD_CFG_SFIO(SDMMC3_CLK_LB_IN, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC3),
PAD_CFG_SFIO(SDMMC3_CLK_LB_OUT, PINMUX_INPUT_ENABLE | PINMUX_PULL_DOWN, SDMMC3),
/* MMC3 Card Detect pin */
PAD_CFG_GPIO_INPUT(SDMMC3_CD_N, PINMUX_PULL_UP),
/* Disable SD card reader power so it can be reset even on warm boot.
Payloads must enable power before accessing SD card slots. */
PAD_CFG_GPIO_OUT0(KB_ROW0, PINMUX_PULL_NONE),
};
static const struct pad_config sdmmc4_pad[] = {
/* MMC4 (eMMC) */
PAD_CFG_SFIO(SDMMC4_CLK, PINMUX_INPUT_ENABLE, SDMMC4),
PAD_CFG_SFIO(SDMMC4_CMD, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC4),
PAD_CFG_SFIO(SDMMC4_DAT0, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC4),
PAD_CFG_SFIO(SDMMC4_DAT1, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC4),
PAD_CFG_SFIO(SDMMC4_DAT2, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC4),
PAD_CFG_SFIO(SDMMC4_DAT3, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC4),
PAD_CFG_SFIO(SDMMC4_DAT4, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC4),
PAD_CFG_SFIO(SDMMC4_DAT5, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC4),
PAD_CFG_SFIO(SDMMC4_DAT6, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC4),
PAD_CFG_SFIO(SDMMC4_DAT7, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, SDMMC4),
};
/* Enable CLK1_OUT */
clock_external_output(1);
/*
* As per NVIDIA hardware team, we need to take ALL audio devices
* connected to AHUB (AUDIO, APB2APE, I2S, SPDIF, etc.) out of reset
* and clock-enabled, otherwise reading AHUB devices (in our case,
* I2S/APBIF/AUDIO<XBAR>) will hang.
*/
soc_configure_ape();
clock_enable_audio();
}
static const struct pad_config lcd_gpio_padcfgs[] = {
/* LCD_EN */
PAD_CFG_GPIO_OUT0(LCD_BL_EN, PINMUX_PULL_UP),
/* LCD_RST_L */
PAD_CFG_GPIO_OUT0(LCD_RST, PINMUX_PULL_UP),
/* EN_VDD_LCD */
PAD_CFG_GPIO_OUT0(LCD_GPIO2, PINMUX_PULL_NONE),
/* EN_VDD18_LCD */
PAD_CFG_GPIO_OUT0(LCD_GPIO1, PINMUX_PULL_NONE),
};
static void configure_display_clocks(void)
{
u32 lclks = CLK_L_HOST1X | CLK_L_DISP1; /* dc */
u32 hclks = CLK_H_MIPI_CAL | CLK_H_DSI; /* mipi phy, mipi-dsi a */
u32 uclks = CLK_U_DSIB; /* mipi-dsi b */
u32 xclks = CLK_X_UART_FST_MIPI_CAL; /* uart_fst_mipi_cal */