static void ADC_PinMuxSetup(void)
{
#if defined(BOARD_NXP_LPCXPRESSO_54102)
/* Enable PININT1, which will trigger SEQ_B */
Chip_PININT_Init(LPC_PININT);
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 24, IOCON_MODE_INACT | IOCON_FUNC0 | IOCON_DIGITAL_EN | IOCON_GPIO_MODE);
Chip_GPIO_SetPinDIRInput(LPC_GPIO, 0, 24);
LPC_INMUX->PINTSEL[PININTSELECT1] = 24;
Chip_PININT_ClearIntStatus(LPC_PININT, PININTCH(PININTSELECT1));
Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(PININTSELECT1));
Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(PININTSELECT1));
NVIC_ClearPendingIRQ(PIN_INT1_IRQn);
NVIC_EnableIRQ(PIN_INT1_IRQn);
/* All pins to inactive, neither pull-up nor pull-down. */
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 29, IOCON_MODE_INACT | IOCON_FUNC1 | IOCON_ANALOG_EN);
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 30, IOCON_MODE_INACT | IOCON_FUNC1 | IOCON_ANALOG_EN);
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 31, IOCON_MODE_INACT | IOCON_FUNC1 | IOCON_ANALOG_EN);
Chip_IOCON_PinMuxSet(LPC_IOCON, 1, 0, IOCON_MODE_INACT | IOCON_FUNC1 | IOCON_ANALOG_EN);
Chip_IOCON_PinMuxSet(LPC_IOCON, 1, 1, IOCON_MODE_INACT | IOCON_FUNC1 | IOCON_ANALOG_EN);
Chip_IOCON_PinMuxSet(LPC_IOCON, 1, 2, IOCON_MODE_INACT | IOCON_FUNC1 | IOCON_ANALOG_EN);
Chip_IOCON_PinMuxSet(LPC_IOCON, 1, 3, IOCON_MODE_INACT | IOCON_FUNC1 | IOCON_ANALOG_EN);
Chip_IOCON_PinMuxSet(LPC_IOCON, 1, 4, IOCON_MODE_INACT | IOCON_FUNC1 | IOCON_ANALOG_EN);
Chip_IOCON_PinMuxSet(LPC_IOCON, 1, 5, IOCON_MODE_INACT | IOCON_FUNC1 | IOCON_ANALOG_EN);
Chip_IOCON_PinMuxSet(LPC_IOCON, 1, 6, IOCON_MODE_INACT | IOCON_FUNC1 | IOCON_ANALOG_EN);
Chip_IOCON_PinMuxSet(LPC_IOCON, 1, 7, IOCON_MODE_INACT | IOCON_FUNC1 | IOCON_ANALOG_EN);
Chip_IOCON_PinMuxSet(LPC_IOCON, 1, 8, IOCON_MODE_INACT | IOCON_FUNC1 | IOCON_ANALOG_EN);
#else
#warning "No ADC setup for this example"
#endif
}
void App_Button_Init(void)
{
ButtonWaiting = 0;
//Initialize the timer for the debouncing, but don't start it
Chip_TIMER_Init(DEBOUNCE_TIMER);
Chip_TIMER_Reset(DEBOUNCE_TIMER);
DEBOUNCE_TIMER->PR = 100;
DEBOUNCE_TIMER->MCR = (1<<1)|(1<<0); //Enable MR0 match interrupt, Reset TC on MR0 match
DEBOUNCE_TIMER->MR[0]= 0xFFFF; //MR0 match value
//Enable the IRQ for the timer
NVIC_EnableIRQ(DEBOUNCE_TIMER_NVIC_NAME);
//Set all button pins to GPIO input with pullup
Chip_IOCON_PinMuxSet(LPC_IOCON, BUTTON_1_PORT, BUTTON_1_PIN, (IOCON_FUNC0 | IOCON_MODE_PULLUP));
Chip_IOCON_PinMuxSet(LPC_IOCON, BUTTON_2_PORT, BUTTON_2_PIN, (IOCON_FUNC0 | IOCON_MODE_PULLUP));
Chip_IOCON_PinMuxSet(LPC_IOCON, BUTTON_3_PORT, BUTTON_3_PIN, (IOCON_FUNC0 | IOCON_MODE_PULLUP));
Chip_IOCON_PinMuxSet(LPC_IOCON, BUTTON_4_PORT, BUTTON_4_PIN, (IOCON_FUNC0 | IOCON_MODE_PULLUP));
Chip_IOCON_PinMuxSet(LPC_IOCON, BUTTON_5_PORT, BUTTON_5_PIN, (IOCON_FUNC0 | IOCON_MODE_PULLUP));
Chip_GPIO_SetPinDIRInput(LPC_GPIO, BUTTON_1_PORT, BUTTON_1_PIN);
Chip_GPIO_SetPinDIRInput(LPC_GPIO, BUTTON_2_PORT, BUTTON_2_PIN);
Chip_GPIO_SetPinDIRInput(LPC_GPIO, BUTTON_3_PORT, BUTTON_3_PIN);
Chip_GPIO_SetPinDIRInput(LPC_GPIO, BUTTON_4_PORT, BUTTON_4_PIN);
Chip_GPIO_SetPinDIRInput(LPC_GPIO, BUTTON_5_PORT, BUTTON_5_PIN);
//TODO: Probably put this in the main initalization...
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_PINT);
//Setup GPIO interrupts for each button
/* Configure interrupt channel for the GPIO pin in SysCon block */
Chip_SYSCTL_SetPinInterrupt(BUTTON_1_PININT_INDEX, BUTTON_1_PORT, BUTTON_1_PIN);
Chip_SYSCTL_SetPinInterrupt(BUTTON_2_PININT_INDEX, BUTTON_2_PORT, BUTTON_2_PIN);
Chip_SYSCTL_SetPinInterrupt(BUTTON_3_PININT_INDEX, BUTTON_3_PORT, BUTTON_3_PIN);
Chip_SYSCTL_SetPinInterrupt(BUTTON_4_PININT_INDEX, BUTTON_4_PORT, BUTTON_4_PIN);
Chip_SYSCTL_SetPinInterrupt(BUTTON_5_PININT_INDEX, BUTTON_5_PORT, BUTTON_5_PIN);
/* Configure channel interrupt as edge sensitive and falling edge interrupt */
Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(BUTTON_1_PININT_INDEX));
Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(BUTTON_2_PININT_INDEX));
Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(BUTTON_3_PININT_INDEX));
Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(BUTTON_4_PININT_INDEX));
Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(BUTTON_5_PININT_INDEX));
Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(BUTTON_1_PININT_INDEX));
Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(BUTTON_2_PININT_INDEX));
Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(BUTTON_3_PININT_INDEX));
Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(BUTTON_4_PININT_INDEX));
Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(BUTTON_5_PININT_INDEX));
Chip_PININT_ClearIntStatus(LPC_PININT, ((1 << BUTTON_1_PININT_INDEX)|(1<<BUTTON_2_PININT_INDEX)|(1<<BUTTON_3_PININT_INDEX)|(1<<BUTTON_4_PININT_INDEX)|(1<<BUTTON_5_PININT_INDEX)) );
App_EnableButtons();
return;
}
/**
* @brief Enable/Disable low level/ falling edge PININT interrupts for pins
* @param ubPin : Pins (value of PININTCH*)
* @param ubPin : true: enable; false: disable
* @return Nothing
*/
STATIC INLINE void EXTINT_vEnableIntLow(PININT_CH_T unPin, bool bEnable)
{
if(bEnable){
SET_REG_FIELD(LPC_PIN_INT->SIENF, PININTCH_MASK&(PININTCH(unPin)), (PININTCH(unPin)));
}
else{
SET_REG_FIELD(LPC_PIN_INT->CIENF, PININTCH_MASK&(PININTCH(unPin)), (PININTCH(unPin)));
}
}
void Board_GPIOs_disableIntCallback(int gpioNumber)
{
for(uint8_t i=0; i<4 ; i++)
{
if(extIntData[i].callback!=NULL && extIntData[i].gpioNumber==gpioNumber)
{
extIntData[i].callback=NULL;
uint8_t intNumber = i + 4; // starts from INT4
Chip_PININT_DisableIntHigh(LPC_GPIO_PIN_INT, PININTCH(intNumber));
Chip_PININT_DisableIntLow(LPC_GPIO_PIN_INT, PININTCH(intNumber));
}
}
}
void PIN_INT0_IRQHandler(void)
{
Chip_PININT_ClearIntStatus(LPC_PININT, PININTCH(PININTSELECT0));
bool PDMBit = Chip_GPIO_GetPinState(LPC_GPIO, 0, 9);
if (AccumulatePCMData(PDMBit, &PCMValue)) {
PCM_FIFO_PostValue(PCM_FIFO, PCMValue);
}
}
void BUTTON_5_IRQ_HANDLER(void)
{
DEBOUNCE_TIMER->PR = BUTTON_5_DEBOUNCE_TIME;
App_DisableButtons();
ButtonWaiting = BUTTON_5_PININT_INDEX;
DEBOUNCE_TIMER->TCR = 0x01;
Chip_PININT_ClearIntStatus(LPC_PININT, PININTCH(BUTTON_5_PININT_INDEX));
return;
}
bool Board_GPIOs_enableIntCallback(int gpioNumber,void(*function)(void*),void* arg, uint8_t flagEdgeLevel, uint8_t flagHighLow)
{
// check if gpio alerady has assigned int
for(uint8_t i=0; i<4 ; i++)
{
if(extIntData[i].callback!=NULL && extIntData[i].gpioNumber==gpioNumber)
return 0;
}
// find free extInt callback
for(uint8_t i=0; i<4 ; i++)
{
if(extIntData[i].callback==NULL)
{
extIntData[i].callback = function;
extIntData[i].callbackArg = arg;
extIntData[i].gpioNumber=gpioNumber;
// Enable interrupt
uint8_t intNumber = i + 4; // starts from INT4
Chip_SCU_GPIOIntPinSel(intNumber, gpiosInfo[gpioNumber].gpio, gpiosInfo[gpioNumber].gpioBit);
Chip_PININT_ClearIntStatus(LPC_GPIO_PIN_INT, PININTCH(intNumber));
if(flagEdgeLevel)
Chip_PININT_SetPinModeEdge(LPC_GPIO_PIN_INT, PININTCH(intNumber));
else
Chip_PININT_SetPinModeLevel(LPC_GPIO_PIN_INT, PININTCH(intNumber));
if(flagHighLow)
Chip_PININT_EnableIntHigh(LPC_GPIO_PIN_INT, PININTCH(intNumber));
else
Chip_PININT_EnableIntLow(LPC_GPIO_PIN_INT, PININTCH(intNumber));
switch(intNumber) {
case 4: NVIC_ClearPendingIRQ(PIN_INT4_IRQn); NVIC_EnableIRQ(PIN_INT4_IRQn); break;
case 5: NVIC_ClearPendingIRQ(PIN_INT5_IRQn); NVIC_EnableIRQ(PIN_INT5_IRQn); break;
case 6: NVIC_ClearPendingIRQ(PIN_INT6_IRQn); NVIC_EnableIRQ(PIN_INT6_IRQn); break;
case 7: NVIC_ClearPendingIRQ(PIN_INT7_IRQn); NVIC_EnableIRQ(PIN_INT7_IRQn); break;
}
return 1;
}
}
return 0;
}
void GPIO7_IRQHandler(void)
{
Chip_PININT_ClearIntStatus(LPC_GPIO_PIN_INT, PININTCH(7));
if(extIntData[3].callback!=NULL)
extIntData[3].callback( extIntData[3].callbackArg);
}
void Board_Buttons_Init(void)
{
buttonsData[0].callbackSw=NULL;
buttonsData[1].callbackSw=NULL;
buttonsData[2].callbackSw=NULL;
buttonsData[3].callbackSw=NULL;
Chip_SCU_PinMuxSet(0x1, 0, (SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC0)); // P1_0 as GPIO0[4]
Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT, BUTTONS_BUTTON1_GPIO_PORT_NUM, BUTTONS_BUTTON1_GPIO_BIT_NUM); // input
Chip_SCU_GPIOIntPinSel(0, 0, 4); // GPIO0[4] to INT0
Chip_PININT_ClearIntStatus(LPC_GPIO_PIN_INT, PININTCH(0)); // INT0
Chip_PININT_SetPinModeEdge(LPC_GPIO_PIN_INT, PININTCH(0)); // INT0
Chip_PININT_EnableIntLow(LPC_GPIO_PIN_INT, PININTCH(0)); // INT0
NVIC_ClearPendingIRQ(PIN_INT0_IRQn);
NVIC_EnableIRQ(PIN_INT0_IRQn);
Chip_SCU_PinMuxSet(0x1, 1, (SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC0)); // P1_1 as GPIO0[8]
Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT, BUTTONS_BUTTON2_GPIO_PORT_NUM, BUTTONS_BUTTON2_GPIO_BIT_NUM); // input
Chip_SCU_GPIOIntPinSel(1, 0, 8); // GPIO0[8] to INT1
Chip_PININT_ClearIntStatus(LPC_GPIO_PIN_INT, PININTCH(1)); // INT1
Chip_PININT_SetPinModeEdge(LPC_GPIO_PIN_INT, PININTCH(1)); // INT1
Chip_PININT_EnableIntLow(LPC_GPIO_PIN_INT, PININTCH(1)); // INT1
NVIC_ClearPendingIRQ(PIN_INT1_IRQn);
NVIC_EnableIRQ(PIN_INT1_IRQn);
Chip_SCU_PinMuxSet(0x1, 2, (SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC0)); // P1_2 as GPIO0[9]
Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT, BUTTONS_BUTTON3_GPIO_PORT_NUM, BUTTONS_BUTTON3_GPIO_BIT_NUM); // input
Chip_SCU_GPIOIntPinSel(2, 0, 9); // GPIO0[9] to INT2
Chip_PININT_ClearIntStatus(LPC_GPIO_PIN_INT, PININTCH(2)); // INT2
Chip_PININT_SetPinModeEdge(LPC_GPIO_PIN_INT, PININTCH(2)); // INT2
Chip_PININT_EnableIntLow(LPC_GPIO_PIN_INT, PININTCH(2)); // INT2
NVIC_ClearPendingIRQ(PIN_INT2_IRQn);
NVIC_EnableIRQ(PIN_INT2_IRQn);
Chip_SCU_PinMuxSet(0x1, 6, (SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC0)); // P1_6 as GPIO1[9]
Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT, BUTTONS_BUTTON4_GPIO_PORT_NUM, BUTTONS_BUTTON4_GPIO_BIT_NUM); // input
Chip_SCU_GPIOIntPinSel(3, 1, 9); // GPIO1[9] to INT3
Chip_PININT_ClearIntStatus(LPC_GPIO_PIN_INT, PININTCH(3)); // INT3
Chip_PININT_SetPinModeEdge(LPC_GPIO_PIN_INT, PININTCH(3)); // INT3
Chip_PININT_EnableIntLow(LPC_GPIO_PIN_INT, PININTCH(3)); // INT3
NVIC_ClearPendingIRQ(PIN_INT3_IRQn);
NVIC_EnableIRQ(PIN_INT3_IRQn);
}
void FLEX_INT1_IRQHandler(void)
{
Chip_PININT_ClearIntStatus(LPC_PININT, PININTCH(1));
osSignalSet(get_temperature_id, OS_DRDY1);
}
/**
* @brief Handle interrupt from GPIO pin or GPIO pin mapped to PININT
* @return Nothing
*/
void PIN_INT0_IRQHandler(void)
{
Chip_PININT_ClearIntStatus(LPC_PININT, PININTCH(0));
if(callbackPinIntA) callbackPinIntA();
}
/**
* @brief Configure the pins as edge sensitive in Pin interrupt block
* @param ubPin : Pins (value of PININTCH*)
* @param unMode : PININT_MODE_EDGE or PININT_MODE_LEVEL
* @return Nothing
*/
STATIC INLINE void EXTINT_vSetPinMode(PININT_CH_T unPin, PININT_MODE_T tMode)
{
U32 temp = ((PININT_MODE_LEVEL == tMode)? PININTCH(unPin) : 0);
SET_REG_FIELD(LPC_PIN_INT->ISEL, PININTCH_MASK&(PININTCH(unPin)), temp);
}
/**
* @brief Return pin states that have a detected latched high edge (RISE) state
* @param ubPin : Pins (value of PININTCH*)
* @return true: a latched rise state detected; false - not detected
*/
STATIC INLINE bool EXTINT_bGetRiseState(PININT_CH_T unPin)
{
return (GET_REG_FIELD(LPC_PIN_INT->RISE, PININTCH_MASK&(PININTCH(unPin))) != 0);
}
void PININT3_IRQHandler(void) {
Chip_PININT_ClearIntStatus(LPC_PININT, PININTCH(IR_IRQ));
}
void Board_Attach_Interrupt(uint32_t ulPin, void (*callback)(void), uint32_t mode)
{
uint8_t port = 1;
uint8_t pin = 24;
uint8_t pinIntChannel = 0;
LPC1347_IRQn_Type pinIntIRQ = PIN_INT0_IRQn;
port = APIN_PORT(ulPin);
pin = APIN_PIN(ulPin);
pinIntChannel = APIN_INT(ulPin);
if(pinIntChannel == EXT_INT_0)
{
pinIntIRQ = PIN_INT0_IRQn;
callbackPinIntA = callback;
}
else if(pinIntChannel == EXT_INT_1)
{
pinIntIRQ = PIN_INT1_IRQn;
callbackPinIntB = callback;
}
else if(pinIntChannel == EXT_INT_2)
{
pinIntIRQ = PIN_INT2_IRQn;
callbackPinIntC = callback;
}
else if(pinIntChannel == EXT_INT_3)
{
pinIntIRQ = PIN_INT3_IRQn;
callbackPinIntD = callback;
}
/* Configure GPIO pin as input */
Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT, port, pin);
/* Configure pin as GPIO with pulldown */
// All digital pins are selected such that GPIO is on IOCON_FUNC0
Chip_IOCON_PinMuxSet(LPC_IOCON, port, pin, (IOCON_FUNC0 | IOCON_MODE_PULLDOWN));
/* Enable PININT clock */
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_PINT);
/* Configure interrupt channel for the GPIO pin in SysCon block */
Chip_SYSCTL_SetPinInterrupt(pinIntChannel, port, pin);
/* Configure channel interrupt as edge sensitive and falling edge interrupt */
Chip_PININT_ClearIntStatus(LPC_PININT, PININTCH(pinIntChannel));
if(mode == HIGH)
{
Chip_PININT_SetPinModeLevel(LPC_PININT, PININTCH(pinIntChannel));
Chip_PININT_EnableIntHigh(LPC_PININT, PININTCH(pinIntChannel));
}
else if(mode == LOW)
{
Chip_PININT_SetPinModeLevel(LPC_PININT, PININTCH(pinIntChannel));
Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(pinIntChannel));
}
else if(mode == RISING)
{
Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(pinIntChannel));
Chip_PININT_EnableIntHigh(LPC_PININT, PININTCH(pinIntChannel));
}
else if(mode == FALLING)
{
Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(pinIntChannel));
Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(pinIntChannel));
}
else if(mode == CHANGE)
{
Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(pinIntChannel));
Chip_PININT_EnableIntHigh(LPC_PININT, PININTCH(pinIntChannel));
Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(pinIntChannel));
}
/* Enable interrupt in the NVIC */
NVIC_ClearPendingIRQ(pinIntIRQ);
NVIC_EnableIRQ(pinIntIRQ);
}
void PIN_INT3_IRQHandler(void)
{
Chip_PININT_ClearIntStatus(LPC_PININT, PININTCH(3));
if(callbackPinIntD) callbackPinIntD();
}
void PIN_INT2_IRQHandler(void)
{
Chip_PININT_ClearIntStatus(LPC_PININT, PININTCH(2));
if(callbackPinIntC) callbackPinIntC();
}
void PIN_INT1_IRQHandler(void)
{
Chip_PININT_ClearIntStatus(LPC_PININT, PININTCH(1));
if(callbackPinIntB) callbackPinIntB();
}
/**
* @brief Handle interrupt from GPIO pin or GPIO pin mapped to PININT
* @return Nothing
*/
void PININT_IRQ_HANDLER(void)
{
Chip_PININT_ClearIntStatus(LPC_PININT, PININTCH(GPIO_PININT_INDEX));
Board_LED_Toggle(0);
}
/**
* @brief Main program body
* @return Does not return
*/
int main(void)
{
/* Generic Initialization */
SystemCoreClockUpdate();
/* Board_Init calls Chip_GPIO_Init and enables GPIO clock if needed,
Chip_GPIO_Init is not called again */
Board_Init();
Board_LED_Set(0, false);
Chip_PININT_Init(LPC_PININT);
/* Configure GPIO pin as input */
Chip_GPIO_SetPinDIRInput(LPC_GPIO, GPIO_PININT_PORT, GPIO_PININT_PIN);
/* Configure pin as GPIO */
Chip_IOCON_PinMuxSet(LPC_IOCON, GPIO_PININT_PORT, GPIO_PININT_PIN,
(IOCON_FUNC0 | IOCON_DIGITAL_EN | IOCON_GPIO_MODE));
/* Configure pin interrupt selection for the GPIO pin in Input Mux Block */
Chip_INMUX_PinIntSel(GPIO_PININT_INDEX, GPIO_PININT_PORT, GPIO_PININT_PIN);
/* Configure channel interrupt as edge sensitive and falling edge interrupt */
Chip_PININT_ClearIntStatus(LPC_PININT, PININTCH(GPIO_PININT_INDEX));
Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(GPIO_PININT_INDEX));
Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(GPIO_PININT_INDEX));
/* Enable interrupt in the NVIC */
NVIC_EnableIRQ(PININT_NVIC_NAME);
/* Enable wakeup for PININT0 */
Chip_SYSCON_EnableWakeup(SYSCON_STARTER_PINT0);
/* save the clock source, power down the PLL */
saved_clksrc = Chip_Clock_GetMainClockSource();
/* Go to sleep mode - LED will toggle on each wakeup event */
while (1) {
/* Go to sleep state - will wake up automatically on interrupt */
/* Disable PLL, if previously enabled, prior to sleep */
if (saved_clksrc == SYSCON_MAINCLKSRC_PLLOUT) {
Chip_Clock_SetMainClockSource(SYSCON_MAINCLKSRC_IRC);
Chip_SYSCON_PowerDown(SYSCON_PDRUNCFG_PD_SYS_PLL);
}
/* Lower system voltages to current lock (likely IRC) */
Chip_POWER_SetVoltage(POWER_LOW_POWER_MODE, Chip_Clock_GetMainClockRate());
/* Go to sleep leaving SRAM powered during sleep. Use lower
voltage during sleep. */
Chip_POWER_EnterPowerMode(PDOWNMODE,
(SYSCON_PDRUNCFG_PD_SRAM0A | SYSCON_PDRUNCFG_PD_SRAM0B));
/* On wakeup, restore PLL power if needed */
if (saved_clksrc == SYSCON_MAINCLKSRC_PLLOUT) {
Chip_SYSCON_PowerUp(SYSCON_PDRUNCFG_PD_SYS_PLL);
/* Wait for PLL lock */
while (!Chip_Clock_IsSystemPLLLocked()) {}
Chip_POWER_SetVoltage(POWER_LOW_POWER_MODE, Chip_Clock_GetSystemPLLOutClockRate(false));
/* Use PLL for system clock */
Chip_Clock_SetMainClockSource(SYSCON_MAINCLKSRC_PLLOUT);
}
}
return 0;
}
/**
* @brief Return pin states that have a detected latched falling edge (FALL) state
* @param ubPin : Pins (value of PININTCH*)
* @return true: a latched fall state detected; false - not detected
*/
STATIC INLINE bool EXTINT_bGetFallState(PININT_CH_T unPin)
{
return (GET_REG_FIELD(LPC_PIN_INT->FALL, (PININTCH_MASK&(PININTCH(unPin)))) != 0);
}
/**
* @brief Get interrupt status from Pin interrupt block
* @param ubPin : Pins (value of PININTCH*)
* @return Interrupt status (bit n for PININTn = high means interrupt ie pending)
*/
STATIC INLINE bool EXTINT_bGetIntStatus(PININT_CH_T unPin)
{
return (GET_REG_FIELD(LPC_PIN_INT->IST, (PININTCH_MASK&(PININTCH(unPin)))) != 0);
}
int32_t main(void) {
int32_t i,cnt=0;
uint8_t RC5_System_prev=0;
uint8_t RC5_Command_prev=0;
CHIP_PMU_MCUPOWER_T mcupower=PMU_MCU_SLEEP;
SystemCoreClockUpdate();
// init GPIO
Chip_GPIO_Init(LPC_GPIO_PORT);
Chip_SYSCTL_PeriphReset(RESET_GPIO);
// init SPI0 at SystemCoreClock speed
Chip_SPI_Init(LPC_SPI0);
Chip_SPI_ConfigureSPI(LPC_SPI0,SPI_MODE_MASTER|
SPI_CLOCK_CPHA0_CPOL0|
SPI_DATA_MSB_FIRST|
SPI_SSEL_ACTIVE_LO);
LPC_SPI0->DIV=0;
Chip_SPI_Enable(LPC_SPI0);
// init MRT
Chip_MRT_Init();
// init SWM
Chip_SWM_Init();
Chip_SWM_DisableFixedPin(SWM_FIXED_SWCLK);//PIO0_3
Chip_SWM_DisableFixedPin(SWM_FIXED_SWDIO);//PIO0_2
Chip_SWM_DisableFixedPin(SWM_FIXED_ACMP_I2);//PIO0_1
Chip_SWM_DisableFixedPin(SWM_FIXED_ACMP_I1);//PIO0_0
Chip_SWM_MovablePinAssign(SWM_SPI0_SCK_IO,CLK_PIN);
Chip_SWM_MovablePinAssign(SWM_SPI0_MOSI_IO,MOSI_PIN);
Chip_SWM_MovablePinAssign(SWM_CTIN_0_I,IR_PIN);
Chip_SWM_Deinit();
// init onboard LED
Chip_GPIO_SetPinState(LPC_GPIO_PORT,0,LED_PIN,true);
Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT,0,LED_PIN);
// init LCD reset pin
Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT,0,RESET_PIN);
// init LCD
LCDInit();
LCDClearScreenBlack();
// init SCT
Chip_SCT_Init(LPC_SCT);
// set prescaler, SCT clock = 1 MHz, clear counter
LPC_SCT->CTRL_L |= SCT_CTRL_PRE_L(SystemCoreClock/1000000-1) | SCT_CTRL_CLRCTR_L;
sct_fsm_init();
NVIC_EnableIRQ(SCT_IRQn);
// init PIO0_3 pin interrupt for wakeup from sleep mode
Chip_SYSCTL_SetPinInterrupt(IR_IRQ,IR_PIN);
Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(IR_IRQ));
NVIC_EnableIRQ(PININT3_IRQn);
Chip_SYSCTL_EnablePINTWakeup(IR_IRQ);
// set sleep options
Chip_SYSCTL_SetDeepSleepPD(SYSCTL_DEEPSLP_BOD_PD | SYSCTL_DEEPSLP_WDTOSC_PD);
Chip_SYSCTL_SetWakeup(~(SYSCTL_SLPWAKE_IRCOUT_PD | SYSCTL_SLPWAKE_IRC_PD | SYSCTL_SLPWAKE_FLASH_PD ));
LCDPutStr("kbiva.wordpress.com", MAX_X / 2 + 50, 10, WHITE, BLACK);
LCDPutStr("RC5 Decoder", MAX_X / 2 + 35, 35, WHITE, BLACK);
LCDPutStr("Frame:", MAX_X / 2 + 20, 1, WHITE, BLACK);
LCDPutStr("System:", MAX_X / 2 + 5 , 1, WHITE, BLACK);
LCDPutStr("Cmd:", MAX_X / 2 - 10, 1, WHITE, BLACK);
LCDPutStr("Toggle:", MAX_X / 2 - 25, 1, WHITE, BLACK);
LCDPutStr("Count:", MAX_X / 2 - 40, 1, WHITE, BLACK);
while (1) {
// put chip to sleep
switch(mcupower) {
case PMU_MCU_SLEEP:
default:
LCDPutStr("SLEEP ", MAX_X / 2 - 60, 10, WHITE, BLACK);
Chip_PMU_SleepState(LPC_PMU);
break;
case PMU_MCU_DEEP_SLEEP:
LCDPutStr("DEEP-SLEEP", MAX_X / 2 - 60, 10, WHITE, BLACK);
Chip_PMU_DeepSleepState(LPC_PMU);
break;
case PMU_MCU_POWER_DOWN:
LCDPutStr("POWER-DOWN", MAX_X / 2 - 60, 10, WHITE, BLACK);
Chip_PMU_PowerDownState(LPC_PMU);
break;
}
// start MRT timer channel 0
Chip_MRT_SetInterval(LPC_MRT_CH0, SystemCoreClock | MRT_INTVAL_LOAD);
Chip_MRT_SetMode(LPC_MRT_CH0,MRT_MODE_ONESHOT);
Chip_MRT_SetEnabled(LPC_MRT_CH0);
// turn on onboard LED
Chip_GPIO_SetPinState(LPC_GPIO_PORT,0,LED_PIN,false);
// start SCT
LPC_SCT->CTRL_L &= ~SCT_CTRL_HALT_L;
// wait for timeout
while(!RC5_timeout)
{};
// stop SCT
LPC_SCT->CTRL_L |= SCT_CTRL_HALT_L;
if (RC5_flag) {
// if frame received, output information on LCD
if((RC5_System != RC5_System_prev) || (RC5_Command != RC5_Command_prev)) {
cnt = 1;
}
else {
cnt++;
}
for (i = 3; i >= 0; i--){
LCDPutChar(ascii[(RC5_Frame >> (i * 4)) & 0x0F],MAX_X / 2 + 20,80+(3-i)*7,WHITE, BLACK);
if(i < 2) {
if((RC5_System!=RC5_System_prev) || (RC5_Command!=RC5_Command_prev)){
LCDPutChar(ascii[(RC5_System >> (i * 4)) & 0x0F],MAX_X / 2 + 5,66+(3-i)*7,WHITE, BLACK);
LCDPutChar(ascii[(RC5_Command >> (i * 4)) & 0x0F],MAX_X / 2 - 10,66+(3-i)*7,WHITE, BLACK);
}
}
LCDPutChar(ascii[(cnt >> (i * 4)) & 0x0F],MAX_X / 2 - 40,80+(3-i)*7,WHITE, BLACK);
}
LCDPutStr(RC5_Toggle ? "ON ":"OFF", MAX_X / 2 - 25, 80, WHITE, BLACK);
switch(RC5_Command) {
case 0x50:
mcupower = PMU_MCU_SLEEP;
break;
case 0x55:
if(RC5_Toggle){
spi0Transfer(SLEEPOUT);
spi0Transfer(DISPON);
}
else {
spi0Transfer(DISPOFF);
spi0Transfer(SLEEPIN);
}
break;
case 0x56:
mcupower = PMU_MCU_DEEP_SLEEP;
break;
case 0x6B:
mcupower = PMU_MCU_POWER_DOWN;
break;
}
RC5_System_prev = RC5_System;
RC5_Command_prev = RC5_Command;
}
// turn off onboard LED
Chip_GPIO_SetPinState(LPC_GPIO_PORT,0,LED_PIN,true);
// clear flags
RC5_flag = 0;
RC5_timeout = 0;
}
/**
* @brief Clears pin states that had a latched high edge (RISE) state
* @param ubPin : Pins (value of PININTCH*)
* @return Nothing
*/
STATIC INLINE void EXTINT_vClearRiseState(PININT_CH_T unPin)
{
/* Write 1 to clear */
WRITE_REG(LPC_PIN_INT->RISE, PININTCH(unPin));
}
int main(void)
{
#if defined (__USE_LPCOPEN)
// Read clock settings and update SystemCoreClock variable
SystemCoreClockUpdate();
#if !defined(NO_BOARD_LIB)
#if defined (__MULTICORE_MASTER) || defined (__MULTICORE_NONE)
// Set up and initialize all required blocks and
// functions related to the board hardware
Board_Init();
#endif
// Set the LED to the state of "On"
Board_LED_Set(0, true);
#endif
#endif
#if defined (__MULTICORE_MASTER_SLAVE_M0SLAVE) || \
defined (__MULTICORE_MASTER_SLAVE_M4SLAVE)
boot_multicore_slave();
#endif
// Get the address of the PCM value FIFO from the M4 master.
PCM_FIFO = (PCM_FIFO_T *) Chip_MBOX_GetValue(LPC_MBOX, MAILBOX_CM0PLUS);
// Map P0.21 as the CLKOUT pin.
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 21,
(IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGITAL_EN));
// Route the main clock to the CLKOUT pin, for a 1 MHz signal.
Chip_Clock_SetCLKOUTSource(SYSCON_CLKOUTSRC_MAINCLK, SystemCoreClock / 1000000);
// Enable the GPIO and pin-interrupt sub-systems.
Chip_GPIO_Init(LPC_GPIO);
Chip_PININT_Init(LPC_PININT);
// Map PIO0_9 as a GPIO input pin. This is the data signal from the
// microphone.
Chip_GPIO_SetPinDIRInput(LPC_GPIO, 0, 9);
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 9,
(IOCON_FUNC0 | IOCON_DIGITAL_EN | IOCON_GPIO_MODE));
// Map PIO0_11 as a GPIO input pin, triggering pin-interrupt 0. This will
// indicate that there is a sample ready from the microphone.
Chip_GPIO_SetPinDIRInput(LPC_GPIO, 0, 11);
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 11,
(IOCON_FUNC0 | IOCON_DIGITAL_EN | IOCON_GPIO_MODE));
Chip_INMUX_PinIntSel(PININTSELECT0, 0, 11);
// Trigger the interrupt on the clock's rising edge.
Chip_PININT_ClearIntStatus(LPC_PININT, PININTCH(PININTSELECT0));
Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(PININTSELECT0));
Chip_PININT_EnableIntHigh(LPC_PININT, PININTCH(PININTSELECT0));
// Enable the interrupt in the NVIC.
NVIC_EnableIRQ(PIN_INT0_IRQn);
// Spin while waiting for interrupts from the microphone.
while (1) {
__WFI();
}
return 0;
}
/**
* @brief Clears pin states that had a latched falling edge (FALL) state
* @param ubPin : Pins (value of PININTCH*)
* @return Nothing
*/
STATIC INLINE void EXTINT_vClearFallState(PININT_CH_T unPin)
{
/* Write 1 to clear */
WRITE_REG(LPC_PIN_INT->FALL, PININTCH(unPin));
}
void GPIO3_IRQHandler(void)
{
Chip_PININT_ClearIntStatus(LPC_GPIO_PIN_INT, PININTCH(3));
if(buttonsData[3].callbackSw!=NULL)
buttonsData[3].callbackSw( buttonsData[3].callbackSwArg);
}
/**
* @brief Clear interrupt status in Pin interrupt block
* @param ubPin : Pins (value of PININTCH*)
* @return Nothing
*/
STATIC INLINE void EXTINT_vClearIntStatus(PININT_CH_T unPin)
{
/* Write 1 to clear */
WRITE_REG(LPC_PIN_INT->IST, (PININTCH(unPin)));
}
void Chip_ADS1248_Init()
{
Chip_SSP_DeInit(ADS_SSP); //Clear previous setup
Chip_GPIO_Init(LPC_GPIO); //Init GPIO
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON);
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_SCLK, IOCON_FUNC2); //SCLK
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_MOSI, IOCON_FUNC2); //MOSI
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_MISO, IOCON_FUNC2); //MISO
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nSSEL1, IOCON_FUNC0 | IOCON_MODE_PULLUP);
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_START1, IOCON_FUNC0 | IOCON_MODE_PULLUP);
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nRESET1,IOCON_FUNC0 | IOCON_MODE_PULLUP);
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nSSEL0, IOCON_FUNC0 | IOCON_MODE_PULLUP);
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_START0, IOCON_FUNC0 | IOCON_MODE_PULLUP);
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nRESET0,IOCON_FUNC0 | IOCON_MODE_PULLUP);
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nDRDY0, IOCON_FUNC0 | IOCON_MODE_PULLUP);
Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nDRDY1, IOCON_FUNC0 | IOCON_MODE_PULLUP);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_nSSEL1);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_START1);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_nRESET1);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_nSSEL0);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_START0);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_nRESET0);
Chip_GPIO_SetPinDIRInput(LPC_GPIO, ADS_nDRDY0);
Chip_GPIO_SetPinDIRInput(LPC_GPIO, ADS_nDRDY1);
Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_nSSEL1);
Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_nRESET1);
Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_START1);
Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_nSSEL0);
Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_nRESET0);
Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_START0);
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_PINT);
Chip_SYSCTL_SetPinInterrupt(0, ADS_nDRDY0);
Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(0));
Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(0));
Chip_SYSCTL_EnablePINTWakeup(0);
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_PINT);
Chip_SYSCTL_SetPinInterrupt(1, ADS_nDRDY1);
Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(1));
Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(1));
Chip_SYSCTL_EnablePINTWakeup(1);
Chip_SSP_Init(ADS_SSP);
ssp_format.frameFormat = SSP_FRAMEFORMAT_SPI; //SPI Frame
ssp_format.bits = SSP_BITS_8; //8bits
ssp_format.clockMode = SSP_CLOCK_CPHA1_CPOL0; //CPHA=1, CPOL=0
Chip_SSP_SetFormat(ADS_SSP, ssp_format.bits, ssp_format.frameFormat, ssp_format.clockMode);
Chip_SSP_Set_Mode(ADS_SSP, SSP_MODE_MASTER);
Chip_SSP_SetClockRate(ADS_SSP, 1, 16);
Chip_Clock_SetSSP1ClockDiv(1);
Chip_SSP_Enable(ADS_SSP);
ADS1248_PeriphInit(CHIP_U1);
ADS1248_PeriphInit(CHIP_U3);
}
