/*!
* This function is used to configure a pin through the IOMUX module.
* FIXED ME: for backward compatible. Will be static function!
* @param pin a pin number as defined in \b #iomux_pin_name_t
* @param cfg an output function as defined in \b #iomux_pin_cfg_t
*
* @return 0 if successful; Non-zero otherwise
*/
static int iomux_config_mux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg)
{
u32 ret = 0;
u32 pin_index = PIN_TO_IOMUX_INDEX(pin);
u32 mux_reg = PIN_TO_IOMUX_MUX(pin);
u8 *rp;
BUG_ON(pin_index > MUX_PIN_NUM_MAX);
if (mux_reg != NON_MUX_I) {
mux_reg += IOMUXGPR;
BUG_ON((mux_reg > IOMUXSW_MUX_END)
|| (mux_reg < IOMUXSW_MUX_CTL));
spin_lock(&gpio_mux_lock);
__raw_writel(cfg, mux_reg);
/*
* Log a warning if a pin changes ownership
*/
rp = iomux_pin_res_table + pin_index;
if (*rp && *rp != (cfg | MUX_USED)) {
/*Console: how to do */
printk(KERN_ERR "iomux_config_mux: Warning: iomux pin"
" config changed, index=%d register=%d, "
" prev=0x%x new=0x%x\n", pin_index, mux_reg,
*rp, cfg);
ret = -EINVAL;
}
*rp = cfg | MUX_USED;
spin_unlock(&gpio_mux_lock);
}
return ret;
}
static inline u32 _get_mux_reg(iomux_pin_name_t pin)
{
u32 mux_reg = PIN_TO_IOMUX_MUX(pin);
mux_reg += IOMUXSW_MUX_CTL;
return mux_reg;
}
/*!
* This function is used to configure a pin through the IOMUX module.
* FIXED ME: for backward compatible. Will be static function!
* @param pin a pin number as defined in \b #iomux_pin_name_t
* @param cfg an output function as defined in \b #iomux_pin_cfg_t
*
* @return 0 if successful; Non-zero otherwise
*/
static int iomux_config_mux(iomux_pin_name_t pin, iomux_pin_cfg_t cfg)
{
u32 mux_reg = PIN_TO_IOMUX_MUX(pin);
if (mux_reg != NON_MUX_I) {
mux_reg += IOMUXGPR;
__REG(mux_reg) = cfg;
}
return 0;
}
static inline void * _get_mux_reg(iomux_pin_name_t pin)
{
u32 mux_reg = PIN_TO_IOMUX_MUX(pin);
if (cpu_is_mx51_rev(CHIP_REV_2_0) < 0) {
if ((pin == MX51_PIN_NANDF_RB5) ||
(pin == MX51_PIN_NANDF_RB6) ||
(pin == MX51_PIN_NANDF_RB7))
; /* Do nothing */
else if (mux_reg >= 0x2FC)
mux_reg += 8;
else if (mux_reg >= 0x130)
mux_reg += 0xC;
}
return IOMUXSW_MUX_CTL + mux_reg;
}
/*!
* This function is used to configure a pin through the IOMUX module.
* @param pin a pin number as defined in \b #iomux_pin_name_t
* @param config a configuration as defined in \b #iomux_pin_cfg_t
*
* @return 0 if successful; Non-zero otherwise
*/
static int iomux_config_mux(iomux_pin_name_t pin, iomux_pin_cfg_t config)
{
u32 ret = 0;
u32 pin_index = PIN_TO_IOMUX_INDEX(pin);
void *mux_reg = IOMUXSW_MUX_CTL + PIN_TO_IOMUX_MUX(pin);
u32 mux_data = 0;
u8 *rp;
BUG_ON((mux_reg > IOMUXSW_MUX_END) || (mux_reg < IOMUXSW_MUX_CTL));
spin_lock(&gpio_mux_lock);
if (config == IOMUX_CONFIG_GPIO) {
mux_data = PIN_TO_ALT_GPIO(pin);
} else {
mux_data = config;
}
__raw_writel(mux_data, mux_reg);
/*
* Log a warning if a pin changes ownership
*/
rp = iomux_pin_res_table + pin_index;
if ((mux_data & *rp) && (*rp != mux_data)) {
/*
* Don't call printk if we're tweaking the console uart or
* we'll deadlock.
*/
printk(KERN_ERR "iomux_config_mux: Warning: iomux pin"
" config changed, pin=%p, "
" prev=0x%x new=0x%x\n", mux_reg, *rp, mux_data);
ret = -EINVAL;
}
*rp = mux_data;
spin_unlock(&gpio_mux_lock);
return ret;
}
/* Get the iomux register address of this pin */
static inline u32 get_mux_reg(iomux_pin_name_t pin)
{
u32 mux_reg = PIN_TO_IOMUX_MUX(pin);
#if defined(CONFIG_MX51)
if (is_soc_rev(CHIP_REV_2_0) < 0) {
/*
* Fixup register address:
* i.MX51 TO1 has offset with the register
* which is define as TO2.
*/
if ((pin == MX51_PIN_NANDF_RB5) ||
(pin == MX51_PIN_NANDF_RB6) ||
(pin == MX51_PIN_NANDF_RB7))
; /* Do nothing */
else if (mux_reg >= 0x2FC)
mux_reg += 8;
else if (mux_reg >= 0x130)
mux_reg += 0xC;
}
#endif
mux_reg += IOMUXSW_MUX_CTL;
return mux_reg;
}
