/**
* \brief Configure PLL as clock input for MCK.
*
* \param mul PLL multiplier factor (not shifted, don't minus 1).
* \param div PLL divider factor (not shifted).
* \param prescaler Master Clock prescaler (shifted as in register).
*/
extern void PMC_ConfigureMckWithPll(uint32_t mul, uint32_t div, uint32_t prescaler)
{
/* First, select Main OSC as input clock for MCK */
_PMC_SwitchMck2MainClock();
/* Then, Set PLL clock */
PMC_SetPllClock(mul, div);
/* Wait until the master clock is established for the case we already turn on the PLL */
while( !(PMC->PMC_SR & PMC_SR_MCKRDY) );
/* Finally, select Pll as input clock for MCK */
PMC_SetMckSelection(PMC_MCKR_CSS_PLL_CLK, prescaler);
}
/**
* \brief Performs the low-level initialization of the chip.
* This includes EFC and master clock configuration.
* It also enable a low level on the pin NRST triggers a user reset.
*/
extern WEAK void LowLevelInit( void )
{
/* Set 3 FWS for Embedded Flash Access */
EFC->EEFC_FMR = EEFC_FMR_FWS(3);
if ((PMC->CKGR_MOR & CKGR_MOR_MOSCSEL) ) /* Main Oscillator Selection */
{
/* Switch MCK to Slow clock */
PMC_SetMckSelection(PMC_MCKR_CSS_SLOW_CLK, PMC_MCKR_PRES_CLK);
/* First, select external clock */
PMC_SelectExtOsc();
/* Then, enable Main XTAL oscillator */
PMC_EnableExtOsc();
/* Then, cofigure PLLB and switch clock */
PMC_ConfigureMckWithPllb(0x8, 1, PMC_MCKR_PRES_CLK_2); /* MCK = 12MHz * 8 / 2 = 48MHz */
}
}
