//__________________________________________________________________________________________________
void anibike_dl_master_initialize ( void )
{
// Set pull-down and wired-or so that there will be no problems
PORT_ConfigurePins( &DATALINK_PORT,
DATALINK_CLK_PIN|DATALINK_DATA_PIN,
false,
false,
PORT_OPC_TOTEM_gc,
PORT_ISC_INPUT_DISABLE_gc );
PORT_ConfigurePins( &DATALINK_PORT,
DATALINK_CS_PIN,
false,
false,
PORT_OPC_WIREDANDPULL_gc,
PORT_ISC_INPUT_DISABLE_gc );
DATALINK_PORT.DIRSET = DATALINK_CLK_PIN|DATALINK_DATA_PIN|DATALINK_CS_PIN;
DATALINK_PORT.OUTSET = DATALINK_CS_PIN;
/* Initialize SPI master on port DATAFLASH_PORT. */
SPI_MasterInit(&spiMasterC,
&DATALINK_SPI,
&DATALINK_PORT,
false,
SPI_MODE_0_gc,
SPI_INTLVL_OFF_gc,
false,
SPI_PRESCALER_DIV4_gc,1);
// drive cs to high
DATALINK_PORT.OUTSET = DATALINK_CS_PIN;
}
void nrf24l01_RX_config_slave(void)
{
ioport_set_pin_low(nrf24l01S_CE);
SPI_MasterSSHigh(&PORTC, PIN4_bm);
delay_us(20);
SPI_MasterSSLow(&PORTC, PIN4_bm);
delay_us(20);
rf_writebuf_slave(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH);
rf_writereg_slave(WRITE_REG + EN_AA, 0x01);//enable autoactive 0x01
rf_writereg_slave(WRITE_REG + EN_RXADDR, 0x01);
rf_writereg_slave(WRITE_REG + RF_CH, 40);
rf_writereg_slave(WRITE_REG + RX_PW_P0, TX_PLOAD_WIDTH);
rf_writereg_slave(WRITE_REG + RF_SETUP, 0x09);
rf_writereg_slave(WRITE_REG + CONFIG, 0x0f);
//SPI_MasterSSLow(ssPort, PIN4_bm);
ioport_set_pin_high(nrf24l01S_CE);
delay_us(150);//at least 130us
PORT_ConfigurePins( &PORTC,
0x01, //set pin PK0 as input 'IRQ';
false,
false,
PORT_OPC_TOTEM_gc,
PORT_ISC_FALLING_gc );//set falling edge as trigger;
PORT_SetPinsAsInput( &PORTC, 0x01 );
/* Configure Interrupt0 to have medium interrupt level, triggered by pin 0. */
PORT_ConfigureInterrupt0( &PORTC, PORT_INT0LVL_MED_gc, 0x01 );
}
//__________________________________________________________________________________________________
void anibike_dl_slave_initialize ( void )
{
// map PORT C to virtual port 1
PORT_MapVirtualPort1( PORTCFG_VP1MAP_PORTC_gc );
// set clk out and data in
DATALINK_PORT.DIRCLR = DATALINK_DATA_PIN|DATALINK_CLK_PIN|DATALINK_CS_PIN;
PORT_ConfigurePins( &DATALINK_PORT,
DATALINK_CLK_PIN|DATALINK_DATA_PIN,
false,
false,
PORT_OPC_TOTEM_gc,
PORT_ISC_BOTHEDGES_gc );
PORT_ConfigurePins( &DATALINK_PORT,
DATALINK_CS_PIN,
false,
false,
PORT_OPC_PULLUP_gc,
PORT_ISC_FALLING_gc );
//PORT_ISC_BOTHEDGES_gc );
/* Initialize SPI slave on port C. */
SPI_SlaveInit(&spiSlaveC,
&DATALINK_SPI,
&DATALINK_PORT,
false,
SPI_MODE_0_gc,
SPI_INTLVL_MED_gc);
PORT_ConfigureInterrupt0( &DATALINK_PORT, PORT_INT0LVL_HI_gc, DATALINK_CS_PIN );
PMIC.CTRL |= PMIC_LOLVLEN_bm|PMIC_MEDLVLEN_bm|PMIC_HILVLEN_bm;
DL_SLAVE_CIRC_BUFFER_START = 0;
DL_SLAVE_CIRC_BUFFER_END = 0;
g_receive_buffer = g_buffer_II;
g_proj_buffer = g_buffer_I;
g_current_double_buffer = 0;
set_projection_buffer ( g_proj_buffer );
}
void naiboard_uart_init(void) {
sysclk_enable_peripheral_clock(&USARTMODULE);
// We're only using the stdout, stdin is handled by the AVR USART driver.
stdout = &mystdout;
PORT_SetPinsAsOutput(&USARTPORT, USARTTXPIN);
PORT_ConfigurePins(&USARTPORT, USARTTXPIN, false, false, PORT_OPC_WIREDANDPULL_gc, PORT_ISC_INPUT_DISABLE_gc);
PORT_SetPinsAsInput(&USARTPORT, USARTRXPIN);
PORT_ConfigurePins(&USARTPORT, USARTRXPIN, false, false, PORT_OPC_PULLDOWN_gc, PORT_ISC_FALLING_gc);
USART_InterruptDriver_Initialize(&naiboard_uart, &USARTMODULE, USART_DREINTLVL_LO_gc);
USART_RxdInterruptLevel_Set(&USARTMODULE, USART_RXCINTLVL_LO_gc);
USART_Format_Set(&USARTMODULE, USART_CHSIZE_8BIT_gc, USART_PMODE_DISABLED_gc, false);
USART_Baudrate_Set(&USARTMODULE, 1603, -6); // 48MHz, 115200bps
USART_Rx_Enable(&USARTMODULE);
USART_Tx_Enable(&USARTMODULE);
}
void initialize_hall_sensor ( void )
{
// Set pin2 to be input
HALL_SENSOR_PORT.DIRCLR = HALL_SENSOR_PIN;
// Setup asynchronous interrupt
PORT_ConfigurePins( &HALL_SENSOR_PORT,
HALL_SENSOR_PIN,
false,
false,
PORT_OPC_PULLUP_gc,
PORT_ISC_RISING_gc );
PORT_ConfigureInterrupt0( &HALL_SENSOR_PORT, PORT_INT0LVL_MED_gc, HALL_SENSOR_PIN );
}
