void configure_gpio_pins(uint32_t instance)
{
switch(instance) {
case HW_PORTA: /* HW_PORTA */
/* Affects PORTA_PCR4 register */
PORT_HAL_SetPassiveFilterCmd(PORTA_BASE,4u,false);
PORT_HAL_SetMuxMode(PORTA_BASE,4u,kPortMuxAsGpio);
PORT_HAL_SetPullMode(PORTA_BASE,4u,kPortPullUp);
PORT_HAL_SetPullCmd(PORTA_BASE,4u,true);
break;
case HW_PORTB: /* HW_PORTB */
/* Affects PORTB_PCR21 register */
PORT_HAL_SetDriveStrengthMode(PORTB_BASE,21u,kPortLowDriveStrength);
PORT_HAL_SetMuxMode(PORTB_BASE,21u,kPortMuxAsGpio);
PORT_HAL_SetSlewRateMode(PORTB_BASE,21u,kPortSlowSlewRate);
/* Affects PORTB_PCR22 register */
PORT_HAL_SetDriveStrengthMode(PORTB_BASE,22u,kPortLowDriveStrength);
PORT_HAL_SetMuxMode(PORTB_BASE,22u,kPortMuxAsGpio);
PORT_HAL_SetSlewRateMode(PORTB_BASE,22u,kPortSlowSlewRate);
break;
case HW_PORTC: /* HW_PORTC */
/* Affects PORTC_PCR0 register */
PORT_HAL_SetMuxMode(PORTC_BASE,0u,kPortMuxAsGpio);
/* Affects PORTC_PCR6 register */
PORT_HAL_SetPassiveFilterCmd(PORTC_BASE,6u,false);
PORT_HAL_SetMuxMode(PORTC_BASE,6u,kPortMuxAsGpio);
PORT_HAL_SetPullMode(PORTC_BASE,6u,kPortPullUp);
PORT_HAL_SetPullCmd(PORTC_BASE,6u,true);
/* Affects PORTC_PCR8 register */
PORT_HAL_SetMuxMode(PORTC_BASE,8u,kPortMuxAsGpio);
/* Affects PORTC_PCR9 register */
PORT_HAL_SetMuxMode(PORTC_BASE,9u,kPortMuxAsGpio);
/* Affects PORTC_PCR12 register */
PORT_HAL_SetMuxMode(PORTC_BASE,12u,kPortMuxAsGpio);
/* Affects PORTC_PCR13 register */
PORT_HAL_SetMuxMode(PORTC_BASE,13u,kPortMuxAsGpio);
/* Affects PORTC_PCR16 register */
PORT_HAL_SetMuxMode(PORTC_BASE,16u,kPortMuxAsGpio);
PORT_HAL_SetMuxMode(PORTC_BASE,10u,kPortMuxAsGpio);
PORT_HAL_SetMuxMode(PORTC_BASE,2u,kPortMuxAsGpio);
break;
case HW_PORTE: /* HW_PORTE */
/* Affects PORTE_PCR6 register */
PORT_HAL_SetMuxMode(PORTE_BASE,6u,kPortMuxAsGpio);
/* Affects PORTE_PCR26 register */
PORT_HAL_SetDriveStrengthMode(PORTE_BASE,26u,kPortLowDriveStrength);
PORT_HAL_SetMuxMode(PORTE_BASE,26u,kPortMuxAsGpio);
PORT_HAL_SetSlewRateMode(PORTE_BASE,26u,kPortSlowSlewRate);
break;
default:
break;
}
}
void configure_spi_pins(uint32_t instance)
{
switch(instance) {
case 0: /* SPI0 */
/* PORTE_PCR19 */
PORT_HAL_SetMuxMode(PORTC_BASE, 7u,kPortMuxAlt2); /* MISO */
/* PORTE_PCR18 */
PORT_HAL_SetMuxMode(PORTC_BASE, 6u,kPortMuxAlt2); /* MOSI */
/* PORTE_PCR17 */
PORT_HAL_SetMuxMode(PORTC_BASE, 5u,kPortMuxAlt2); /* SCK */
/* PORTE_PCR16 */
PORT_HAL_SetMuxMode(PORTC_BASE, 4u,kPortMuxAlt2); /* PCS0 */
break;
case 1: /* SPI1 */
/* PORTD_PCR7 */
PORT_HAL_SetMuxMode(PORTD_BASE,7u,kPortMuxAlt2); /* MISO */
PORT_HAL_SetDriveStrengthMode(PORTD_BASE, 7u, kPortHighDriveStrength);
/* PORTD_PCR6 */
PORT_HAL_SetMuxMode(PORTD_BASE,6u,kPortMuxAlt2); /* MOSI */
/* PORTD_PCR5 */
PORT_HAL_SetMuxMode(PORTD_BASE,5u,kPortMuxAlt2); /* SCK */
/* PORTD_PCR4 */
PORT_HAL_SetMuxMode(PORTD_BASE,4u,kPortMuxAlt2); /* PCS0 */
break;
default:
break;
}
}
/*FUNCTION**********************************************************************
*
* Function Name : GPIO_DRV_OutputPinInit
* Description : Initialize one GPIO output pin used by board.
*
*END**************************************************************************/
void GPIO_DRV_OutputPinInit(const gpio_output_pin_user_config_t *outputPin)
{
/* Get actual port and pin number.*/
uint32_t port = GPIO_EXTRACT_PORT(outputPin->pinName);
uint32_t pin = GPIO_EXTRACT_PIN(outputPin->pinName);
GPIO_Type * gpioBase = g_gpioBase[port];
PORT_Type * portBase = g_portBase[port];
/* Un-gate port clock*/
CLOCK_SYS_EnablePortClock(port);
/* Set current pin as gpio.*/
PORT_HAL_SetMuxMode(portBase, pin, kPortMuxAsGpio);
/* Set current pin as digital output.*/
GPIO_HAL_SetPinDir(gpioBase, pin, kGpioDigitalOutput);
/* Configure GPIO output features. */
GPIO_HAL_WritePinOutput(gpioBase, pin, outputPin->config.outputLogic);
#if FSL_FEATURE_PORT_HAS_SLEW_RATE
PORT_HAL_SetSlewRateMode(portBase, pin, outputPin->config.slewRate);
#endif
#if FSL_FEATURE_PORT_HAS_DRIVE_STRENGTH
PORT_HAL_SetDriveStrengthMode(portBase, pin, outputPin->config.driveStrength);
#endif
#if FSL_FEATURE_PORT_HAS_OPEN_DRAIN
PORT_HAL_SetOpenDrainCmd(portBase, pin, outputPin->config.isOpenDrainEnabled);
#endif
}
void configure_gpio_pins(uint32_t instance)
{
switch(instance) {
case PORTA_IDX: /* PORTA_IDX */
/* Affects PORTA_PCR2 register */
PORT_HAL_SetMuxMode(PORTA,2u,kPortMuxAsGpio);
/* Affects PORTA_PCR4 register */
PORT_HAL_SetMuxMode(PORTA,4u,kPortMuxAsGpio);
break;
case PORTB_IDX: /* PORTB_IDX */
/* Affects PORTB_PCR0 register */
PORT_HAL_SetMuxMode(PORTB,0u,kPortMuxAsGpio);
/* Affects PORTB_PCR3 register */
PORT_HAL_SetMuxMode(PORTB,3u,kPortMuxAsGpio);
break;
case PORTC_IDX: /* PORTC_IDX */
/* Affects PORTC_PCR1 register */
PORT_HAL_SetDriveStrengthMode(PORTC,1u,kPortLowDriveStrength);
PORT_HAL_SetMuxMode(PORTC,1u,kPortMuxAsGpio);
PORT_HAL_SetSlewRateMode(PORTC,1u,kPortSlowSlewRate);
/* Affects PORTC_PCR3 register */
PORT_HAL_SetDriveStrengthMode(PORTC,3u,kPortLowDriveStrength);
PORT_HAL_SetMuxMode(PORTC,3u,kPortMuxAsGpio);
PORT_HAL_SetSlewRateMode(PORTC,3u,kPortSlowSlewRate);
/* Affects PORTC_PCR4 register */
PORT_HAL_SetDriveStrengthMode(PORTC,4u,kPortLowDriveStrength);
PORT_HAL_SetMuxMode(PORTC,4u,kPortMuxAsGpio);
PORT_HAL_SetSlewRateMode(PORTC,4u,kPortSlowSlewRate);
break;
case PORTD_IDX: /* PORTD_IDX */
/* Affects PORTD_PCR4 register */
PORT_HAL_SetDriveStrengthMode(PORTD,4u,kPortLowDriveStrength);
PORT_HAL_SetMuxMode(PORTD,4u,kPortMuxAsGpio);
PORT_HAL_SetSlewRateMode(PORTD,4u,kPortSlowSlewRate);
/* Affects PORTD_PCR5 register */
PORT_HAL_SetDriveStrengthMode(PORTD,5u,kPortLowDriveStrength);
PORT_HAL_SetMuxMode(PORTD,5u,kPortMuxAsGpio);
PORT_HAL_SetSlewRateMode(PORTD,5u,kPortSlowSlewRate);
/* Affects PORTD_PCR6 register */
PORT_HAL_SetDriveStrengthMode(PORTD,6u,kPortLowDriveStrength);
PORT_HAL_SetMuxMode(PORTD,6u,kPortMuxAsGpio);
PORT_HAL_SetSlewRateMode(PORTD,6u,kPortSlowSlewRate);
/* Affects PORTD_PCR7 register */
PORT_HAL_SetDriveStrengthMode(PORTD,7u,kPortLowDriveStrength);
PORT_HAL_SetMuxMode(PORTD,7u,kPortMuxAsGpio);
PORT_HAL_SetSlewRateMode(PORTD,7u,kPortSlowSlewRate);
case PORTE_IDX: /* PORTE_IDX */
/* Affects PORTE_PCR25 register */
PORT_HAL_SetDriveStrengthMode(PORTE,25u,kPortLowDriveStrength);
PORT_HAL_SetMuxMode(PORTE,25u,kPortMuxAsGpio);
PORT_HAL_SetSlewRateMode(PORTE,25u,kPortSlowSlewRate);
break;
default:
break;
}
}
void configure_gpio_pins(uint32_t instance)
{
switch(instance) {
case PORTA_IDX: /* PORTA_IDX */
/* Affects PORTA_PCR4 register */
PORT_HAL_SetPassiveFilterCmd(PORTA,4u,false);
PORT_HAL_SetMuxMode(PORTA,4u,kPortMuxAsGpio);
PORT_HAL_SetPullMode(PORTA,4u,kPortPullUp);
PORT_HAL_SetPullCmd(PORTA,4u,true);
/* Affects PORTA_PCR13 register */
PORT_HAL_SetDriveStrengthMode(PORTA,13u,kPortLowDriveStrength);
PORT_HAL_SetMuxMode(PORTA,13u,kPortMuxAsGpio);
PORT_HAL_SetSlewRateMode(PORTA,13u,kPortSlowSlewRate);
break;
case PORTB_IDX: /* PORTB_IDX */
/* Affects PORTB_PCR18 register */
PORT_HAL_SetDriveStrengthMode(PORTB,18u,kPortLowDriveStrength);
PORT_HAL_SetMuxMode(PORTB,18u,kPortMuxAsGpio);
PORT_HAL_SetSlewRateMode(PORTB,18u,kPortSlowSlewRate);
/* Affects PORTB_PCR19 register */
PORT_HAL_SetDriveStrengthMode(PORTB,19u,kPortLowDriveStrength);
PORT_HAL_SetMuxMode(PORTB,19u,kPortMuxAsGpio);
PORT_HAL_SetSlewRateMode(PORTB,19u,kPortSlowSlewRate);
break;
case PORTC_IDX: /* PORTC_IDX */
/* PORTC_PCR1 */
PORT_HAL_SetMuxMode(PORTC,1u,kPortMuxAsGpio);
/* Affects PORTC_PCR2 register */
PORT_HAL_SetPassiveFilterCmd(PORTC,2u,false);
PORT_HAL_SetMuxMode(PORTC,2u,kPortMuxAsGpio);
PORT_HAL_SetPullMode(PORTC,2u,kPortPullUp);
PORT_HAL_SetPullCmd(PORTC,2u,true);
/* Affects PORTC_PCR3 register */
PORT_HAL_SetPassiveFilterCmd(PORTC,3u,false);
PORT_HAL_SetMuxMode(PORTC,3u,kPortMuxAsGpio);
PORT_HAL_SetPullMode(PORTC,3u,kPortPullUp);
PORT_HAL_SetPullCmd(PORTC,3u,true);
break;
default:
break;
}
}
void configure_sdhc_pins(uint32_t instance)
{
/* Affects PORTE_PCR3 register */
PORT_HAL_SetMuxMode(PORTE_BASE,3u,kPortMuxAlt4);
PORT_HAL_SetPullMode(PORTE_BASE,3u,kPortPullUp);
PORT_HAL_SetPullCmd(PORTE_BASE,3u,true);
PORT_HAL_SetDriveStrengthMode(PORTE_BASE,3u,kPortHighDriveStrength);
/* Affects PORTE_PCR1 register */
PORT_HAL_SetMuxMode(PORTE_BASE,1u,kPortMuxAlt4);
PORT_HAL_SetPullMode(PORTE_BASE,1u,kPortPullUp);
PORT_HAL_SetPullCmd(PORTE_BASE,1u,true);
PORT_HAL_SetDriveStrengthMode(PORTE_BASE,1u,kPortHighDriveStrength);
/* Affects PORTE_PCR0 register */
PORT_HAL_SetMuxMode(PORTE_BASE,0u,kPortMuxAlt4);
PORT_HAL_SetPullMode(PORTE_BASE,0u,kPortPullUp);
PORT_HAL_SetPullCmd(PORTE_BASE,0u,true);
PORT_HAL_SetDriveStrengthMode(PORTE_BASE,0u,kPortHighDriveStrength);
/* Affects PORTE_PCR5 register */
PORT_HAL_SetMuxMode(PORTE_BASE,5u,kPortMuxAlt4);
PORT_HAL_SetPullMode(PORTE_BASE,5u,kPortPullUp);
PORT_HAL_SetPullCmd(PORTE_BASE,5u,true);
PORT_HAL_SetDriveStrengthMode(PORTE_BASE,5u,kPortHighDriveStrength);
/* Affects PORTE_PCR4 register */
PORT_HAL_SetMuxMode(PORTE_BASE,4u,kPortMuxAlt4);
PORT_HAL_SetPullMode(PORTE_BASE,4u,kPortPullUp);
PORT_HAL_SetPullCmd(PORTE_BASE,4u,true);
PORT_HAL_SetDriveStrengthMode(PORTE_BASE,4u,kPortHighDriveStrength);
/* Affects PORTE_PCR2 register */
PORT_HAL_SetMuxMode(PORTE_BASE,2u,kPortMuxAlt4);
PORT_HAL_SetPullMode(PORTE_BASE,2u,kPortPullUp);
PORT_HAL_SetPullCmd(PORTE_BASE,2u,true);
PORT_HAL_SetDriveStrengthMode(PORTE_BASE,2u,kPortHighDriveStrength);
}
