__interrupt void epwm3_timer_isr(void)
{
EPwm3TimerIntCount++;
// Clear INT flag for this timer
PWM_clearIntFlag(myPwm3);
// Acknowledge this interrupt to receive more interrupts from group 3
PIE_clearInt(myPie, PIE_GroupNumber_3);
}
__interrupt void epwm3_isr(void)
{
// Update the CMPA and CMPB values
update_compare(&epwm3_info);
// Clear INT flag for this timer
PWM_clearIntFlag(myPwm3);
// Acknowledge this interrupt to receive more interrupts from group 3
PIE_clearInt(myPie, PIE_GroupNumber_3);
}
// This ISR MUST be executed from RAM as it will put the Flash into Standby
interrupt void EPwm2_timer_isr(void)
{
EPwm2TimerIntCount++;
// Put the Flash into standby
FLASH_setPowerMode(myFlash, FLASH_PowerMode_PumpAndBankStandby);
// Clear INT flag for this timer
PWM_clearIntFlag(myPwm2);
// Clear this interrupt to receive more interrupts from group 3
PIE_clearInt(myPie, PIE_GroupNumber_3);
}
// This ISR MUST be executed from RAM as it will put the Flash into Sleep
// Interrupt routines uses in this example:
interrupt void EPwm1_timer_isr(void)
{
// Put the Flash to sleep
FLASH_setPowerMode(myFlash, FLASH_PowerMode_PumpAndBankSleep);
EPwm1TimerIntCount++;
// Clear INT flag for this timer
PWM_clearIntFlag(myPwm1);
// Clear this interrupt to receive more interrupts from group 3
PIE_clearInt(myPie, PIE_GroupNumber_3);
}
interrupt void EPwm3_timer_isr(void)
{
uint16_t i;
EPwm3TimerIntCount++;
// Short Delay to simulate some ISR Code
for(i = 1; i < 0x01FF; i++) {}
// Clear INT flag for this timer
PWM_clearIntFlag(myPwm3);
// Clear this interrupt to receive more interrupts from group 3
PIE_clearInt(myPie, PIE_GroupNumber_3);
}
void main(void)
{
CPU_Handle myCpu;
PLL_Handle myPll;
WDOG_Handle myWDog;
// Initialize all the handles needed for this application
myClk = CLK_init((void *)CLK_BASE_ADDR, sizeof(CLK_Obj));
myCpu = CPU_init((void *)NULL, sizeof(CPU_Obj));
myFlash = FLASH_init((void *)FLASH_BASE_ADDR, sizeof(FLASH_Obj));
myGpio = GPIO_init((void *)GPIO_BASE_ADDR, sizeof(GPIO_Obj));
myPie = PIE_init((void *)PIE_BASE_ADDR, sizeof(PIE_Obj));
myPll = PLL_init((void *)PLL_BASE_ADDR, sizeof(PLL_Obj));
myPwm1 = PWM_init((void *)PWM_ePWM1_BASE_ADDR, sizeof(PWM_Obj));
myPwm2 = PWM_init((void *)PWM_ePWM2_BASE_ADDR, sizeof(PWM_Obj));
myPwm3 = PWM_init((void *)PWM_ePWM3_BASE_ADDR, sizeof(PWM_Obj));
myPwm4 = PWM_init((void *)PWM_ePWM4_BASE_ADDR, sizeof(PWM_Obj));
myWDog = WDOG_init((void *)WDOG_BASE_ADDR, sizeof(WDOG_Obj));
// Perform basic system initialization
WDOG_disable(myWDog);
CLK_enableAdcClock(myClk);
(*Device_cal)();
CLK_disableAdcClock(myClk);
//Select the internal oscillator 1 as the clock source
CLK_setOscSrc(myClk, CLK_OscSrc_Internal);
// Setup the PLL for x12 /2 which will yield 60Mhz = 10Mhz * 12 / 2
PLL_setup(myPll, PLL_Multiplier_12, PLL_DivideSelect_ClkIn_by_2);
// Disable the PIE and all interrupts
PIE_disable(myPie);
PIE_disableAllInts(myPie);
CPU_disableGlobalInts(myCpu);
CPU_clearIntFlags(myCpu);
// If running from flash copy RAM only functions to RAM
#ifdef _FLASH
memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
#endif
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the f2802x_SysCtrl.c file.
// InitSysCtrl();
// Step 2. Initialize GPIO:
// This example function is found in the f2802x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio(); // Skipped for this example
// InitEPwmGpio();
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
// DINT;
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the f2802x_PieCtrl.c file.
// InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
// IER = 0x0000;
// IFR = 0x0000;
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in f2802x_DefaultIsr.c.
// This function is found in f2802x_PieVect.c.
// InitPieVectTable();
// For this case just init GPIO pins for EPwm1, EPwm2, EPwm3, EPwm4
GPIO_setPullUp(myGpio, GPIO_Number_0, GPIO_PullUp_Disable);
GPIO_setPullUp(myGpio, GPIO_Number_1, GPIO_PullUp_Disable);
GPIO_setMode(myGpio, GPIO_Number_0, GPIO_0_Mode_EPWM1A);
GPIO_setMode(myGpio, GPIO_Number_1, GPIO_1_Mode_EPWM1B);
GPIO_setPullUp(myGpio, GPIO_Number_2, GPIO_PullUp_Disable);
GPIO_setPullUp(myGpio, GPIO_Number_3, GPIO_PullUp_Disable);
GPIO_setMode(myGpio, GPIO_Number_2, GPIO_2_Mode_EPWM2A);
GPIO_setMode(myGpio, GPIO_Number_3, GPIO_3_Mode_EPWM2B);
GPIO_setPullUp(myGpio, GPIO_Number_4, GPIO_PullUp_Disable);
GPIO_setPullUp(myGpio, GPIO_Number_5, GPIO_PullUp_Disable);
GPIO_setMode(myGpio, GPIO_Number_4, GPIO_4_Mode_EPWM3A);
GPIO_setMode(myGpio, GPIO_Number_5, GPIO_5_Mode_EPWM3B);
GPIO_setPullUp(myGpio, GPIO_Number_6, GPIO_PullUp_Disable);
GPIO_setPullUp(myGpio, GPIO_Number_7, GPIO_PullUp_Disable);
GPIO_setMode(myGpio, GPIO_Number_6, GPIO_6_Mode_EPWM4A);
GPIO_setMode(myGpio, GPIO_Number_7, GPIO_7_Mode_EPWM4B);
// Setup a debug vector table and enable the PIE
PIE_setDebugIntVectorTable(myPie);
PIE_enable(myPie);
// Step 4. Initialize the Device Peripherals:
CLK_enablePwmClock(myClk, PWM_Number_1);
CLK_enablePwmClock(myClk, PWM_Number_2);
CLK_enablePwmClock(myClk, PWM_Number_3);
CLK_enablePwmClock(myClk, PWM_Number_4);
CLK_enableHrPwmClock(myClk);
// For this example, only initialize the ePWM
// Step 5. User specific code, enable interrupts:
// Calling SFO() updates the HRMSTEP register with calibrated MEP_ScaleFactor.
// HRMSTEP must be populated with a scale factor value prior to enabling
// high resolution period control.
status = SFO_INCOMPLETE;
while (status== SFO_INCOMPLETE) // Call until complete
{
status = SFO();
if (status == SFO_ERROR)
{
error(); // SFO function returns 2 if an error occurs & # of MEP steps/coarse step
} // exceeds maximum of 255.
}
// Some useful PWM period vs Frequency values
// TBCLK = 60 MHz
//===================
// Period Freq
// 1000 30 KHz
// 800 37.5 KHz
// 600 50 KHz
// 500 60 KHz
// 250 120 KHz
// 200 150 KHz
// 100 300 KHz
// 50 600 KHz
// 30 1 MHz
// 25 1.2 MHz
// 20 1.5 MHz
// 12 2.5 MHz
// 10 3 MHz
// 9 3.3 MHz
// 8 3.8 MHz
// 7 4.3 MHz
// 6 5.0 MHz
// 5 6.0 MHz
//====================================================================
// ePWM and HRPWM register initialization
//====================================================================
Period = 500;
PeriodFine=0xFFBF;
CLK_disableTbClockSync(myClk);
HRPWM_Config(myPwm1, Period, 1);
HRPWM_Config(myPwm2, Period, 0);
HRPWM_Config(myPwm3, Period, 0);
HRPWM_Config(myPwm4, Period, 0);
CLK_enableTbClockSync(myClk);
// Software Control variables
Increment_Freq = 1;
Increment_Freq_Fine = 1;
IsrTicker = 0;
UpdatePeriod = 0;
UpdatePeriodFine = 0;
// User control variables:
UpdateCoarse = 0;
UpdateFine = 1;
// Reassign ISRs.
PIE_registerPieIntHandler(myPie, PIE_GroupNumber_3, PIE_SubGroupNumber_1,
(intVec_t)&MainISR);
// Enable PIE group 3 interrupt 1 for EPWM1_INT
PIE_enableInt(myPie, PIE_GroupNumber_3, PIE_InterruptSource_EPWM1);
// Enable CNT_zero interrupt using EPWM1 Time-base
PWM_setIntMode(myPwm1, PWM_IntMode_CounterEqualZero); // Select INT on Zero event
PWM_enableInt(myPwm1); // Enable INT
PWM_setIntPeriod(myPwm1, PWM_IntPeriod_FirstEvent); // Generate INT on 3rd event
PWM_clearIntFlag(myPwm1);
// Enable CPU INT3 for EPWM1_INT:
CPU_enableInt(myCpu, CPU_IntNumber_3);
// Enable global Interrupts and higher priority real-time debug events:
CPU_enableGlobalInts(myCpu);
CPU_enableDebugInt(myCpu);
PWM_forceSync(myPwm1); // Synchronize high resolution phase to start HR period
for(;;)
{
// The below code controls coarse edge movement
if(UpdateCoarse==1)
{
if(Increment_Freq==1) //Increase frequency to 600 kHz
Period= Period - 1;
else
Period= Period + 1; //Decrease frequency to 300 kHz
if(Period<100 && Increment_Freq==1)
Increment_Freq=0;
else if(Period>500 && Increment_Freq==0)
Increment_Freq=1;
UpdatePeriod=1;
}
// The below code controls high-resolution fine edge movement
if(UpdateFine==1)
{
if(Increment_Freq_Fine==1) // Increase high-resolution frequency
PeriodFine=PeriodFine-1;
else
PeriodFine=PeriodFine+1; // Decrement high-resolution frequency
if(PeriodFine<=0x3333 && Increment_Freq_Fine==1)
Increment_Freq_Fine=0;
else if(PeriodFine>= 0xFFBF && Increment_Freq_Fine==0)
Increment_Freq_Fine=1;
UpdatePeriodFine=1;
}
// Call the scale factor optimizer lib function SFO()
// periodically to track for any change due to temp/voltage.
// This function generates MEP_ScaleFactor by running the
// MEP calibration module in the HRPWM logic. This scale
// factor can be used for all HRPWM channels. HRMSTEP
// register is automatically updated by the SFO function.
status = SFO(); // in background, MEP calibration module continuously updates MEP_ScaleFactor
if (status == SFO_ERROR)
{
error(); // SFO function returns 2 if an error occurs & # of MEP steps/coarse step
} // exceeds maximum of 255.
}
}// end main
