/** Reads a 32-bit PCI configuration register. Reads and returns the 32-bit PCI configuration register specified by Address. This function must guarantee that all PCI read and write operations are serialized. If Address > 0x0FFFFFFF, then ASSERT(). @param Address Address that encodes the PCI Bus, Device, Function and Register. @return The read value from the PCI configuration register. **/ UINT32 EFIAPI PciRead32 ( IN UINTN Address ) { return PciCf8Read32 (Address); }
/** Reads a 32-bit PCI configuration register. Reads and returns the 32-bit PCI configuration register specified by Address. This function must guarantee that all PCI read and write operations are serialized. If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). @param Address The address that encodes the PCI Bus, Device, Function and Register. @return The read value from the PCI configuration register. **/ UINT32 EFIAPI PciRead32 ( IN UINTN Address ) { return mRunningOnQ35 ? PciExpressRead32 (Address) : PciCf8Read32 (Address); }