VOID
HALBT_SetRtsCtsNoLenLimit(
IN PADAPTER Adapter
)
{
#if( RTS_CTS_NO_LEN_LIMIT == 1)
PlatformEFIOWrite4Byte(Adapter, 0x4c8, 0xc140402);
#endif
}
VOID
ODM_Write4Byte(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr,
IN u4Byte Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
RTL_W32(RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
rtw_write32(Adapter,RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformEFIOWrite4Byte(Adapter, RegAddr, Data);
#endif
}
void
ODM_Write4Byte(
PDM_ODM_T pDM_Odm,
u32 RegAddr,
u32 Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
RTL_W32(RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
struct rtw_adapter * Adapter = pDM_Odm->Adapter;
rtw_write32(Adapter,RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
struct rtw_adapter * Adapter = pDM_Odm->Adapter;
PlatformEFIOWrite4Byte(Adapter, RegAddr, Data);
#endif
}
extern NDIS_STATUS usb_dvobj_init(_adapter * padapter){
NDIS_STATUS status=_SUCCESS;
struct dvobj_priv *pdvobjpriv=&padapter->dvobjpriv;
u8 hw_version;
u32 val32,size;
_func_enter_;
pdvobjpriv->padapter=padapter;
DEBUG_ERR(("\nusb_dvobj_init:read hw_version!!\n"));
hw_version = 0;
#if 0
hw_version = (read32(padapter, TCR) & TCR_HWVERID_MASK)>>TCR_HWVERID_SHIFT;
switch (hw_version) {
case VERSION_819xUsb_A:
padapter->registrypriv.chip_version=VERSION_819xUsb_A;
DEBUG_ERR(("\nusb_dvobj_init:padapter->registrypriv.chip_version=%d(VERSION_819xUsb_A)\n",padapter->registrypriv.chip_version));
default:
padapter->registrypriv.chip_version= VERSION_819xUsb_A;
break;
}
DEBUG_ERR(("\nusb_dvobj_init:padapter->registrypriv.chip_version=%d\n",padapter->registrypriv.chip_version));
#endif
/*Read EEprom size */
DEBUG_ERR(("\nusb_dvobj_init:read eeprom Size!!\n"));
val32 = PlatformEFIORead2Byte(padapter, Cmd9346CR);
size = (val32 & Cmd9346CR_9356SEL) ? 8 : 6;
padapter->EepromAddressSize = size;
DEBUG_ERR(("EEPROM type is %s\n",size==8 ? "93C56" : "93C46"));
DEBUG_ERR(("\nusb_dvobj_init:padapter->EepromAddressSize=%d\n",padapter->EepromAddressSize));
read_eeprom_content(padapter);
//write IDR0~IDR5
// for(i=0 ; i<6 ; i++)
// write8(padapter, IDR0+i, padapter->eeprompriv.mac_addr[i]);
PlatformEFIOWrite4Byte(padapter, IDR0, ((pu4Byte)(padapter->eeprompriv.mac_addr))[0]);
PlatformEFIOWrite2Byte(padapter, IDR4, ((pu2Byte)(padapter->eeprompriv.mac_addr+4))[0]);
// for(i=0 ; i<6 ; i++)
{
DEBUG_ERR(("%8x ",PlatformEFIORead4Byte(padapter, IDR0) ) );
DEBUG_ERR(("%4x ",PlatformEFIORead2Byte(padapter, IDR4) ));
}
printk("\n");
#ifdef TODO
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21))
INIT_WORK(&_sys_mib->DigWorkItem, (void(*)(void*)) DigWorkItemCallback, padapter);
INIT_WORK(&_sys_mib->RateAdaptiveWorkItem, (void(*)(void*)) RateAdaptiveWorkItemCallback, padapter);
#else
INIT_DELAYED_WORK(&_sys_mib->DigWorkItem, DigWorkItemCallback);
INIT_DELAYED_WORK(&_sys_mib->RateAdaptiveWorkItem, RateAdaptiveWorkItemCallback);
#endif
#endif
_func_exit_;
return status;
}
u2Byte
mptbt_BtSetGeneral(
IN PADAPTER Adapter,
IN PBT_REQ_CMD pBtReq,
IN PBT_RSP_CMD pBtRsp
)
{
u1Byte h2cParaBuf[6] ={0};
u1Byte h2cParaLen=0;
u2Byte paraLen=0;
u1Byte retStatus=BT_STATUS_BT_OP_SUCCESS;
u1Byte btOpcode;
u1Byte btOpcodeVer=0;
u1Byte setType=0;
u2Byte setParaLen=0, validParaLen=0;
u1Byte regType=0, bdAddr[6]={0}, calVal=0;
u4Byte regAddr=0, regValue=0;
pu4Byte pu4Tmp;
pu2Byte pu2Tmp;
pu1Byte pu1Tmp;
//
// check upper layer parameters
//
// check upper layer opcode version
if(pBtReq->opCodeVer != 1)
{
DBG_8192C("[MPT], Error!! Upper OP code version not match!!!\n");
pBtRsp->status = BT_STATUS_OPCODE_U_VERSION_MISMATCH;
return paraLen;
}
// check upper layer parameter length
if(pBtReq->paraLength < 1)
{
DBG_8192C("[MPT], Error!! wrong parameter length=%d (should larger than 1)\n", pBtReq->paraLength);
pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U;
return paraLen;
}
setParaLen = pBtReq->paraLength - 1;
setType = pBtReq->pParamStart[0];
DBG_8192C("[MPT], setType=%d, setParaLen=%d\n", setType, setParaLen);
// check parameter first
switch(setType)
{
case BT_GSET_REG:
DBG_8192C ("[MPT], [BT_GSET_REG]\n");
validParaLen = 9;
if(setParaLen == validParaLen)
{
btOpcode = BT_LO_OP_WRITE_REG_VALUE;
regType = pBtReq->pParamStart[1];
pu4Tmp = (pu4Byte)&pBtReq->pParamStart[2];
regAddr = *pu4Tmp;
pu4Tmp = (pu4Byte)&pBtReq->pParamStart[6];
regValue = *pu4Tmp;
DBG_8192C("[MPT], BT_GSET_REG regType=0x%x, regAddr=0x%x, regValue=0x%x!!\n",
regType, regAddr, regValue);
if(regType >= BT_REG_MAX)
{
pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U;
return paraLen;
}
else
{
if( ((BT_REG_RF==regType)&&(regAddr>0x7f)) ||
((BT_REG_MODEM==regType)&&(regAddr>0x1ff)) ||
((BT_REG_BLUEWIZE==regType)&&(regAddr>0xfff)) ||
((BT_REG_VENDOR==regType)&&(regAddr>0xfff)) ||
((BT_REG_LE==regType)&&(regAddr>0xfff)) )
{
pBtRsp->status = (btOpcode<<8)| BT_STATUS_PARAMETER_OUT_OF_RANGE_U;
return paraLen;
}
}
}
break;
case BT_GSET_RESET:
DBG_8192C("[MPT], [BT_GSET_RESET]\n");
validParaLen = 0;
break;
case BT_GSET_TARGET_BD_ADDR:
DBG_8192C("[MPT], [BT_GSET_TARGET_BD_ADDR]\n");
validParaLen = 6;
if(setParaLen == validParaLen)
{
btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_H;
if( (pBtReq->pParamStart[1]==0) &&
(pBtReq->pParamStart[2]==0) &&
(pBtReq->pParamStart[3]==0) &&
(pBtReq->pParamStart[4]==0) &&
(pBtReq->pParamStart[5]==0) &&
(pBtReq->pParamStart[6]==0) )
{
DBG_8192C("[MPT], Error!! targetBDAddr=all zero\n");
pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U;
return paraLen;
}
if( (pBtReq->pParamStart[1]==0xff) &&
(pBtReq->pParamStart[2]==0xff) &&
(pBtReq->pParamStart[3]==0xff) &&
(pBtReq->pParamStart[4]==0xff) &&
(pBtReq->pParamStart[5]==0xff) &&
(pBtReq->pParamStart[6]==0xff) )
{
DBG_8192C("[MPT], Error!! targetBDAddr=all 0xf\n");
pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U;
return paraLen;
}
bdAddr[0] = pBtReq->pParamStart[6];
bdAddr[1] = pBtReq->pParamStart[5];
bdAddr[2] = pBtReq->pParamStart[4];
bdAddr[3] = pBtReq->pParamStart[3];
bdAddr[4] = pBtReq->pParamStart[2];
bdAddr[5] = pBtReq->pParamStart[1];
DBG_8192C ("[MPT], target BDAddr:%s", &bdAddr[0]);
}
break;
case BT_GSET_TX_PWR_FINETUNE:
DBG_8192C("[MPT], [BT_GSET_TX_PWR_FINETUNE]\n");
validParaLen = 1;
if(setParaLen == validParaLen)
{
btOpcode = BT_LO_OP_SET_TX_POWER_CALIBRATION;
calVal = pBtReq->pParamStart[1];
if( (calVal<1) || (calVal>9) )
{
pBtRsp->status = (btOpcode<<8)|BT_STATUS_PARAMETER_OUT_OF_RANGE_U;
return paraLen;
}
DBG_8192C ("[MPT], calVal=%d\n", calVal);
}
break;
case BT_GSET_UPDATE_BT_PATCH:
if(IS_HARDWARE_TYPE_8723AE(Adapter) && Adapter->bFWReady)
{
u1Byte i;
DBG_8192C ("[MPT], write regs for load patch\n");
//BTFwPatch8723A(Adapter);
PlatformEFIOWrite1Byte(Adapter, 0xCC, 0x2d);
rtw_msleep_os(50);
PlatformEFIOWrite4Byte(Adapter, 0x68, 0xa005000c);
rtw_msleep_os(50);
PlatformEFIOWrite4Byte(Adapter, 0x68, 0xb005000c);
rtw_msleep_os(50);
PlatformEFIOWrite1Byte(Adapter, 0xCC, 0x29);
for(i=0; i<12; i++)
rtw_msleep_os(100);
//#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
// BTFwPatch8723A(Adapter);
//#endif
DBG_8192C("[MPT], load BT FW Patch finished!!!\n");
}
break;
default:
{
DBG_8192C ("[MPT], Error!! setType=%d, out of range\n", setType);
pBtRsp->status = BT_STATUS_PARAMETER_OUT_OF_RANGE_U;
return paraLen;
}
break;
}
if(setParaLen != validParaLen)
{
DBG_8192C("[MPT], Error!! wrong parameter length=%d for BT_SET_GEN_CMD cmd id=0x%x, paraLen should=0x%x\n",
setParaLen, setType, validParaLen);
pBtRsp->status = BT_STATUS_PARAMETER_FORMAT_ERROR_U;
return paraLen;
}
//
// execute lower layer opcodes
//
if(BT_GSET_REG == setType)
{
// fill h2c parameters
// here we should write reg value first then write the address, adviced by Austin
btOpcode = BT_LO_OP_WRITE_REG_VALUE;
h2cParaBuf[0] = pBtReq->pParamStart[6];
h2cParaBuf[1] = pBtReq->pParamStart[7];
h2cParaBuf[2] = pBtReq->pParamStart[8];
h2cParaLen = 3;
// execute h2c and check respond c2h from bt fw is correct or not
retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen);
// construct respond status code and data.
if(BT_STATUS_BT_OP_SUCCESS != retStatus)
{
pBtRsp->status = ((btOpcode<<8)|retStatus);
DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status);
return paraLen;
}
// write reg address
btOpcode = BT_LO_OP_WRITE_REG_ADDR;
h2cParaBuf[0] = regType;
h2cParaBuf[1] = pBtReq->pParamStart[2];
h2cParaBuf[2] = pBtReq->pParamStart[3];
h2cParaLen = 3;
// execute h2c and check respond c2h from bt fw is correct or not
retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen);
// construct respond status code and data.
if(BT_STATUS_BT_OP_SUCCESS != retStatus)
{
pBtRsp->status = ((btOpcode<<8)|retStatus);
DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status);
return paraLen;
}
}
else if(BT_GSET_RESET == setType)
{
btOpcode = BT_LO_OP_RESET;
h2cParaLen = 0;
// execute h2c and check respond c2h from bt fw is correct or not
retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen);
// construct respond status code and data.
if(BT_STATUS_BT_OP_SUCCESS != retStatus)
{
pBtRsp->status = ((btOpcode<<8)|retStatus);
DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status);
return paraLen;
}
}
else if(BT_GSET_TARGET_BD_ADDR == setType)
{
// fill h2c parameters
btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_L;
h2cParaBuf[0] = pBtReq->pParamStart[1];
h2cParaBuf[1] = pBtReq->pParamStart[2];
h2cParaBuf[2] = pBtReq->pParamStart[3];
h2cParaLen = 3;
retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen);
// ckeck bt return status.
if(BT_STATUS_BT_OP_SUCCESS != retStatus)
{
pBtRsp->status = ((btOpcode<<8)|retStatus);
DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status);
return paraLen;
}
btOpcode = BT_LO_OP_SET_TARGET_BD_ADDR_H;
h2cParaBuf[0] = pBtReq->pParamStart[4];
h2cParaBuf[1] = pBtReq->pParamStart[5];
h2cParaBuf[2] = pBtReq->pParamStart[6];
h2cParaLen = 3;
retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen);
// ckeck bt return status.
if(BT_STATUS_BT_OP_SUCCESS != retStatus)
{
pBtRsp->status = ((btOpcode<<8)|retStatus);
DBG_8192C ("[MPT], Error!! status code=0x%x \n", pBtRsp->status);
return paraLen;
}
}
else if(BT_GSET_TX_PWR_FINETUNE == setType)
{
// fill h2c parameters
btOpcode = BT_LO_OP_SET_TX_POWER_CALIBRATION;
h2cParaBuf[0] = calVal;
h2cParaLen = 1;
retStatus = mptbt_BtFwOpCodeProcess(Adapter, btOpcode, btOpcodeVer, &h2cParaBuf[0], h2cParaLen);
// ckeck bt return status.
if(BT_STATUS_BT_OP_SUCCESS != retStatus)
{
pBtRsp->status = ((btOpcode<<8)|retStatus);
DBG_8192C("[MPT], Error!! status code=0x%x \n", pBtRsp->status);
return paraLen;
}
}
pBtRsp->status = BT_STATUS_SUCCESS;
return paraLen;
}
