/******************** - RCC初始化 *********************/ void RCC_Configuration(void) { ErrorStatus HSEStartUpStatus; // RCC system reset(for debug purpose) RCC_DeInit(); // Enable HSE RCC_HSEConfig(RCC_HSE_ON); // Wait till HSE is ready HSEStartUpStatus = RCC_WaitForHSEStartUp(); if(HSEStartUpStatus == SUCCESS) { // Enable Prefetch Buffer FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); // Flash 2 wait state FLASH_SetLatency(FLASH_Latency_2); // HCLK = SYSCLK RCC_HCLKConfig(RCC_SYSCLK_Div1); // PCLK2 = HCLK/8 RCC_PCLK2Config(RCC_HCLK_Div8); // PCLK1 = HCLK/2 RCC_PCLK1Config(RCC_HCLK_Div2); // ADCCLK = PCLK2/8 RCC_ADCCLKConfig(RCC_PCLK2_Div8); // PLLCLK = 8MHz * 9 = 72 MHz RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); // Enable PLL RCC_PLLCmd(ENABLE); // Wait till PLL is ready while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) {} // Select PLL as system clock source RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); // Wait till PLL is used as system clock source while(RCC_GetSYSCLKSource() != 0x08) {} } /**/ // Enable peripheral clocks -------------------------------------------------- // Enable DMA1 clock RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); // Enable ADC1 and GPIOC clock RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_GPIOA, ENABLE ); RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE); }
/******************************************************************************* * Function Name : Set_System * Description : Configures Main system clocks & power * Input : None. * Return : None. *******************************************************************************/ void Set_System(void) { /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/ /* RCC system reset(for debug purpose) */ RCC_DeInit(); /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ HSEStartUpStatus = RCC_WaitForHSEStartUp(); if (HSEStartUpStatus == SUCCESS) { /* Enable Prefetch Buffer */ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); /* Flash 2 wait state */ FLASH_SetLatency(FLASH_Latency_2); /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK */ RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK1 = HCLK/2 */ RCC_PCLK1Config(RCC_HCLK_Div2); #ifdef STM32F10X_CL /* Configure PLLs *********************************************************/ #ifdef EXTERNAL_CRYSTAL_25MHz /* PLL2 configuration: PLL2CLK = (HSE / 9) * 13 = 36.111 MHz */ RCC_PREDIV2Config(RCC_PREDIV2_Div9); RCC_PLL2Config(RCC_PLL2Mul_13); /* Enable PLL2 */ RCC_PLL2Cmd(ENABLE); /* Wait till PLL2 is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET) {} /* PPL3 configuration: PLL3CLK = (HSE / 9) * 14 = PLL3_VCO = 77.777 MHz */ RCC_PLL3Config(RCC_PLL3Mul_14); /* Enable PLL3 */ RCC_PLL3Cmd(ENABLE); /* Wait till PLL3 is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLL3RDY) == RESET) {} /* PLL configuration: PLLCLK = (PLL2 / 4) * 8 = 72.222 MHz */ RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div4); RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_8); #elif defined (EXTERNAL_CRYSTAL_14_7456MHz) /* PLL2 configuration: PLL2CLK = (HSE / 4) * 13 = 47.932 MHz */ RCC_PREDIV2Config(RCC_PREDIV2_Div4); RCC_PLL2Config(RCC_PLL2Mul_13); /* Enable PLL2 */ RCC_PLL2Cmd(ENABLE); /* Wait till PLL2 is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET) {} /* PPL3 configuration: PLL3CLK = (HSE / 4) * 20 = PLL3_VCO = 147.456 MHz */ RCC_PLL3Config(RCC_PLL3Mul_20); /* Enable PLL3 */ RCC_PLL3Cmd(ENABLE); /* Wait till PLL3 is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLL3RDY) == RESET) {} /* PPL1 configuration: PLL1CLK = (PLL2 / 4) * 6 = 71.8848 MHz */ RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div4); RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_6); #endif /* EXTERNAL_CRYSTAL_25MHz */ /* Configure I2S clock source: PLL3 VCO clock */ RCC_I2S2CLKConfig(RCC_I2S2CLKSource_PLL3_VCO); #else /* PLLCLK = 8MHz * 9 = 72 MHz */ RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); #endif /* STM32F10X_CL */ /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) { } /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till PLL is used as system clock source */ while(RCC_GetSYSCLKSource() != 0x08) { } } else { /* If HSE fails to start-up, the application will have wrong clock configuration. User can add here some code to deal with this error */ /* Go to infinite loop */ while (1) { } } }
/** * @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2 * and PCLK1 prescalers. * @param None * @retval None */ void SetSysClockTo72(void) { /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/ /* RCC system reset(for debug purpose) */ RCC_DeInit(); /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ HSEStartUpStatus = RCC_WaitForHSEStartUp(); if (HSEStartUpStatus == SUCCESS) { /* Enable Prefetch Buffer */ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); /* Flash 2 wait state */ FLASH_SetLatency(FLASH_Latency_2); /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK */ RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK1 = HCLK/2 */ RCC_PCLK1Config(RCC_HCLK_Div2); #ifdef STM32F10X_CL /* Configure PLLs *********************************************************/ /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ RCC_PREDIV2Config(RCC_PREDIV2_Div5); RCC_PLL2Config(RCC_PLL2Mul_8); /* Enable PLL2 */ RCC_PLL2Cmd(ENABLE); /* Wait till PLL2 is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET) {} /* PLL configuration: PLLCLK = (PLL2 / 5) * 9 = 72 MHz */ RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5); RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_9); #else /* PLLCLK = 8MHz * 9 = 72 MHz */ RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); #endif /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) { } /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till PLL is used as system clock source */ while(RCC_GetSYSCLKSource() != 0x08) { } } else { /* If HSE fails to start-up, the application will have wrong clock configuration. User can add here some code to deal with this error */ /* Go to infinite loop */ while (1) { } } }
void uart_init() { RCC_DeInit(); RCC_HSEConfig(RCC_HSE_ON); RCC_WaitForHSEStartUp(); RCC_HCLKConfig (RCC_SYSCLK_Div1); RCC_PCLK2Config (RCC_HCLK_Div1); RCC_PCLK1Config (RCC_HCLK_Div1); RCC_PLLConfig (RCC_PLLSource_PREDIV1, RCC_PLLMul_2); RCC_PLLCmd (ENABLE); while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET); RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); while (RCC_GetSYSCLKSource() != 0x08); GPIO_InitTypeDef gpioInitStruct; // UART1 - debug RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB |RCC_APB2Periph_GPIOA | RCC_APB2Periph_AFIO | RCC_APB2Periph_USART1, ENABLE); gpioInitStruct.GPIO_Pin = GPIO_Pin_9; gpioInitStruct.GPIO_Mode = GPIO_Mode_AF_PP; gpioInitStruct.GPIO_Speed = GPIO_Speed_10MHz; GPIO_Init(GPIOA, &gpioInitStruct); gpioInitStruct.GPIO_Pin = GPIO_Pin_10; gpioInitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; gpioInitStruct.GPIO_Speed = GPIO_Speed_10MHz; GPIO_Init(GPIOA, &gpioInitStruct); USART_InitTypeDef usartInit; usartInit.USART_BaudRate = 9600; usartInit.USART_HardwareFlowControl = USART_HardwareFlowControl_None; usartInit.USART_Mode = USART_Mode_Tx | USART_Mode_Rx; usartInit.USART_Parity = USART_Parity_No; usartInit.USART_StopBits = USART_StopBits_1; usartInit.USART_WordLength = USART_WordLength_8b; USART_Init(USART1, &usartInit); USART_Cmd(USART1, ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); gpioInitStruct.GPIO_Pin = GPIO_Pin_2; gpioInitStruct.GPIO_Mode = GPIO_Mode_AF_PP; gpioInitStruct.GPIO_Speed = GPIO_Speed_10MHz; GPIO_Init(GPIOA, &gpioInitStruct); gpioInitStruct.GPIO_Pin = GPIO_Pin_3; gpioInitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; gpioInitStruct.GPIO_Speed = GPIO_Speed_10MHz; GPIO_Init(GPIOA, &gpioInitStruct); usartInit.USART_BaudRate = 19200; usartInit.USART_HardwareFlowControl = USART_HardwareFlowControl_None; usartInit.USART_Mode = USART_Mode_Tx | USART_Mode_Rx; usartInit.USART_Parity = USART_Parity_No; usartInit.USART_StopBits = USART_StopBits_1; usartInit.USART_WordLength = USART_WordLength_8b; USART_Init(USART2, &usartInit); USART_Cmd(USART2, ENABLE); }
/******************************************************************************* * Function Name : Demo_Init * Description : Initializes the demonstration application. * Input : None * Output : None * Return : None *******************************************************************************/ void Demo_Init(void) { /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/ /* RCC system reset(for debug purpose) */ RCC_DeInit(); /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ HSEStartUpStatus = RCC_WaitForHSEStartUp(); if(HSEStartUpStatus == SUCCESS) { /* Enable Prefetch Buffer */ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); /* Flash 2 wait state */ FLASH_SetLatency(FLASH_Latency_2); /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK */ RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK1 = HCLK/2 */ RCC_PCLK1Config(RCC_HCLK_Div2); /* PLLCLK = 8MHz * 9 = 72 MHz */ RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_16); /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) { } /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till PLL is used as system clock source */ while(RCC_GetSYSCLKSource() != 0x08) { } /* Enable USART1 and GPIOA clock */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE); } /* Enable GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG and AFIO clocks */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB |RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG | RCC_APB2Periph_AFIO, ENABLE); /*------------------- Resources Initialization -----------------------------*/ /* ADCCLK = PCLK2/8 */ RCC_ADCCLKConfig(RCC_PCLK2_Div8); /* Enable DMA clock */ RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); /* Enable ADC1 and GPIOC clock */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_ALL, ENABLE); /* If HSE is not detected at program startup */ if(HSEStartUpStatus == ERROR) { /* Generate NMI exception */ NVIC_SetSystemHandlerPendingBit(SystemHandler_NMI); } }
/** * @brief Configures the different system clocks. * @param None * @retval None */ void RCC_Configuration(void) { /* RCC system reset(for debug purpose) */ RCC_DeInit(); /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ HSEStartUpStatus = RCC_WaitForHSEStartUp(); if(HSEStartUpStatus == SUCCESS) { /* Enable Prefetch Buffer */ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); /* Flash 2 wait state */ FLASH_SetLatency(FLASH_Latency_2); /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK */ RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK1 = HCLK/2 */ RCC_PCLK1Config(RCC_HCLK_Div2); /* ADCCLK = PCLK2/4 */ RCC_ADCCLKConfig(RCC_PCLK2_Div4); #ifndef STM32F10X_CL /* PLLCLK = 8MHz * 7 = 56 MHz */ RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_7); #else /* Configure PLLs *********************************************************/ /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ RCC_PREDIV2Config(RCC_PREDIV2_Div5); RCC_PLL2Config(RCC_PLL2Mul_8); /* Enable PLL2 */ RCC_PLL2Cmd(ENABLE); /* Wait till PLL2 is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET) {} /* PLL configuration: PLLCLK = (PLL2 / 5) * 7 = 56 MHz */ RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5); RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_7); #endif /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) { } /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till PLL is used as system clock source */ while(RCC_GetSYSCLKSource() != 0x08) { } } /* Enable peripheral clocks --------------------------------------------------*/ /* Enable ADC1 and GPIO_LED clock */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE); }
/******************************************************************************* * Function Name : RCC_Configuration * Description : Configures the different system clocks. * Input : None * Output : None * Return : None *******************************************************************************/ void RCC_Configuration(void) { /* RCC system reset(for debug purpose) */ RCC_DeInit(); /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ HSEStartUpStatus = RCC_WaitForHSEStartUp(); if(HSEStartUpStatus == SUCCESS) { /* Enable Prefetch Buffer */ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); /* Flash 2 wait state */ FLASH_SetLatency(FLASH_Latency_2); /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK */ RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK1 = HCLK/2 */ RCC_PCLK1Config(RCC_HCLK_Div2); /* PLLCLK = 8MHz * 9 = 72 MHz */ RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) { } /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till PLL is used as system clock source */ while(RCC_GetSYSCLKSource() != 0x08) { } } /* GPIOA, GPIOC, GPIO KEY Button, GPIO_LED and AFIO clocks enable */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIO_KEY_BUTTON | RCC_APB2Periph_GPIO_LED | RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO, ENABLE); #ifdef RTC_Alarm_WFEWakeUp /* Enable the PWR and BKP Clocks */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE); /* Configure the EXTI Line 17 as Event */ EXTI_StructInit(&EXTI_InitStructure); EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Event; EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling; EXTI_InitStructure.EXTI_Line = EXTI_Line17; EXTI_InitStructure.EXTI_LineCmd = ENABLE; EXTI_Init(&EXTI_InitStructure); /* Allow access to BKP Domain */ PWR_BackupAccessCmd(ENABLE); /* Reset Backup Domain */ BKP_DeInit(); /* Enable LSE */ RCC_LSEConfig(RCC_LSE_ON); /* Wait till LSE is ready */ while(RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) { } /* Select LSE as RTC Clock Source */ RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE); /* Enable the RTC Clock */ RCC_RTCCLKCmd(ENABLE); /* Wait for APB registers synchronisation */ RTC_WaitForSynchro(); /* Wait until last write operation on RTC registers has finished */ RTC_WaitForLastTask(); /* Set the RTC time base to 1s */ RTC_SetPrescaler(32767); /* Wait until last write operation on RTC registers has finished */ RTC_WaitForLastTask(); #endif }
/** * @brief Selects PLL as System clock source and configure HCLK, PCLK2 and PCLK1 prescalers. * @param None * @retval None */ void SetHCLKTo32(void) { /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/ /* RCC system reset(for debug purpose) */ RCC_DeInit(); /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ HSEStartUpStatus = RCC_WaitForHSEStartUp(); if (HSEStartUpStatus == SUCCESS) { /* Enable 64-bit access */ FLASH_ReadAccess64Cmd(ENABLE); /* Enable Prefetch Buffer */ FLASH_PrefetchBufferCmd(ENABLE); /* Flash 1 wait state */ FLASH_SetLatency(FLASH_Latency_1); /* Enable the PWR APB1 Clock */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); /* Select the Voltage Range 1 (1.8V) */ PWR_VoltageScalingConfig(PWR_VoltageScaling_Range1); /* Wait Until the Voltage Regulator is ready */ while (PWR_GetFlagStatus(PWR_FLAG_VOS) != RESET) {} /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK */ RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK1 = HCLK */ RCC_PCLK1Config(RCC_HCLK_Div1); /* PLL configuration: PLLCLK = (HSE * 12) / 3 = 32MHz */ RCC_PLLConfig(RCC_PLLSource_HSE, RCC_PLLMul_12, RCC_PLLDiv_3); /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) {} /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till PLL is used as system clock source */ while (RCC_GetSYSCLKSource() != 0x0C) {} } else { /* If HSE fails to start-up, the application will have wrong clock configuration. User can add here some code to deal with this error */ /* Go to infinite loop */ while (1) {} } }
/******************************************************************************** * FunctionName: MyRCCInit * * Description : RCC初始化 * * Parameters : None * * Returns : None *******************************************************************************/ void MyRCCInit(void) { #if 0 /* RCC system reset(for debug purpose) */ RCC_DeInit(); /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ HSEStartUpStatus = RCC_WaitForHSEStartUp(); if (HSEStartUpStatus == SUCCESS) { /* Enable Prefetch Buffer */ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); /* Flash 2 wait state */ FLASH_SetLatency(FLASH_Latency_2); /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK */ RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK1 = HCLK/2 */ RCC_PCLK1Config(RCC_HCLK_Div2); /* PLLCLK = 8MHz * 9 = 72 MHz */ RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) {} /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till PLL is used as system clock source */ while (RCC_GetSYSCLKSource() != 0x08) {} } #endif #if 0 /*定义枚举类型变量HSEStartUpStatus*/ ErrorStatus HSEStartUpStatus; RCC_DeInit(); /*复位系统时钟设置*/ RCC_HSEConfig(RCC_HSE_ON); /*开启HSE*/ HSEStartUpStatus = RCC_WaitForHSEStartUp(); /*等待HSE起振并稳定*/ /*判断HSE是否起振成功,是则进入if*/ if(HSEStartUpStatus == SUCCESS) { RCC_HCLKConfig(RCC_SYSCLK_Div1); /*选择HCLK(AHB)时钟源为SYSCLK 1分频*/ RCC_PCLK2Config(RCC_HCLK_Div1); /*选择PCLK2时钟源为HCLK(AHB) 1分频*/ RCC_PCLK1Config(RCC_HCLK_Div2); /*选择PCLK1时钟源为HCLK(AHB) 2分频*/ FLASH_SetLatency(FLASH_Latency_2); /*设置Flash延时周期数为2*/ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); /*使能Flash预取缓存*/ /*选择PLL时钟源为HSE 1分频,倍频数为9,则PLL=8MHz*9=72MHz*/ RCC_PLLConfig(RCC_PLLSource_HSE_Div1,RCC_PLLMul_9); RCC_PLLCmd(ENABLE); /*使能PLL*/ while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET); /*等待PLL输出稳定*/ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /*选择SYSCLK时钟源为PLL*/ while(RCC_GetSYSCLKSource() != 0x08); /*等待PLL称为SYSCLK时钟源*/ } /*打开APB2总线上的PWR,BKP时钟*/ RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP,ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE); // RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE); #endif RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE); RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); }
/******************************************************************************* * Function Name : Set_System * Description : Configures Main system clocks & power * Input : None. * Return : None. *******************************************************************************/ void Set_System(void) { GPIO_InitTypeDef GPIO_InitStructure; /* RCC system reset(for debug purpose) */ RCC_DeInit(); /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ HSEStartUpStatus = RCC_WaitForHSEStartUp(); if (HSEStartUpStatus == SUCCESS) { /* Enable Prefetch Buffer */ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); /* Flash 2 wait state */ FLASH_SetLatency(FLASH_Latency_2); /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK */ RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK1 = HCLK/2 */ RCC_PCLK1Config(RCC_HCLK_Div2); RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) {} /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till PLL is used as system clock source */ while (RCC_GetSYSCLKSource() != 0x08) {} } /* Configure USB pull-up */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIO_DISCONNECT, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOF, ENABLE); /* Configure USB pull-up */ #ifndef JOYSTICK GPIO_InitStructure.GPIO_Pin = USB_DISCONNECT_PIN; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_OD; GPIO_Init(USB_DISCONNECT, &GPIO_InitStructure); #endif USB_Cable_Config(DISABLE); for(u32 i=1000000;--i;); USB_Cable_Config(ENABLE); }
void HAL_Core_Execute_Stop_Mode(void) { if((BKP_ReadBackupRegister(BKP_DR9) >> 12) == 0xA) { uint16_t wakeUpPin = BKP_ReadBackupRegister(BKP_DR9) & 0xFF; InterruptMode edgeTriggerMode = (InterruptMode)((BKP_ReadBackupRegister(BKP_DR9) >> 8) & 0x0F); /* Clear Stop mode system flag */ BKP_WriteBackupRegister(BKP_DR9, 0xFFFF); if ((wakeUpPin < TOTAL_PINS) && (edgeTriggerMode <= FALLING)) { PinMode wakeUpPinMode = INPUT; /* Set required pinMode based on edgeTriggerMode */ switch(edgeTriggerMode) { case CHANGE: wakeUpPinMode = INPUT; break; case RISING: wakeUpPinMode = INPUT_PULLDOWN; break; case FALLING: wakeUpPinMode = INPUT_PULLUP; break; } HAL_Pin_Mode(wakeUpPin, wakeUpPinMode); /* Configure EXTI Interrupt : wake-up from stop mode using pin interrupt */ HAL_Interrupts_Attach(wakeUpPin, NULL, NULL, edgeTriggerMode, NULL); /* Request to enter STOP mode with regulator in low power mode */ PWR_EnterSTOPMode(PWR_Regulator_LowPower, PWR_STOPEntry_WFI); /* Detach the Interrupt pin */ HAL_Interrupts_Detach(wakeUpPin); /* At this stage the system has resumed from STOP mode */ /* Enable HSE, PLL and select PLL as system clock source after wake-up from STOP */ /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ if(RCC_WaitForHSEStartUp() != SUCCESS) { /* If HSE startup fails try to recover by system reset */ NVIC_SystemReset(); } /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET); /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till PLL is used as system clock source */ while(RCC_GetSYSCLKSource() != 0x08); } } }
static void prvSetupHardware( void ) { /* Start with the clocks in their expected state. */ RCC_DeInit(); /* Enable HSE (high speed external clock). */ RCC_HSEConfig( RCC_HSE_ON ); /* Wait till HSE is ready. */ while( RCC_GetFlagStatus( RCC_FLAG_HSERDY ) == RESET ) { } /* 2 wait states required on the flash. */ *( ( unsigned portLONG * ) 0x40022000 ) = 0x02; /* HCLK = SYSCLK */ RCC_HCLKConfig( RCC_SYSCLK_Div1 ); /* PCLK2 = HCLK */ RCC_PCLK2Config( RCC_HCLK_Div1 ); /* PCLK1 = HCLK/2 */ RCC_PCLK1Config( RCC_HCLK_Div2 ); /* PLLCLK = 8MHz * 9 = 72 MHz. */ RCC_PLLConfig( RCC_PLLSource_HSE_Div1, RCC_PLLMul_9 ); /* Enable PLL. */ RCC_PLLCmd( ENABLE ); /* Wait till PLL is ready. */ while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) { } /* Select PLL as system clock source. */ RCC_SYSCLKConfig( RCC_SYSCLKSource_PLLCLK ); /* Wait till PLL is used as system clock source. */ while( RCC_GetSYSCLKSource() != 0x08 ) { } /* Enable GPIOA, GPIOB, GPIOC, GPIOD, GPIOE and AFIO clocks */ RCC_APB2PeriphClockCmd( RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_GPIOF | RCC_APB2Periph_AFIO, ENABLE ); /* SPI2 Periph clock enable */ RCC_APB1PeriphClockCmd( RCC_APB1Periph_SPI2, ENABLE ); RCC_APB1PeriphClockCmd( RCC_APB1Periph_TIM3, ENABLE ); RCC_APB1PeriphClockCmd( RCC_APB1Periph_TIM4, ENABLE ); /* Set the Vector Table base address at 0x08000000 */ NVIC_SetVectorTable( NVIC_VectTab_FLASH, 0x0 ); NVIC_PriorityGroupConfig( NVIC_PriorityGroup_4 ); /* Configure HCLK clock as SysTick clock source. */ SysTick_CLKSourceConfig( SysTick_CLKSource_HCLK ); }
/** * @brief Configures the different system clocks. * @param None * @retval : None */ void RCC_Configuration(void) { /* RCC system reset(for debug purpose) */ RCC_DeInit(); /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ HSEStartUpStatus = RCC_WaitForHSEStartUp(); if (HSEStartUpStatus == SUCCESS) { /* Enable Prefetch Buffer */ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); /* Flash 2 wait state */ FLASH_SetLatency(FLASH_Latency_2); /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK */ RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK1 = HCLK/2 */ RCC_PCLK1Config(RCC_HCLK_Div2); /* PLLCLK = 8MHz * 7 = 56 MHz */ RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_7); /* ADC Clock Config */ RCC_ADCCLKConfig(RCC_PCLK2_Div4); /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) { } /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till PLL is used as system clock source */ while (RCC_GetSYSCLKSource() != 0x08) { } } /* Enable peripherals clocks ---------------------------------------------*/ RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C2, ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE); RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE); }
void BSP_Init (void) { BSP_IntInit(); RCC_DeInit(); RCC_HSEConfig(RCC_HSE_ON); /* HSE = 25MHz ext. crystal. */ RCC_WaitForHSEStartUp(); RCC_PREDIV2Config(RCC_PREDIV2_Div5); /* Fprediv2 = HSE / 5 = 5MHz. */ RCC_PLL2Config(RCC_PLL2Mul_8); /* PLL2 = Fprediv2 * 8 = 40MHz. */ RCC_PLL2Cmd(ENABLE); RCC_PLL3Config(RCC_PLL3Mul_10); /* PLL3 = Fprediv2 * 10 = 50MHz. */ RCC_PLL3Cmd(ENABLE); RCC_HCLKConfig(RCC_SYSCLK_Div1); /* HCLK = AHBCLK = PLL1 / AHBPRES(1) = 72MHz. */ RCC_PCLK2Config(RCC_HCLK_Div1); /* APB2CLK = AHBCLK / APB2DIV(1) = 72MHz. */ RCC_PCLK1Config(RCC_HCLK_Div2); /* APB1CLK = AHBCLK / APB1DIV(2) = 36MHz (max). */ RCC_ADCCLKConfig(RCC_PCLK2_Div6); /* ADCCLK = AHBCLK / APB2DIV / 6 = 12MHz. */ RCC_OTGFSCLKConfig(RCC_OTGFSCLKSource_PLL1VCO_Div3); /* OTGCLK = PLL1VCO / USBPRES(3) = 144MHz / 3 = 48MHz */ FLASH_SetLatency(FLASH_Latency_2); /* 2 Flash wait states when HCLK > 48MHz. */ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET) { /* Wait for PLL2 to lock. */ ; } while (RCC_GetFlagStatus(RCC_FLAG_PLL3RDY) == RESET) { /* Wait for PLL3 to lock. */ ; } /* Fprediv1 = PLL2 / 5 = 8MHz. */ RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5); RCC_PLL1Config(RCC_PLL1Source_PREDIV1, RCC_PLL1Mul_9); /* PLL1 = Fprediv1 * 9 = 72Mhz. */ RCC_PLL1Cmd(ENABLE); while (RCC_GetFlagStatus(RCC_FLAG_PLL1RDY) == RESET) { /* Wait for PLL1 to lock. */ ; } RCC_SYSCLKConfig(RCC_SYSCLKSource_PLL1CLK); /* HCLK = SYSCLK = PLL1 = 72MHz. */ while (RCC_GetSYSCLKSource() != 0x08) { ; } BSP_CPU_ClkFreq_MHz = BSP_CPU_ClkFreq() / (CPU_INT32U)1000000; BSP_CPU_ClkFreq_MHz = BSP_CPU_ClkFreq_MHz; /* Surpress compiler warning BSP_CPU_ClkFreq_MHz ... */ /* ... set and not used. */ BSP_LED_Init(); /* Initialize the I/Os for the LED controls. */ BSP_StatusInit(); /* Initialize the status input(s) */ #ifdef TRACE_EN /* See project / compiler preprocessor options. */ DBGMCU_CR |= DBGMCU_CR_TRACE_IOEN_MASK; /* Enable tracing (see Note #2). */ DBGMCU_CR &= ~DBGMCU_CR_TRACE_MODE_MASK; /* Clr trace mode sel bits. */ DBGMCU_CR |= DBGMCU_CR_TRACE_MODE_SYNC_04; /* Cfg trace mode to synch 4-bit. */ #endif }
/** * @brief Main program * @param None * @retval None */ int main(void) { /*!< At this stage the microcontroller clock setting is already configured, this is done through SystemInit() function which is called from startup file (startup_stm32l1xx_xx.s) before to branch to application main. To reconfigure the default setting of SystemInit() function, refer to system_stm32l1xx.c file */ /* RTC configuration -------------------------------------------------------*/ RTC_Config(); /* Configure the SysTick to generate an interrupt each 250 ms */ SysTickConfig(); /* LCD GLASS Initialization */ LCD_GLASS_Init(); /* Clear the LCD GLASS */ LCD_GLASS_Clear(); /* Configure STM32L152-EVAL LED1 and LED2 as Output push-pull */ STM_EVAL_LEDInit(LED1); STM_EVAL_LEDInit(LED2); while (1) { /* Display " STM32L " string on LCD glass in scrolling mode */ LCD_GLASS_ScrollString(LCD_String, SCROLL_NUM, SCROLL_SPEED); /* Display String on the LCD */ #ifdef USE_STM32L152D_EVAL LCD_GLASS_DisplayString("STOPMOD"); #else LCD_GLASS_DisplayString("STOPMODE"); #endif /* Enable Wakeup Counter */ RTC_WakeUpCmd(ENABLE); /* Enter Stop Mode */ PWR_EnterSTOPMode(PWR_Regulator_LowPower, PWR_STOPEntry_WFI); /* Enable Wakeup Counter */ RTC_WakeUpCmd(DISABLE); /* After wake-up from STOP reconfigure the system clock */ /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ while (RCC_GetFlagStatus(RCC_FLAG_HSERDY) == RESET) {} /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) {} /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till PLL is used as system clock source */ while (RCC_GetSYSCLKSource() != 0x0C) {} } }
/** * @brief Selects HSI as System clock source and configure HCLK, PCLK2 and PCLK1 prescalers. * @param None * @retval None */ void SetHCLKToHSI(void) { __IO uint32_t StartUpCounter = 0, HSIStatus = 0; /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/ /* RCC system reset(for debug purpose) */ RCC_DeInit(); /* Enable HSI */ RCC_HSICmd(ENABLE); /* Wait till HSI is ready and if Time out is reached exit */ do { HSIStatus = RCC_GetFlagStatus(RCC_FLAG_HSIRDY); StartUpCounter++; } while ((HSIStatus == 0) && (StartUpCounter != HSI_STARTUP_TIMEOUT)); if (RCC_GetFlagStatus(RCC_FLAG_HSIRDY) != RESET) { HSIStatus = (uint32_t)0x01; } else { HSIStatus = (uint32_t)0x00; } if (HSIStatus == 0x01) { /* Flash 0 wait state */ FLASH_SetLatency(FLASH_Latency_0); /* Disable Prefetch Buffer */ FLASH_PrefetchBufferCmd(DISABLE); /* Disable 64-bit access */ FLASH_ReadAccess64Cmd(DISABLE); /* Enable the PWR APB1 Clock */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); /* Select the Voltage Range 1 (1.8V) */ PWR_VoltageScalingConfig(PWR_VoltageScaling_Range1); /* Wait Until the Voltage Regulator is ready */ while (PWR_GetFlagStatus(PWR_FLAG_VOS) != RESET) {} /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK */ RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK1 = HCLK */ RCC_PCLK1Config(RCC_HCLK_Div1); /* Select HSI as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_HSI); /* Wait till HSI is used as system clock source */ while (RCC_GetSYSCLKSource() != 0x04) {} } else { /* If HSI fails to start-up, the application will have wrong clock configuration. User can add here some code to deal with this error */ /* Go to infinite loop */ while (1) {} } }
/** * @brief Configures the different system clocks. * @param None * @retval None */ void RCC_Configuration(void) { /* RCC system reset(for debug purpose) */ RCC_DeInit(); /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ HSEStartUpStatus = RCC_WaitForHSEStartUp(); if(HSEStartUpStatus == SUCCESS) { /* Enable Prefetch Buffer */ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); /* Flash 2 wait state */ FLASH_SetLatency(FLASH_Latency_2); /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK */ RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK1 = HCLK/2 */ RCC_PCLK1Config(RCC_HCLK_Div2); /* ADCCLK = PCLK2/4 */ RCC_ADCCLKConfig(RCC_PCLK2_Div4); #ifndef STM32F10X_CL /* PLLCLK = 8MHz * 9 = 72 MHz */ RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); #else /* Configure PLLs *********************************************************/ /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ RCC_PREDIV2Config(RCC_PREDIV2_Div5); RCC_PLL2Config(RCC_PLL2Mul_8); /* Enable PLL2 */ RCC_PLL2Cmd(ENABLE); /* Wait till PLL2 is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET) {} /* PLL configuration: PLLCLK = (PLL2 / 5) * 9 = 72 MHz */ RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5); RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_9); /* PPL3 configuration: PLL3CLK = (HSE / 5) * 11 = PLL3_VCO = 110 MHz */ RCC_PLL3Config(RCC_PLL3Mul_11); /* Enable PLL3 */ RCC_PLL3Cmd(ENABLE); /* Wait till PLL3 is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLL3RDY) == RESET) {} /* Configure I2S clock source: On Connectivity-Line Devices, the I2S can be clocked by PLL3 VCO instead of SYS_CLK in order to guarantee higher precision */ RCC_I2S3CLKConfig(RCC_I2S3CLKSource_PLL3_VCO); RCC_I2S2CLKConfig(RCC_I2S2CLKSource_PLL3_VCO); #endif /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) { } /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till PLL is used as system clock source */ while(RCC_GetSYSCLKSource() != 0x08) { } } /* Enable peripheral clocks --------------------------------------------------*/ /* GPIOA, GPIOB and AFIO clocks enable */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO, ENABLE); #ifdef USE_STM3210C_EVAL /* GPIOC Clock enable (for the SPI3 remapped pins) */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC , ENABLE); #endif /* USE_STM3210C_EVAL */ /* SPI2 and SPI3 clocks enable */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2 | RCC_APB1Periph_SPI3, ENABLE); }
/*============================================================================= * Function : * Description : * Input Para : * Output Para : * Return Value : =============================================================================*/ void RCC_Configuration(void) { ErrorStatus HSEStartUpStatus; /* RCC system reset(for debug purpose) */ RCC_DeInit(); /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ HSEStartUpStatus = RCC_WaitForHSEStartUp(); if(HSEStartUpStatus == SUCCESS) { /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK */ RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK1 = HCLK/2 */ RCC_PCLK1Config(RCC_HCLK_Div2); /* Flash 2 wait state */ FLASH_SetLatency(FLASH_Latency_2); /* Enable Prefetch Buffer */ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); #ifdef STM3210C rcc_pll_set(); #else /* PLLCLK = 8MHz * 9 = 72 MHz */ RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); #endif /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) { } /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till PLL is used as system clock source */ while(RCC_GetSYSCLKSource() != 0x08) { } } /* Enable PWR and BKP clocks */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE); /* Allow access to BKP Domain */ // PWR_BackupAccessCmd(ENABLE); // /* Reset Backup Domain */ RCC_LSEConfig(RCC_LSE_ON); /* Wait till LSE is ready */ while (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) {} /* Select LSE as RTC Clock Source */ RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE); /* Enable RTC Clock */ RCC_RTCCLKCmd(ENABLE); }
void configureSystem(void) { /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/ /* RCC system reset(for debug purpose) */ RCC_DeInit(); /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ ErrorStatus HSEStartUpStatus = RCC_WaitForHSEStartUp(); if (HSEStartUpStatus == SUCCESS) { /* Enable Prefetch Buffer */ FLASH->ACR |= FLASH_ACR_PRFTBE; /* Flash 2 wait state */ FLASH->ACR &= (uint32_t) ((uint32_t) ~FLASH_ACR_LATENCY); FLASH->ACR |= (uint32_t) FLASH_ACR_LATENCY_2; /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK */ RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK1 = HCLK/2 */ RCC_PCLK1Config(RCC_HCLK_Div2); // PLL configuration: PLLCLK /* Configure PLLs *********************************************************/ /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ //RCC_PREDIV2Config(RCC_PREDIV2_Div5); //RCC_PLL2Config(RCC_PLL2Mul_8); /* PLL2 configuration: PLL2CLK = (HSE / 4) * 20 = 40 MHz */ RCC_PREDIV2Config(RCC_PREDIV2_Div4); RCC_PLL2Config(RCC_PLL2Mul_20); // Enable PLL2 RCC_PLL2Cmd(ENABLE); // Wait till PLL2 is ready while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET) { } // PLL configuration: PLLCLK = (PLL2 / 5) * 9 = 72 MHz * RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5); RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_9); /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) { } /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till PLL is used as system clock source */ while (RCC_GetSYSCLKSource() != 0x08) { } } else { /* If HSE fails to start-up, the application will have wrong clock configuration. User can add here some code to deal with this error */ /* Go to infinite loop */ while (1) { } } rtc_init(); configureNVIC(); SysTick_Config(72000); }
void UTIL_SetPll( enum eSpeed speed ) { /* Select PLL as system clock source */ RCC_SYSCLKConfig( RCC_SYSCLKSource_HSI ); /* Enable PLL */ RCC_PLLCmd( DISABLE ); if( ( speed < SPEED_VERY_LOW ) || ( speed > SPEED_VERY_HIGH ) ) { speed = SPEED_MEDIUM; } CurrentSpeed = speed; switch( speed ) { // 18 MHz case SPEED_VERY_LOW : /* PLLCLK = 6MHz * 3 = 18 MHz */ RCC_PLLConfig( RCC_PLLSource_HSE_Div2, RCC_PLLMul_3 ); break; // 24MHz case SPEED_LOW : /* PLLCLK = 12MHz * 2 = 24 MHz */ RCC_PLLConfig( RCC_PLLSource_HSE_Div1, RCC_PLLMul_2 ); break; // 36MHz case SPEED_MEDIUM : default : /* PLLCLK = 12MHz * 3 = 36 MHz */ RCC_PLLConfig( RCC_PLLSource_HSE_Div1, RCC_PLLMul_3 ); break; // 48MHz case SPEED_HIGH : /* PLLCLK = 12MHz * 4 = 48 MHz */ RCC_PLLConfig( RCC_PLLSource_HSE_Div1, RCC_PLLMul_4 ); break; // 72MHz case SPEED_VERY_HIGH : /* PLLCLK = 12MHz * 6 = 72 MHz */ RCC_PLLConfig( RCC_PLLSource_HSE_Div1, RCC_PLLMul_6 ); break; } /* Enable PLL */ RCC_PLLCmd( ENABLE ); /* Wait till PLL is ready */ while( RCC_GetFlagStatus( RCC_FLAG_PLLRDY ) == RESET ) { ; } /* Select PLL as system clock source */ RCC_SYSCLKConfig( RCC_SYSCLKSource_PLLCLK ); /* Wait till PLL is used as system clock source */ while( RCC_GetSYSCLKSource() != 0x08 ) { ; } /* This function fills a RCC_ClocksTypeDef structure with the current frequencies of different on chip clocks (for debug purpose) */ RCC_GetClocksFreq( &RCC_ClockFreq ); }
/******************************************************************************* * Function Name : Demo_Init * Description : Initializes the demonstration application. * Input : None * Output : None * Return : None *******************************************************************************/ void Demo_Init(void) { /* RCC system reset(for debug purpose) */ RCC_DeInit(); /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ HSEStartUpStatus = RCC_WaitForHSEStartUp(); if(HSEStartUpStatus == SUCCESS) { /* Enable Prefetch Buffer */ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); /* Flash 2 wait state */ FLASH_SetLatency(FLASH_Latency_2); /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK */ RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK1 = HCLK/2 */ RCC_PCLK1Config(RCC_HCLK_Div2); /* PLLCLK = 8MHz * 9 = 72 MHz */ RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) { } /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till PLL is used as system clock source */ while(RCC_GetSYSCLKSource() != 0x08) { } } /* Enable GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG and AFIO clocks */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB |RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG | RCC_APB2Periph_AFIO, ENABLE); /* TIM1 Periph clock enable */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE); /*------------------- Resources Initialization -----------------------------*/ /* GPIO Configuration */ GPIO_Config(); /* Interrupt Configuration */ InterruptConfig(); /* Configure the systick */ SysTick_Configuration(); /*------------------- Drivers Initialization -------------------------------*/ /* Initialize the LEDs toogling */ LedShow_Init(); /* Initialize the Low Power application */ LowPower_Init(); /* Initialize the LCD */ STM3210E_LCD_Init(); /* Clear the LCD */ LCD_Clear(White); /* If HSE is not detected at program startup */ if(HSEStartUpStatus == ERROR) { /* Generate NMI exception */ SCB->ICSR |= SCB_ICSR_NMIPENDSET; } /* Checks the availability of the bitmap files */ CheckBitmapFilesStatus(); /* Display the STM32 introduction */ STM32Intro(); /* Clear the LCD */ LCD_Clear(White); /* Initialize the Calendar */ Calendar_Init(); /* Enable Leds toggling */ LedShow(ENABLE); /* Initialize the Low Power application*/ LowPower_Init(); /* Set the LCD Back Color */ LCD_SetBackColor(Blue); /* Set the LCD Text Color */ LCD_SetTextColor(White); /* Initialize the Menu */ Menu_Init(); /* Display the main menu icons */ ShowMenuIcons(); }
/** * @brief Selects HSE as System clock source and configure HCLK, PCLK2 * and PCLK1 prescalers. * @param None * @retval None */ void SetSysClockToHSE(void) { /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/ /* RCC system reset(for debug purpose) */ RCC_DeInit(); /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ HSEStartUpStatus = RCC_WaitForHSEStartUp(); if (HSEStartUpStatus == SUCCESS) { #if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL /* Enable Prefetch Buffer */ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); #ifndef STM32F10X_CL /* Flash 0 wait state */ FLASH_SetLatency(FLASH_Latency_0); #else if (HSE_Value <= 24000000) { /* Flash 0 wait state */ FLASH_SetLatency(FLASH_Latency_0); } else { /* Flash 1 wait state */ FLASH_SetLatency(FLASH_Latency_1); } #endif /* STM32F10X_CL */ #endif /* STM32F10X_LD_VL && STM32F10X_MD_VL */ /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK */ RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK1 = HCLK */ RCC_PCLK1Config(RCC_HCLK_Div1); /* Select HSE as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_HSE); /* Wait till PLL is used as system clock source */ while (RCC_GetSYSCLKSource() != 0x04) { } } else { /* If HSE fails to start-up, the application will have wrong clock configuration. User can add here some code to deal with this error */ /* Go to infinite loop */ while (1) { } } }
/******************************************************************************* * Function Name : Set_System * Description : Configures Main system clocks & power. * Input : None. * Return : None. *******************************************************************************/ void Set_System(void) { GPIO_InitTypeDef GPIO_InitStructure; /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/ /* RCC system reset(for debug purpose) */ RCC_DeInit(); /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ HSEStartUpStatus = RCC_WaitForHSEStartUp(); if (HSEStartUpStatus == SUCCESS) { /* Enable Prefetch Buffer */ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); /* Flash 2 wait state */ FLASH_SetLatency(FLASH_Latency_2); /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK */ RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK1 = HCLK/2 */ RCC_PCLK1Config(RCC_HCLK_Div2); /* On STICE the PLL output clock is fixed to 72 MHz */ RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) {} /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till PLL is used as system clock source */ while (RCC_GetSYSCLKSource() != 0x08) {} } /* enable the PWR clock */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE); /* Set all the GPIOs to AIN */ GPIO_AINConfig(); RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIO_DISCONNECT, ENABLE); /* USB_DISCONNECT used as USB pull-up */ GPIO_InitStructure.GPIO_Pin = USB_DISCONNECT_PIN; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_OD; GPIO_Init(USB_DISCONNECT, &GPIO_InitStructure); }
/* Configures the different system clocks ----------------------------------*/ void RCC_Configuration(void) { ErrorStatus HSEStartUpStatus; /* Setup the microcontroller system. Initialize the Embedded Flash Interface, initialize the PLL and update the SystemFrequency variable. */ //SystemInit(); /* RCC system reset(for debug purpose) */ //RCC_DeInit(); /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); // internal clock - RCC_PLLSource_HSE_Div2 = 36MHz //RCC_HSICmd(ENABLE); /* Wait till HSE is ready */ HSEStartUpStatus = RCC_WaitForHSEStartUp(); if(HSEStartUpStatus == SUCCESS) { /* Enable Prefetch Buffer */ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); /* Flash 2 wait state */ FLASH_SetLatency(FLASH_Latency_2); /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK */ RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK1 = HCLK/2 */ RCC_PCLK1Config(RCC_HCLK_Div2); /* ADCCLK = PCLK2/4 */ RCC_ADCCLKConfig(RCC_PCLK2_Div6); // 72MHz/6=12 MHz range must be 0.6-14MHz; /* PLLCLK = 8MHz * 9 = 72 MHz */ RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) { } /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till PLL is used as system clock source */ while(RCC_GetSYSCLKSource() != 0x08) { } } /* Enable TIM2 clocks for LED, Enable TIM3 clocks for Statemachine */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3, ENABLE); // Timer /* Enable for PPM decode -------------------------------------------*/ /* TIM1 clock enable Enable TIM8 clocks for Servo */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM8, ENABLE); /* Enable GPIO clocks A(UART1),B(UART3),C(LED, Sensors), ...*/ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC, ENABLE); /* AFIO and USART1 clocks UART1*/ RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_USART1, ENABLE); /* UART3 clock (Motor/BLC) */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2 | RCC_APB1Periph_USART3 | RCC_APB1Periph_UART4, ENABLE); /* Enable ADC1 clock */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE); /* Enable DMA1 clock */ RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA, ENABLE); /* I2C1 Periph clock enable */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1, ENABLE); }
void RCC_Conf() { //zmienna opisujaca rezultat uruchomienia HSE ErrorStatus HSEStartUpStatus; //Reset ustawien RCC RCC_DeInit(); //wlacz HSE RCC_HSEConfig(RCC_HSE_ON); //czekaj na gotowosc HSE HSEStartUpStatus = RCC_WaitForHSEStartUp(); if(HSEStartUpStatus == SUCCESS) { //ustaw opoznienie dla pamieci flash w zaleznosci od taktowania rdzenia //opoznienie 0 cykli, gdy F_CPU <24MHz //opoznienie 1 cykl, gdy F_CPU 24~48 MHz //opoznienie 2 cykle gdy F_CPU >48 MHz FLASH_PrefetchBufferCmd(ENABLE); FLASH_SetLatency(FLASH_Latency_5); //ustaw HCLK = SYSCLK RCC_HCLKConfig(RCC_SYSCLK_Div1); //ustaw PCLK1 = HCLK/2 RCC_PCLK1Config(RCC_HCLK_Div4); //MAX 42MHz //ustaw PCLK2 = HCLK RCC_PCLK2Config(RCC_HCLK_Div2); //MAX 84 MHz //ustaw PLLCLK PLLM = 8, PLLN = 336, PLLP = 2, PLLQ = 7 //PLLCLK = (HSE * (PLLN/PLLM))/PLLP = 168MHz (MAX 168MHz) //USB OTG FS, SDIO, RNG clock output = PLLCLK / PLLQ (MAX 48MHz) RCC_PLLConfig(RCC_PLLSource_HSE,8,336,2,7); //wlacz PLL RCC_PLLCmd(ENABLE); //odczekaj na poprawne uruchomienie PLL while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET); //ustaw PLL jako zrodlo sygnalu zegarowego RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); //odczekaj az PLL bedzie sygnalem zegarowym systemu while(RCC_GetSYSCLKSource() != 0x08); /*kod zwiazany z konfiguracja sygnalow zegarowych potrzebnych w programie peryferiow*/ //Wlacz taktowanie portu D RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE); }else {} RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD,ENABLE); GPIO_InitTypeDef GPIO_InitStructure; GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN; GPIO_Init(GPIOD, &GPIO_InitStructure); GPIO_ResetBits(GPIOD,GPIO_Pin_13); }
static void prvSetupHardware( void ) { /* Start with the clocks in their expected state. */ RCC_DeInit(); /* Enable HSE (high speed external clock). */ RCC_HSEConfig( RCC_HSE_ON ); /* Wait till HSE is ready. */ while( RCC_GetFlagStatus( RCC_FLAG_HSERDY ) == RESET ) { } /* 2 wait states required on the flash. */ *( ( unsigned portLONG * ) 0x40022000 ) = 0x02; /* HCLK = SYSCLK */ RCC_HCLKConfig( RCC_SYSCLK_Div1 ); /* PCLK2 = HCLK */ RCC_PCLK2Config( RCC_HCLK_Div1 ); /* PCLK1 = HCLK/2 */ RCC_PCLK1Config( RCC_HCLK_Div2 ); /* PLLCLK = 12MHz * 6 = 72 MHz. */ RCC_PLLConfig( RCC_PLLSource_HSE_Div1, RCC_PLLMul_6 ); /* Enable PLL. */ RCC_PLLCmd( ENABLE ); /* Wait till PLL is ready. */ while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) { } /* Select PLL as system clock source. */ RCC_SYSCLKConfig( RCC_SYSCLKSource_PLLCLK ); /* Wait till PLL is used as system clock source. */ while( RCC_GetSYSCLKSource() != 0x08 ) { } /* Enable GPIOA, GPIOB, GPIOC, GPIOD, GPIOE and AFIO clocks */ RCC_APB2PeriphClockCmd( RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB |RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_AFIO, ENABLE ); /* SPI2 Periph clock enable */ RCC_APB1PeriphClockCmd( RCC_APB1Periph_SPI2, ENABLE ); /* Set the Vector Table base address at 0x08000000 */ NVIC_SetVectorTable( NVIC_VectTab_FLASH, 0x0 ); NVIC_PriorityGroupConfig( NVIC_PriorityGroup_4 ); /* Configure HCLK clock as SysTick clock source. */ SysTick_CLKSourceConfig( SysTick_CLKSource_HCLK ); /* Misc initialisation, including some of the CircleOS features. Note that CircleOS itself is not used. */ vParTestInitialise(); MEMS_Init(); POINTER_Init(); POINTER_SetMode( POINTER_RESTORE_LESS ); }
/******************************************************************************* * Function Name : Set_System * Description : Configures Main system clocks & power * Input : None. * Return : None. *******************************************************************************/ void Set_System(void) { GPIO_InitTypeDef GPIO_InitStructure; /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/ /* RCC system reset(for debug purpose) */ RCC_DeInit(); /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ HSEStartUpStatus = RCC_WaitForHSEStartUp(); if (HSEStartUpStatus == SUCCESS) { /* Enable Prefetch Buffer */ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); /* Flash 2 wait state */ FLASH_SetLatency(FLASH_Latency_2); /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK */ RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK1 = HCLK/2 */ RCC_PCLK1Config(RCC_HCLK_Div2); /* ADCCLK = PCLK2/6 */ RCC_ADCCLKConfig(RCC_PCLK2_Div6); RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) {} /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till PLL is used as system clock source */ while (RCC_GetSYSCLKSource() != 0x08) {} } /* Enable GPIOA, GPIOD and USART1 clock */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOD | RCC_APB2Periph_USART1, ENABLE); /* Enable USB_DISCONNECT GPIO clock */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIO_DISCONNECT, ENABLE); /* Configure USB pull-up pin */ GPIO_InitStructure.GPIO_Pin = USB_DISCONNECT_PIN; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_OD; GPIO_Init(USB_DISCONNECT, &GPIO_InitStructure); /* Configure USART1 Rx (PA.10) as input floating */ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_Init(GPIOA, &GPIO_InitStructure); /* Configure USART1 Tx (PA.09) as alternate function push-pull */ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_Init(GPIOA, &GPIO_InitStructure); }
/******************************************************************************* * Function Name : RCC_Configuration * Description : Configures the different system clocks. * Input : None * Output : None * Return : None *******************************************************************************/ void RCC_Configuration(void) { ErrorStatus HSEStartUpStatus; /* RCC system reset(for debug purpose) */ RCC_DeInit(); /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ HSEStartUpStatus = RCC_WaitForHSEStartUp(); if(HSEStartUpStatus == SUCCESS) { /* Enable Prefetch Buffer */ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); /* Flash 2 wait state */ FLASH_SetLatency(FLASH_Latency_2); /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK */ RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK1 = HCLK/2 */ RCC_PCLK1Config(RCC_HCLK_Div2); /* PLLCLK = 8MHz * 9 = 72 MHz */ RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) { } /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till PLL is used as system clock source */ while(RCC_GetSYSCLKSource() != 0x08) { } } /* Enable peripheral clocks --------------------------------------------------*/ /* Enable USART5, GPIOA,and AFIO clocks */ /* Enable USART5, GPIOA, GPIOB, and AFIO clocks */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM8 | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD | RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2 | RCC_APB2Periph_AFIO, ENABLE); RCC_APB1PeriphClockCmd ( RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4 | RCC_APB1Periph_TIM5 | RCC_APB1Periph_USART3 | RCC_APB1Periph_UART5 | RCC_APB1Periph_SPI2| RCC_APB1Periph_BKP | RCC_APB1Periph_PWR, ENABLE); PWR_BackupAccessCmd(ENABLE); }
/******************************************************************************* Set_System : Configures Main system clocks & power *******************************************************************************/ void Set_System(void) { RCC_DeInit(); RCC_HSEConfig(RCC_HSE_ON); HSEStartUpStatus = RCC_WaitForHSEStartUp(); if(HSEStartUpStatus == SUCCESS) { FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); FLASH_SetLatency(FLASH_Latency_2); //Flash 2 wait state RCC_CFGR = 0x001D8402;/*AHB peripheral clock enable |||||||+--Bits1:0 =10 PLL used as system clock ||||||+---Bits7:4 =0000 AHB clock=SYSCLK |||||+----Bits10:8 =100 PCLK1=HCLK divided by 2 ||||++----Bits13:11 =000 PCLK2=HCLK ||||+-----Bits15:14 =10 ADC prescaler PCLK2 divided by 6 |||+------Bit16 =1 HSE oscillator clock selected as PLL input clock |||+------Bit17 =0 HSE clock not divided ||++------Bits21:18 =0111 PLL input clock x 9 ||+-------Bit22=0 USB prescaler is PLL clock divided by 1.5 |+--------Bits26:24 =000 MCO as No clock |+--------Bits26:24 =100 MCO as SYSCLK |+--------Bits26:24 =111 MCO as SYSCLK/2 ++--------Bits31:27 Reserved*/ RCC_PLLCmd(ENABLE); while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET){} RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); while(RCC_GetSYSCLKSource()!=0x08){} } RCC_AHBENR = 0x00000117;/*AHB peripheral clock enable |||||||+--Bit0 =1 DMA1 clock enabled |||||||+--Bit1 =1 DMA2 clock enabled |||||||+--Bit2 =1 SRAM interface clock enabled during Sleep mode ||||||+---Bit4 =1 FLITF clock enabled during Sleep mode ||||||+---Bit6 =0 CRC clock disabled |||||+----Bit8 =1 FSMC clock enabled |||||+----Bit10=0 SDIO clock disabled ++++++----Bits31:11=0 Reserved*/ RCC_APB2ENR = 0x0000AE7D;/* APB2 peripheral clock enable |||||||+--Bit0 =1 1:Alternate Function I/O clock enabled |||||||+--Bit2 =1 I/O port A clock enabled |||||||+--Bit3 =1 I/O port B clock enabled ||||||+---Bit4 =1 I/O port C clock enabled ||||||+---Bit5 =1 I/O port D clock enabled ||||||+---Bit6 =1 I/O port E clock enabled ||||||+---Bit7 =0 I/O port F clock disabled |||||+----Bit8 =0 I/O port G clock disabled |||||+----Bit9 =1 ADC 1 interface clock disabled |||||+----Bit10=1 ADC 2 interface clock disabled |||||+----Bit11=1 TIM1 timer clock enabled ||||+-----Bit12=0 SPI 1 clock disabled ||||+-----Bit13=1 TIM8 timer clock enabled ||||+-----Bit14=0 USART1 clock disabled ||||+-----Bit15=1 ADC 3 interface clock enabled ++++------Bit31:17=0 Reserved*/ RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_1Div5); //USBCLK = 48MHz RCC_APB1ENR = 0x2080802F;/* APB1 peripheral clock enable |||||||+--Bit0 =1 Timer 2 clock enabled |||||||+--Bit1 =1 Timer 3 clock enabled |||||||+--Bit2 =1 Timer 4 clock enabled |||||||+--Bit3 =1 Timer 5 clock enabled ||||||+---Bit4 =0 Timer 6 clock disabled ||||||+---Bit5 =1 Timer 7 clock ensabled |||||+----Bit11=0 Window watchdog clock disabled ||||+-----Bit14=0 SPI 2 clock disabled ||||+-----Bit15=1 SPI 3 clock enabled |||+------Bit17=0 USART 2 clock disabled |||+------Bit18=0 USART 3 clock disabled |||+------Bit19=0 USART 4 clock disabled ||+-------Bit20=0 USART 5 clock disabled ||+-------Bit21=0 I2C 1 clock disabled ||+-------Bit22=0 I2C 2 clock enabled ||+-------Bit23=1 USB clock enabled |+--------Bit25=0 CAN clock disabled |+--------Bit27=0 Backup interface clock disabled +---------Bit28=0 Power interface clock disabled +---------Bit29=1 DAC interface clock enable*/ }