static void nxp_mcimx7_pwm_config(void)
{
#ifdef CONFIG_PWM_1
/* We need to grasp board pwm exclusively */
RDC_SetPdapAccess(RDC, rdcPdapPwm1,
RDC_DOMAIN_PERM(CONFIG_DOMAIN_ID, RDC_DOMAIN_PERM_RW),
false, false);
/* Select clock derived from OSC clock(24M) */
CCM_UpdateRoot(CCM, ccmRootPwm1, ccmRootmuxPwmOsc24m, 0, 0);
/* Enable pwm clock */
CCM_EnableRoot(CCM, ccmRootPwm1);
CCM_ControlGate(CCM, ccmCcgrGatePwm1, ccmClockNeededAll);
#endif /* #ifdef CONFIG_PWM_1 */
#ifdef CONFIG_PWM_2
/* We need to grasp board pwm exclusively */
RDC_SetPdapAccess(RDC, rdcPdapPwm2,
RDC_DOMAIN_PERM(CONFIG_DOMAIN_ID, RDC_DOMAIN_PERM_RW),
false, false);
/* Select clock derived from OSC clock(24M) */
CCM_UpdateRoot(CCM, ccmRootPwm2, ccmRootmuxPwmOsc24m, 0, 0);
/* Enable pwm clock */
CCM_EnableRoot(CCM, ccmRootPwm2);
CCM_ControlGate(CCM, ccmCcgrGatePwm2, ccmClockNeededAll);
#endif /* #ifdef CONFIG_PWM_2 */
#ifdef CONFIG_PWM_3
/* We need to grasp board pwm exclusively */
RDC_SetPdapAccess(RDC, rdcPdapPwm3,
RDC_DOMAIN_PERM(CONFIG_DOMAIN_ID, RDC_DOMAIN_PERM_RW),
false, false);
/* Select clock derived from OSC clock(24M) */
CCM_UpdateRoot(CCM, ccmRootPwm3, ccmRootmuxPwmOsc24m, 0, 0);
/* Enable pwm clock */
CCM_EnableRoot(CCM, ccmRootPwm3);
CCM_ControlGate(CCM, ccmCcgrGatePwm3, ccmClockNeededAll);
#endif /* #ifdef CONFIG_PWM_3 */
#ifdef CONFIG_PWM_4
/* We need to grasp board pwm exclusively */
RDC_SetPdapAccess(RDC, rdcPdapPwm4,
RDC_DOMAIN_PERM(CONFIG_DOMAIN_ID, RDC_DOMAIN_PERM_RW),
false, false);
/* Select clock derived from OSC clock(24M) */
CCM_UpdateRoot(CCM, ccmRootPwm4, ccmRootmuxPwmOsc24m, 0, 0);
/* Enable pwm clock */
CCM_EnableRoot(CCM, ccmRootPwm4);
CCM_ControlGate(CCM, ccmCcgrGatePwm4, ccmClockNeededAll);
#endif /* #ifdef CONFIG_PWM_4 */
}
static void nxp_mcimx7_i2c_config(void)
{
#ifdef CONFIG_I2C_1
/* In this example, we need to grasp board I2C exclusively */
RDC_SetPdapAccess(RDC, rdcPdapI2c1,
RDC_DOMAIN_PERM(CONFIG_DOMAIN_ID, RDC_DOMAIN_PERM_RW),
false, false);
/* Select I2C clock derived from OSC clock(24M) */
CCM_UpdateRoot(CCM, ccmRootI2c1, ccmRootmuxI2cOsc24m, 0, 0);
/* Enable I2C clock */
CCM_EnableRoot(CCM, ccmRootI2c1);
CCM_ControlGate(CCM, ccmCcgrGateI2c1, ccmClockNeededRunWait);
#endif /* CONFIG_I2C_1 */
#ifdef CONFIG_I2C_2
/* In this example, we need to grasp board I2C exclusively */
RDC_SetPdapAccess(RDC, rdcPdapI2c2,
RDC_DOMAIN_PERM(CONFIG_DOMAIN_ID, RDC_DOMAIN_PERM_RW),
false, false);
/* Select I2C clock derived from OSC clock(24M) */
CCM_UpdateRoot(CCM, ccmRootI2c2, ccmRootmuxI2cOsc24m, 0, 0);
/* Enable I2C clock */
CCM_EnableRoot(CCM, ccmRootI2c2);
CCM_ControlGate(CCM, ccmCcgrGateI2c2, ccmClockNeededRunWait);
#endif /* CONFIG_I2C_2 */
#ifdef CONFIG_I2C_3
/* In this example, we need to grasp board I2C exclusively */
RDC_SetPdapAccess(RDC, rdcPdapI2c3,
RDC_DOMAIN_PERM(CONFIG_DOMAIN_ID, RDC_DOMAIN_PERM_RW),
false, false);
/* Select I2C clock derived from OSC clock(24M) */
CCM_UpdateRoot(CCM, ccmRootI2c3, ccmRootmuxI2cOsc24m, 0, 0);
/* Enable I2C clock */
CCM_EnableRoot(CCM, ccmRootI2c3);
CCM_ControlGate(CCM, ccmCcgrGateI2c3, ccmClockNeededRunWait);
#endif /* CONFIG_I2C_3 */
#ifdef CONFIG_I2C_4
/* In this example, we need to grasp board I2C exclusively */
RDC_SetPdapAccess(RDC, rdcPdapI2c4,
RDC_DOMAIN_PERM(CONFIG_DOMAIN_ID, RDC_DOMAIN_PERM_RW),
false, false);
/* Select I2C clock derived from OSC clock(24M) */
CCM_UpdateRoot(CCM, ccmRootI2c4, ccmRootmuxI2cOsc24m, 0, 0);
/* Enable I2C clock */
CCM_EnableRoot(CCM, ccmRootI2c4);
CCM_ControlGate(CCM, ccmCcgrGateI2c4, ccmClockNeededRunWait);
#endif /* CONFIG_I2C_4 */
}
/* Initialize clock. */
void SOC_ClockInit(void)
{
/* OSC/PLL is already initialized by Cortex-A7 (u-boot) */
/*
* Disable WDOG3
* Note : The WDOG clock Root is shared by all the 4 WDOGs,
* so Zephyr code should avoid closing it
*/
CCM_UpdateRoot(CCM, ccmRootWdog, ccmRootmuxWdogOsc24m, 0, 0);
CCM_EnableRoot(CCM, ccmRootWdog);
CCM_ControlGate(CCM, ccmCcgrGateWdog3, ccmClockNeededRun);
RDC_SetPdapAccess(RDC, rdcPdapWdog3,
RDC_DOMAIN_PERM(CONFIG_DOMAIN_ID, RDC_DOMAIN_PERM_RW),
false, false);
WDOG_DisablePowerdown(WDOG3);
CCM_ControlGate(CCM, ccmCcgrGateWdog3, ccmClockNotNeeded);
/* We need system PLL Div2 to run M4 core */
CCM_ControlGate(CCM, ccmPllGateSys, ccmClockNeededRun);
CCM_ControlGate(CCM, ccmPllGateSysDiv2, ccmClockNeededRun);
/* Enable clock gate for IP bridge and IO mux */
CCM_ControlGate(CCM, ccmCcgrGateIpmux1, ccmClockNeededRun);
CCM_ControlGate(CCM, ccmCcgrGateIpmux2, ccmClockNeededRun);
CCM_ControlGate(CCM, ccmCcgrGateIpmux3, ccmClockNeededRun);
CCM_ControlGate(CCM, ccmCcgrGateIomux, ccmClockNeededRun);
CCM_ControlGate(CCM, ccmCcgrGateIomuxLpsr, ccmClockNeededRun);
/* Enable clock gate for RDC */
CCM_ControlGate(CCM, ccmCcgrGateRdc, ccmClockNeededRun);
}
static void nxp_mcimx7_gpio_config(void)
{
#ifdef CONFIG_GPIO_IMX_PORT_1
RDC_SetPdapAccess(RDC, rdcPdapGpio1,
RDC_DOMAIN_PERM(CONFIG_DOMAIN_ID, RDC_DOMAIN_PERM_RW),
false, false);
/* Enable gpio clock gate */
CCM_ControlGate(CCM, ccmCcgrGateGpio1, ccmClockNeededRunWait);
#endif /* CONFIG_GPIO_IMX_PORT_1 */
#ifdef CONFIG_GPIO_IMX_PORT_2
RDC_SetPdapAccess(RDC, rdcPdapGpio2,
RDC_DOMAIN_PERM(CONFIG_DOMAIN_ID, RDC_DOMAIN_PERM_RW),
false, false);
/* Enable gpio clock gate */
CCM_ControlGate(CCM, ccmCcgrGateGpio2, ccmClockNeededRunWait);
#endif /* CONFIG_GPIO_IMX_PORT_2 */
}
void hardware_init(void) {
/* Board specific RDC settings */
BOARD_RdcInit();
/* Board specific clock settings */
BOARD_ClockInit();
/* initialize debug uart */
dbg_uart_init();
configure_pwm_pins(PWM2);
configure_pwm_pins(PWM3);
RDC_SetPdapAccess(RDC, rdcPdapPwm2, 3 << (BOARD_DOMAIN_ID * 2), false, false);
RDC_SetPdapAccess(RDC, rdcPdapPwm3, 3 << (BOARD_DOMAIN_ID * 2), false, false);
/* Configure GPIOS */
configure_platform_gpio();
/* Enable Interrupts */
NVIC_EnableIRQ(BOARD_ENC_IRQ);
/* In this example, we need to grasp board I2C exclusively */
RDC_SetPdapAccess(RDC, BOARD_I2C_RDC_PDAP, 3 << (BOARD_DOMAIN_ID * 2), false, false);
/* Select I2C clock derived from OSC clock(24M) */
CCM_UpdateRoot(CCM, BOARD_I2C_CCM_ROOT, ccmRootmuxI2cOsc24m, 0, 0);
/* Enable I2C clock */
CCM_EnableRoot(CCM, BOARD_I2C_CCM_ROOT);
CCM_ControlGate(CCM, BOARD_I2C_CCM_CCGR, ccmClockNeededRunWait);
/* I2C Pin setting */
configure_i2c_pins(BOARD_I2C_BASEADDR);
/* RDC MU*/
RDC_SetPdapAccess(RDC, BOARD_MU_RDC_PDAP, 3 << (BOARD_DOMAIN_ID * 2), false, false);
/* Enable clock gate for MU*/
CCM_ControlGate(CCM, BOARD_MU_CCM_CCGR, ccmClockNeededRun);
}
static void nxp_mcimx7_uart_config(void)
{
#ifdef CONFIG_UART_IMX_UART_2
/* We need to grasp board uart exclusively */
RDC_SetPdapAccess(RDC, rdcPdapUart2,
RDC_DOMAIN_PERM(CONFIG_DOMAIN_ID, RDC_DOMAIN_PERM_RW),
false, false);
/* Select clock derived from OSC clock(24M) */
CCM_UpdateRoot(CCM, ccmRootUart2, ccmRootmuxUartOsc24m, 0, 0);
/* Enable uart clock */
CCM_EnableRoot(CCM, ccmRootUart2);
/*
* IC Limitation
* M4 stop will cause A7 UART lose functionality
* So we need UART clock all the time
*/
CCM_ControlGate(CCM, ccmCcgrGateUart2, ccmClockNeededAll);
#endif /* #ifdef CONFIG_UART_IMX_UART_2 */
}
