static void hppa_hpux_fetch_register (int regnum) { CORE_ADDR addr; size_t size; PTRACE_TYPE_RET *buf; pid_t pid; int i; pid = ptid_get_pid (inferior_ptid); /* This isn't really an address, but ptrace thinks of it as one. */ addr = hppa_hpux_save_state_offset(current_regcache, regnum); size = register_size (current_gdbarch, regnum); gdb_assert (size == 4 || size == 8); buf = alloca (size); #ifdef HAVE_TTRACE { lwpid_t lwp = ptid_get_lwp (inferior_ptid); if (ttrace (TT_LWP_RUREGS, pid, lwp, addr, size, (uintptr_t)buf) == -1) error (_("Couldn't read register %s (#%d): %s"), REGISTER_NAME (regnum), regnum, safe_strerror (errno)); } #else { int i; /* Read the register contents from the inferior a chuck at the time. */ for (i = 0; i < size / sizeof (PTRACE_TYPE_RET); i++) { errno = 0; buf[i] = ptrace (PT_RUREGS, pid, (PTRACE_TYPE_ARG3) addr, 0, 0); if (errno != 0) error (_("Couldn't read register %s (#%d): %s"), REGISTER_NAME (regnum), regnum, safe_strerror (errno)); addr += sizeof (PTRACE_TYPE_RET); } } #endif /* Take care with the "flags" register. It's stored as an `int' in `struct save_state', even for 64-bit code. */ if (regnum == HPPA_FLAGS_REGNUM && size == 8) { ULONGEST flags = extract_unsigned_integer ((gdb_byte *)buf, 4); store_unsigned_integer ((gdb_byte *)buf, 8, flags); } regcache_raw_supply (current_regcache, regnum, buf); }
int legacy_register_sim_regno (int regnum) { /* Only makes sense to supply raw registers. */ gdb_assert (regnum >= 0 && regnum < NUM_REGS); /* NOTE: cagney/2002-05-13: The old code did it this way and it is suspected that some GDB/SIM combinations may rely on this behavour. The default should be one2one_register_sim_regno (below). */ if (REGISTER_NAME (regnum) != NULL && REGISTER_NAME (regnum)[0] != '\0') return regnum; else return LEGACY_SIM_REGNO_IGNORE; }
static void gdbsim_fetch_register (int regno) { if (regno == -1) { for (regno = 0; regno < NUM_REGS; regno++) gdbsim_fetch_register (regno); return; } switch (REGISTER_SIM_REGNO (regno)) { case LEGACY_SIM_REGNO_IGNORE: break; case SIM_REGNO_DOES_NOT_EXIST: { /* For moment treat a `does not exist' register the same way as an ``unavailable'' register. */ char buf[MAX_REGISTER_SIZE]; int nr_bytes; memset (buf, 0, MAX_REGISTER_SIZE); regcache_raw_supply (current_regcache, regno, buf); set_register_cached (regno, -1); break; } default: { static int warn_user = 1; char buf[MAX_REGISTER_SIZE]; int nr_bytes; gdb_assert (regno >= 0 && regno < NUM_REGS); memset (buf, 0, MAX_REGISTER_SIZE); nr_bytes = sim_fetch_register (gdbsim_desc, REGISTER_SIM_REGNO (regno), buf, register_size (current_gdbarch, regno)); if (nr_bytes > 0 && nr_bytes != register_size (current_gdbarch, regno) && warn_user) { fprintf_unfiltered (gdb_stderr, "Size of register %s (%d/%d) incorrect (%d instead of %d))", REGISTER_NAME (regno), regno, REGISTER_SIM_REGNO (regno), nr_bytes, register_size (current_gdbarch, regno)); warn_user = 0; } /* FIXME: cagney/2002-05-27: Should check `nr_bytes == 0' indicating that GDB and the SIM have different ideas about which registers are fetchable. */ /* Else if (nr_bytes < 0): an old simulator, that doesn't think to return the register size. Just assume all is ok. */ regcache_raw_supply (current_regcache, regno, buf); if (sr_get_debug ()) { printf_filtered ("gdbsim_fetch_register: %d", regno); /* FIXME: We could print something more intelligible. */ dump_mem (buf, register_size (current_gdbarch, regno)); } break; } } }
static void inf_ptrace_store_register (int regnum) { CORE_ADDR addr; size_t size; PTRACE_TYPE_RET *buf; int pid, i; /* Cater for systems like GNU/Linux, that implement threads as seperate processes. */ pid = ptid_get_lwp (inferior_ptid); if (pid == 0) pid = ptid_get_pid (inferior_ptid); /* This isn't really an address, but ptrace thinks of it as one. */ addr = inf_ptrace_register_u_offset (regnum); size = register_size (current_gdbarch, regnum); gdb_assert ((size % sizeof (PTRACE_TYPE_RET)) == 0); buf = alloca (size); /* Write the register contents into the inferior a chunk at the time. */ regcache_raw_collect (current_regcache, regnum, buf); for (i = 0; i < size / sizeof (PTRACE_TYPE_RET); i++) { errno = 0; ptrace (PT_WRITE_U, pid, (PTRACE_TYPE_ARG3)addr, buf[i]); if (errno != 0) error (_("Couldn't write register %s (#%d): %s."), REGISTER_NAME (regnum), regnum, safe_strerror (errno)); addr += sizeof (PTRACE_TYPE_RET); } }
static void fetch_register (int regno) { int tid; int val; if (CANNOT_FETCH_REGISTER (regno)) { regcache_raw_supply (current_regcache, regno, NULL); return; } /* GNU/Linux LWP ID's are process ID's. */ tid = TIDGET (inferior_ptid); if (tid == 0) tid = PIDGET (inferior_ptid); /* Not a threaded program. */ errno = 0; val = ptrace (PTRACE_PEEKUSER, tid, register_addr (regno, 0), 0); if (errno != 0) error (_("Couldn't read register %s (#%d): %s."), REGISTER_NAME (regno), regno, safe_strerror (errno)); regcache_raw_supply (current_regcache, regno, &val); }
static void fetch_register (int regno) { register unsigned int regaddr; char buf[MAX_REGISTER_RAW_SIZE]; register int i; /* Offset of registers within the u area. */ unsigned int offset; offset = U_REGS_OFFSET; regaddr = register_addr (regno, offset); for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (int)) { errno = 0; *(int *) &buf[i] = ptrace (PT_RUREGS, PIDGET (inferior_ptid), (PTRACE_ARG3_TYPE) regaddr, 0); regaddr += sizeof (int); if (errno != 0) { /* Warning, not error, in case we are attached; sometimes the kernel doesn't let us at the registers. */ char *err = safe_strerror (errno); char *msg = alloca (strlen (err) + 128); sprintf (msg, "reading register %s: %s", REGISTER_NAME (regno), err); warning (msg); goto error_exit; } } supply_register (regno, buf); error_exit:; }
static void fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, int which, CORE_ADDR reg_addr) { int regno; CORE_ADDR addr; int bad_reg = -1; CORE_ADDR reg_ptr = -reg_addr; /* Original u.u_ar0 is -reg_addr. */ int numregs = NUM_REGS; /* If u.u_ar0 was an absolute address in the core file, relativize it now, so we can use it as an offset into core_reg_sect. When we're done, "register 0" will be at core_reg_sect+reg_ptr, and we can use CORE_REGISTER_ADDR to offset to the other registers. If this is a modern core file without a upage, reg_ptr will be zero and this is all a big NOP. */ if (reg_ptr > core_reg_size) reg_ptr -= KERNEL_U_ADDR; for (regno = 0; regno < numregs; regno++) { addr = CORE_REGISTER_ADDR (regno, reg_ptr); if (addr >= core_reg_size && bad_reg < 0) bad_reg = regno; else regcache_raw_supply (current_regcache, regno, core_reg_sect + addr); } if (bad_reg >= 0) error (_("Register %s not found in core file."), REGISTER_NAME (bad_reg)); }
static void mn10300_do_registers_info (int regnum, int fpregs) { if (regnum >= 0) { const char *name = REGISTER_NAME (regnum); if (name == NULL || name[0] == '\0') error ("Not a valid register for the current processor type"); mn10300_print_register (name, regnum, 0); printf_filtered ("\n"); } else { /* print registers in an array 4x8 */ int r; int reg; const int nr_in_row = 4; const int reg_width = 4; for (r = 0; r < NUM_REGS; r += nr_in_row) { int c; int printing = 0; int padding = 0; for (c = r; c < r + nr_in_row; c++) { const char *name = REGISTER_NAME (c); if (name != NULL && *name != '\0') { printing = 1; while (padding > 0) { printf_filtered (" "); padding--; } mn10300_print_register (name, c, reg_width); printf_filtered (" "); } else { padding += (reg_width + 2 + 8 + 1); } } if (printing) printf_filtered ("\n"); } } }
void store_inferior_registers (int regno) { register unsigned int regaddr; char buf[80]; register int i; unsigned int offset = U_REGS_OFFSET; int scratch; if (regno >= 0) { if (CANNOT_STORE_REGISTER (regno)) return; regaddr = register_addr (regno, offset); errno = 0; if (regno == PCOQ_HEAD_REGNUM || regno == PCOQ_TAIL_REGNUM) { scratch = *(int *) ®isters[REGISTER_BYTE (regno)] | 0x3; ptrace (PT_WUREGS, PIDGET (inferior_ptid), (PTRACE_ARG3_TYPE) regaddr, scratch); if (errno != 0) { /* Error, even if attached. Failing to write these two registers is pretty serious. */ sprintf (buf, "writing register number %d", regno); perror_with_name (buf); } } else for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (int)) { errno = 0; ptrace (PT_WUREGS, PIDGET (inferior_ptid), (PTRACE_ARG3_TYPE) regaddr, *(int *) ®isters[REGISTER_BYTE (regno) + i]); if (errno != 0) { /* Warning, not error, in case we are attached; sometimes the kernel doesn't let us at the registers. */ char *err = safe_strerror (errno); char *msg = alloca (strlen (err) + 128); sprintf (msg, "writing register %s: %s", REGISTER_NAME (regno), err); warning (msg); return; } regaddr += sizeof (int); } } else for (regno = 0; regno < NUM_REGS; regno++) store_inferior_registers (regno); }
/* Fetch register REGNO, or all regs if REGNO is -1. */ void gnu_fetch_registers (int regno) { struct proc *thread; /* Make sure we know about new threads. */ inf_update_procs (current_inferior); thread = inf_tid_to_thread (current_inferior, PIDGET (inferior_ptid)); if (!thread) error (_("Can't fetch registers from thread %d: No such thread"), PIDGET (inferior_ptid)); if (regno < I386_NUM_GREGS || regno == -1) { thread_state_t state; /* This does the dirty work for us. */ state = proc_get_state (thread, 0); if (!state) { warning (_("Couldn't fetch registers from %s"), proc_string (thread)); return; } if (regno == -1) { int i; proc_debug (thread, "fetching all register"); for (i = 0; i < I386_NUM_GREGS; i++) regcache_raw_supply (current_regcache, i, REG_ADDR (state, i)); thread->fetched_regs = ~0; } else { proc_debug (thread, "fetching register %s", REGISTER_NAME (regno)); regcache_raw_supply (current_regcache, regno, REG_ADDR (state, regno)); thread->fetched_regs |= (1 << regno); } } if (regno >= I386_NUM_GREGS || regno == -1) { proc_debug (thread, "fetching floating-point registers"); fetch_fpregs (thread); } }
/* Print a natural-language description of SYMBOL to STREAM. */ static int locexpr_describe_location (struct symbol *symbol, struct ui_file *stream) { /* FIXME: be more extensive. */ struct dwarf2_locexpr_baton *dlbaton = SYMBOL_LOCATION_BATON (symbol); if (dlbaton->size == 1 && dlbaton->data[0] >= DW_OP_reg0 && dlbaton->data[0] <= DW_OP_reg31) { int regno = DWARF2_REG_TO_REGNUM (dlbaton->data[0] - DW_OP_reg0); fprintf_filtered (stream, "a variable in register %s", REGISTER_NAME (regno)); return 1; } /* The location expression for a TLS variable looks like this (on a 64-bit LE machine): DW_AT_location : 10 byte block: 3 4 0 0 0 0 0 0 0 e0 (DW_OP_addr: 4; DW_OP_GNU_push_tls_address) 0x3 is the encoding for DW_OP_addr, which has an operand as long as the size of an address on the target machine (here is 8 bytes). 0xe0 is the encoding for DW_OP_GNU_push_tls_address. The operand represents the offset at which the variable is within the thread local storage. */ if (dlbaton->size > 1 && dlbaton->data[dlbaton->size - 1] == DW_OP_GNU_push_tls_address) if (dlbaton->data[0] == DW_OP_addr) { int bytes_read; CORE_ADDR offset = dwarf2_read_address (&dlbaton->data[1], &dlbaton->data[dlbaton->size - 1], &bytes_read); fprintf_filtered (stream, "a thread-local variable at offset %s in the " "thread-local storage for `%s'", paddr_nz (offset), dlbaton->objfile->name); return 1; } fprintf_filtered (stream, "a variable with complex or multiple locations (DWARF2)"); return 1; }
static void fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, int which, CORE_ADDR reg_addr) { int regno; unsigned int addr; int bad_reg = -1; reg_ptr = -reg_addr; /* Original u.u_ar0 is -reg_addr. */ char zerobuf[MAX_REGISTER_SIZE]; memset (zerobuf, 0, MAX_REGISTER_SIZE); /* If u.u_ar0 was an absolute address in the core file, relativize it now, so we can use it as an offset into core_reg_sect. When we're done, "register 0" will be at core_reg_sect+reg_ptr, and we can use register_addr to offset to the other registers. If this is a modern core file without a upage, reg_ptr will be zero and this is all a big NOP. */ if (reg_ptr > core_reg_size) #ifdef KERNEL_U_ADDR reg_ptr -= KERNEL_U_ADDR; #else error ("Old mips core file can't be processed on this machine."); #endif for (regno = 0; regno < NUM_REGS; regno++) { addr = register_addr (regno, reg_ptr); if (addr >= core_reg_size) { if (bad_reg < 0) bad_reg = regno; } else { supply_register (regno, core_reg_sect + addr); } } if (bad_reg >= 0) { error ("Register %s not found in core file.", REGISTER_NAME (bad_reg)); } supply_register (ZERO_REGNUM, zerobuf); /* Frame ptr reg must appear to be 0; it is faked by stack handling code. */ supply_register (DEPRECATED_FP_REGNUM, zerobuf); }
static void store_register (int regno) { /* This isn't really an address. But ptrace thinks of it as one. */ CORE_ADDR regaddr; char mess[128]; /* For messages */ int i; unsigned int offset; /* Offset of registers within the u area. */ int tid; char buf[MAX_REGISTER_SIZE]; if (CANNOT_STORE_REGISTER (regno)) { return; } /* Overload thread id onto process id */ tid = TIDGET (inferior_ptid); if (tid == 0) tid = PIDGET (inferior_ptid); /* no thread id, just use process id */ offset = U_REGS_OFFSET; regaddr = register_addr (regno, offset); /* Put the contents of regno into a local buffer */ regcache_raw_collect (current_regcache, regno, buf); /* Store the local buffer into the inferior a chunk at the time. */ for (i = 0; i < register_size (current_gdbarch, regno); i += sizeof (PTRACE_XFER_TYPE)) { errno = 0; ptrace (PT_WRITE_U, tid, (PTRACE_ARG3_TYPE) regaddr, *(PTRACE_XFER_TYPE *) (buf + i)); regaddr += sizeof (PTRACE_XFER_TYPE); if (errno != 0) { sprintf (mess, "writing register %s (#%d)", REGISTER_NAME (regno), regno); perror_with_name (mess); } } }
enum mi_cmd_result mi_cmd_data_list_register_names (char *command, char **argv, int argc) { int regnum, numregs; int i; struct cleanup *cleanup; /* Note that the test for a valid register must include checking the REGISTER_NAME because NUM_REGS may be allocated for the union of the register sets within a family of related processors. In this case, some entries of REGISTER_NAME will change depending upon the particular processor being debugged. */ numregs = NUM_REGS + NUM_PSEUDO_REGS; cleanup = make_cleanup_ui_out_list_begin_end (uiout, "register-names"); if (argc == 0) /* No args, just do all the regs */ { for (regnum = 0; regnum < numregs; regnum++) { if (REGISTER_NAME (regnum) == NULL || *(REGISTER_NAME (regnum)) == '\0') ui_out_field_string (uiout, NULL, ""); else ui_out_field_string (uiout, NULL, REGISTER_NAME (regnum)); } } /* Else, list of register #s, just do listed regs */ for (i = 0; i < argc; i++) { regnum = atoi (argv[i]); if (regnum < 0 || regnum >= numregs) { do_cleanups (cleanup); mi_error_message = xstrprintf ("bad register number"); return MI_CMD_ERROR; } if (REGISTER_NAME (regnum) == NULL || *(REGISTER_NAME (regnum)) == '\0') ui_out_field_string (uiout, NULL, ""); else ui_out_field_string (uiout, NULL, REGISTER_NAME (regnum)); } do_cleanups (cleanup); return MI_CMD_DONE; }
static void fetch_register (int regno) { /* This isn't really an address. But ptrace thinks of it as one. */ CORE_ADDR regaddr; char mess[128]; /* For messages */ int i; unsigned int offset; /* Offset of registers within the u area. */ char buf[MAX_REGISTER_SIZE]; int tid; if (CANNOT_FETCH_REGISTER (regno)) { memset (buf, '\0', register_size (current_gdbarch, regno)); /* Supply zeroes */ regcache_raw_supply (current_regcache, regno, buf); return; } /* Overload thread id onto process id */ tid = TIDGET (inferior_ptid); if (tid == 0) tid = PIDGET (inferior_ptid); /* no thread id, just use process id */ offset = U_REGS_OFFSET; regaddr = register_addr (regno, offset); for (i = 0; i < register_size (current_gdbarch, regno); i += sizeof (PTRACE_XFER_TYPE)) { errno = 0; *(PTRACE_XFER_TYPE *) &buf[i] = ptrace (PT_READ_U, tid, (PTRACE_ARG3_TYPE) regaddr, 0); regaddr += sizeof (PTRACE_XFER_TYPE); if (errno != 0) { sprintf (mess, "reading register %s (#%d)", REGISTER_NAME (regno), regno); perror_with_name (mess); } } regcache_raw_supply (current_regcache, regno, buf); }
static void store_register (int regno) { int tid; int val; if (CANNOT_STORE_REGISTER (regno)) return; /* GNU/Linux LWP ID's are process ID's. */ tid = TIDGET (inferior_ptid); if (tid == 0) tid = PIDGET (inferior_ptid); /* Not a threaded program. */ errno = 0; regcache_raw_collect (current_regcache, regno, &val); ptrace (PTRACE_POKEUSER, tid, register_addr (regno, 0), val); if (errno != 0) error (_("Couldn't write register %s (#%d): %s."), REGISTER_NAME (regno), regno, safe_strerror (errno)); }
static void inf_ptrace_fetch_register (int regnum) { CORE_ADDR addr; size_t size; PTRACE_TYPE_RET *buf; int pid, i; if (CANNOT_FETCH_REGISTER (regnum)) { regcache_raw_supply (current_regcache, regnum, NULL); return; } /* Cater for systems like GNU/Linux, that implement threads as separate processes. */ pid = ptid_get_lwp (inferior_ptid); if (pid == 0) pid = ptid_get_pid (inferior_ptid); /* This isn't really an address, but ptrace thinks of it as one. */ addr = inf_ptrace_register_u_offset (regnum); size = register_size (current_gdbarch, regnum); gdb_assert ((size % sizeof (PTRACE_TYPE_RET)) == 0); buf = alloca (size); /* Read the register contents from the inferior a chunk at a time. */ for (i = 0; i < size / sizeof (PTRACE_TYPE_RET); i++) { errno = 0; buf[i] = ptrace (PT_READ_U, pid, (PTRACE_TYPE_ARG3)addr, 0); if (errno != 0) error (_("Couldn't read register %s (#%d): %s."), REGISTER_NAME (regnum), regnum, safe_strerror (errno)); addr += sizeof (PTRACE_TYPE_RET); } regcache_raw_supply (current_regcache, regnum, buf); }
static void fetch_register (int regnum) { CORE_ADDR addr; size_t size; PTRACE_TYPE_RET *buf; int tid, i; if (CANNOT_FETCH_REGISTER (regnum)) { regcache_raw_supply (current_regcache, regnum, NULL); return; } /* GNU/Linux LWP ID's are process ID's. */ tid = TIDGET (inferior_ptid); if (tid == 0) tid = PIDGET (inferior_ptid); /* Not a threaded program. */ /* This isn't really an address. But ptrace thinks of it as one. */ addr = register_addr (regnum, U_REGS_OFFSET); size = register_size (current_gdbarch, regnum); gdb_assert ((size % sizeof (PTRACE_TYPE_RET)) == 0); buf = alloca (size); /* Read the register contents from the inferior a chuck at the time. */ for (i = 0; i < size / sizeof (PTRACE_TYPE_RET); i++) { errno = 0; buf[i] = ptrace (PT_READ_U, tid, (PTRACE_TYPE_ARG3) addr, 0); if (errno != 0) error (_("Couldn't read register %s (#%d): %s."), REGISTER_NAME (regnum), regnum, safe_strerror (errno)); addr += sizeof (PTRACE_TYPE_RET); } regcache_raw_supply (current_regcache, regnum, buf); }
static void store_register (int regnum) { CORE_ADDR addr; size_t size; PTRACE_TYPE_RET *buf; int tid, i; if (CANNOT_STORE_REGISTER (regnum)) return; /* GNU/Linux LWP ID's are process ID's. */ tid = TIDGET (inferior_ptid); if (tid == 0) tid = PIDGET (inferior_ptid); /* Not a threaded program. */ /* This isn't really an address. But ptrace thinks of it as one. */ addr = register_addr (regnum, U_REGS_OFFSET); size = register_size (current_gdbarch, regnum); gdb_assert ((size % sizeof (PTRACE_TYPE_RET)) == 0); buf = alloca (size); /* Write the register contents into the inferior a chunk at the time. */ regcache_raw_collect (current_regcache, regnum, buf); for (i = 0; i < size / sizeof (PTRACE_TYPE_RET); i++) { errno = 0; ptrace (PT_WRITE_U, tid, (PTRACE_TYPE_ARG3) addr, buf[i]); if (errno != 0) error (_("Couldn't write register %s (#%d): %s."), REGISTER_NAME (regnum), regnum, safe_strerror (errno)); addr += sizeof (PTRACE_TYPE_RET); } }
/* Store at least register REGNO, or all regs if REGNO == -1. */ void gnu_store_registers (int regno) { struct proc *thread; /* Make sure we know about new threads. */ inf_update_procs (current_inferior); thread = inf_tid_to_thread (current_inferior, PIDGET (inferior_ptid)); if (!thread) error ("Couldn't store registers into thread %d: No such thread", PIDGET (inferior_ptid)); if (regno < I386_NUM_GREGS || regno == -1) { thread_state_t state; thread_state_data_t old_state; int was_aborted = thread->aborted; int was_valid = thread->state_valid; int trace; if (!was_aborted && was_valid) memcpy (&old_state, &thread->state, sizeof (old_state)); state = proc_get_state (thread, 1); if (!state) { warning ("Couldn't store registers into %s", proc_string (thread)); return; } /* Save the T bit. We might try to restore the %eflags register below, but changing the T bit would seriously confuse GDB. */ trace = ((struct i386_thread_state *)state)->efl & 0x100; if (!was_aborted && was_valid) /* See which registers have changed after aborting the thread. */ { int check_regno; for (check_regno = 0; check_regno < I386_NUM_GREGS; check_regno++) if ((thread->fetched_regs & (1 << check_regno)) && memcpy (REG_ADDR (&old_state, check_regno), REG_ADDR (state, check_regno), DEPRECATED_REGISTER_RAW_SIZE (check_regno))) /* Register CHECK_REGNO has changed! Ack! */ { warning ("Register %s changed after the thread was aborted", REGISTER_NAME (check_regno)); if (regno >= 0 && regno != check_regno) /* Update GDB's copy of the register. */ supply_register (check_regno, REG_ADDR (state, check_regno)); else warning ("... also writing this register! Suspicious..."); } } #define fill(state, regno) \ memcpy (REG_ADDR(state, regno), &deprecated_registers[DEPRECATED_REGISTER_BYTE (regno)], \ DEPRECATED_REGISTER_RAW_SIZE (regno)) if (regno == -1) { int i; proc_debug (thread, "storing all registers"); for (i = 0; i < I386_NUM_GREGS; i++) if (deprecated_register_valid[i]) fill (state, i); } else { proc_debug (thread, "storing register %s", REGISTER_NAME (regno)); gdb_assert (deprecated_register_valid[regno]); fill (state, regno); } /* Restore the T bit. */ ((struct i386_thread_state *)state)->efl &= ~0x100; ((struct i386_thread_state *)state)->efl |= trace; } #undef fill if (regno >= I386_NUM_GREGS || regno == -1) { proc_debug (thread, "storing floating-point registers"); store_fpregs (thread, regno); } }
void store_inferior_registers (int regno) { unsigned int regaddr; char buf[80]; int i; unsigned int offset = U_REGS_OFFSET; int scratch; if (regno >= 0) { unsigned int addr, len, offset; if (CANNOT_STORE_REGISTER (regno)) return; offset = 0; len = DEPRECATED_REGISTER_RAW_SIZE (regno); /* Requests for register zero actually want the save_state's ss_flags member. As RM says: "Oh, what a hack!" */ if (regno == 0) { save_state_t ss; addr = HPPAH_OFFSETOF (save_state_t, ss_flags); len = sizeof (ss.ss_flags); /* Note that ss_flags is always an int, no matter what DEPRECATED_REGISTER_RAW_SIZE(0) says. Assuming all HP-UX PA machines are big-endian, put it at the least significant end of the value, and zap the rest of the buffer. */ offset = DEPRECATED_REGISTER_RAW_SIZE (0) - len; } /* Floating-point registers come from the ss_fpblock area. */ else if (regno >= HPPA_FP0_REGNUM) addr = (HPPAH_OFFSETOF (save_state_t, ss_fpblock) + (DEPRECATED_REGISTER_BYTE (regno) - DEPRECATED_REGISTER_BYTE (HPPA_FP0_REGNUM))); /* Wide registers come from the ss_wide area. I think it's more PC to test (ss_flags & SS_WIDEREGS) to select between ss_wide and ss_narrow than to use the raw register size. But checking ss_flags would require an extra ptrace call for every register reference. Bleah. */ else if (len == 8) addr = (HPPAH_OFFSETOF (save_state_t, ss_wide) + DEPRECATED_REGISTER_BYTE (regno)); /* Narrow registers come from the ss_narrow area. Note that ss_narrow starts with gr1, not gr0. */ else if (len == 4) addr = (HPPAH_OFFSETOF (save_state_t, ss_narrow) + (DEPRECATED_REGISTER_BYTE (regno) - DEPRECATED_REGISTER_BYTE (1))); else internal_error (__FILE__, __LINE__, "hppah-nat.c (write_register): unexpected register size"); #ifdef GDB_TARGET_IS_HPPA_20W /* Unbelieveable. The PC head and tail must be written in 64bit hunks or we will get an error. Worse yet, the oddball ptrace/ttrace layering will not allow us to perform a 64bit register store. What a crock. */ if (regno == HPPA_PCOQ_HEAD_REGNUM || regno == HPPA_PCOQ_TAIL_REGNUM && len == 8) { CORE_ADDR temp; temp = *(CORE_ADDR *)&deprecated_registers[DEPRECATED_REGISTER_BYTE (regno)]; /* Set the priv level (stored in the low two bits of the PC. */ temp |= 0x3; ttrace_write_reg_64 (PIDGET (inferior_ptid), (CORE_ADDR)addr, (CORE_ADDR)&temp); /* If we fail to write the PC, give a true error instead of just a warning. */ if (errno != 0) { char *err = safe_strerror (errno); char *msg = alloca (strlen (err) + 128); sprintf (msg, "writing `%s' register: %s", REGISTER_NAME (regno), err); perror_with_name (msg); } return; } /* Another crock. HPUX complains if you write a nonzero value to the high part of IPSW. What will it take for HP to catch a clue about building sensible interfaces? */ if (regno == HPPA_IPSW_REGNUM && len == 8) *(int *)&deprecated_registers[DEPRECATED_REGISTER_BYTE (regno)] = 0; #endif for (i = 0; i < len; i += sizeof (int)) { errno = 0; call_ptrace (PT_WUREGS, PIDGET (inferior_ptid), (PTRACE_ARG3_TYPE) addr + i, *(int *) &deprecated_registers[DEPRECATED_REGISTER_BYTE (regno) + i]); if (errno != 0) { /* Warning, not error, in case we are attached; sometimes the kernel doesn't let us at the registers. */ char *err = safe_strerror (errno); char *msg = alloca (strlen (err) + 128); sprintf (msg, "writing `%s' register: %s", REGISTER_NAME (regno), err); /* If we fail to write the PC, give a true error instead of just a warning. */ if (regno == HPPA_PCOQ_HEAD_REGNUM || regno == HPPA_PCOQ_TAIL_REGNUM) perror_with_name (msg); else warning (msg); return; } } } else for (regno = 0; regno < NUM_REGS; regno++) store_inferior_registers (regno); }
static void fetch_osf_core_registers (char *core_reg_sect, unsigned core_reg_size, int which, CORE_ADDR reg_addr) { int regno; int addr; int bad_reg = -1; /* Table to map a gdb regnum to an index in the core register section. The floating point register values are garbage in OSF/1.2 core files. OSF5 uses different names for the register enum list, need to handle two cases. The actual values are the same. */ static int const core_reg_mapping[ALPHA_NUM_REGS] = { #ifdef NCF_REGS #define EFL NCF_REGS CF_V0, CF_T0, CF_T1, CF_T2, CF_T3, CF_T4, CF_T5, CF_T6, CF_T7, CF_S0, CF_S1, CF_S2, CF_S3, CF_S4, CF_S5, CF_S6, CF_A0, CF_A1, CF_A2, CF_A3, CF_A4, CF_A5, CF_T8, CF_T9, CF_T10, CF_T11, CF_RA, CF_T12, CF_AT, CF_GP, CF_SP, -1, EFL + 0, EFL + 1, EFL + 2, EFL + 3, EFL + 4, EFL + 5, EFL + 6, EFL + 7, EFL + 8, EFL + 9, EFL + 10, EFL + 11, EFL + 12, EFL + 13, EFL + 14, EFL + 15, EFL + 16, EFL + 17, EFL + 18, EFL + 19, EFL + 20, EFL + 21, EFL + 22, EFL + 23, EFL + 24, EFL + 25, EFL + 26, EFL + 27, EFL + 28, EFL + 29, EFL + 30, EFL + 31, CF_PC, -1 #else #define EFL (EF_SIZE / 8) EF_V0, EF_T0, EF_T1, EF_T2, EF_T3, EF_T4, EF_T5, EF_T6, EF_T7, EF_S0, EF_S1, EF_S2, EF_S3, EF_S4, EF_S5, EF_S6, EF_A0, EF_A1, EF_A2, EF_A3, EF_A4, EF_A5, EF_T8, EF_T9, EF_T10, EF_T11, EF_RA, EF_T12, EF_AT, EF_GP, EF_SP, -1, EFL + 0, EFL + 1, EFL + 2, EFL + 3, EFL + 4, EFL + 5, EFL + 6, EFL + 7, EFL + 8, EFL + 9, EFL + 10, EFL + 11, EFL + 12, EFL + 13, EFL + 14, EFL + 15, EFL + 16, EFL + 17, EFL + 18, EFL + 19, EFL + 20, EFL + 21, EFL + 22, EFL + 23, EFL + 24, EFL + 25, EFL + 26, EFL + 27, EFL + 28, EFL + 29, EFL + 30, EFL + 31, EF_PC, -1 #endif }; for (regno = 0; regno < ALPHA_NUM_REGS; regno++) { if (CANNOT_FETCH_REGISTER (regno)) { supply_register (regno, NULL); continue; } addr = 8 * core_reg_mapping[regno]; if (addr < 0 || addr >= core_reg_size) { /* ??? UNIQUE is a new addition. Don't generate an error. */ if (regno == ALPHA_UNIQUE_REGNUM) { supply_register (regno, NULL); continue; } if (bad_reg < 0) bad_reg = regno; } else { supply_register (regno, core_reg_sect + addr); } } if (bad_reg >= 0) { error ("Register %s not found in core file.", REGISTER_NAME (bad_reg)); } }
enum mi_cmd_result mi_cmd_data_list_changed_registers (char *command, char **argv, int argc) { int regnum, numregs, changed; int i; struct cleanup *cleanup; /* Note that the test for a valid register must include checking the REGISTER_NAME because NUM_REGS may be allocated for the union of the register sets within a family of related processors. In this case, some entries of REGISTER_NAME will change depending upon the particular processor being debugged. */ numregs = NUM_REGS; cleanup = make_cleanup_ui_out_list_begin_end (uiout, "changed-registers"); if (argc == 0) /* No args, just do all the regs */ { for (regnum = 0; regnum < numregs; regnum++) { if (REGISTER_NAME (regnum) == NULL || *(REGISTER_NAME (regnum)) == '\0') continue; changed = register_changed_p (regnum); if (changed < 0) { do_cleanups (cleanup); xasprintf (&mi_error_message, "mi_cmd_data_list_changed_registers: Unable to read register contents."); return MI_CMD_ERROR; } else if (changed) ui_out_field_int (uiout, NULL, regnum); } } /* Else, list of register #s, just do listed regs */ for (i = 0; i < argc; i++) { regnum = atoi (argv[i]); if (regnum >= 0 && regnum < numregs && REGISTER_NAME (regnum) != NULL && *REGISTER_NAME (regnum) != '\000') { changed = register_changed_p (regnum); if (changed < 0) { do_cleanups (cleanup); xasprintf (&mi_error_message, "mi_cmd_data_list_register_change: Unable to read register contents."); return MI_CMD_ERROR; } else if (changed) ui_out_field_int (uiout, NULL, regnum); } else { do_cleanups (cleanup); xasprintf (&mi_error_message, "bad register number"); return MI_CMD_ERROR; } } do_cleanups (cleanup); return MI_CMD_DONE; }
/* Fetch a register's value from the process's U area. */ static void fetch_register (int regno) { char buf[MAX_REGISTER_SIZE]; unsigned int addr, len, offset; int i; offset = 0; len = DEPRECATED_REGISTER_RAW_SIZE (regno); /* Requests for register zero actually want the save_state's ss_flags member. As RM says: "Oh, what a hack!" */ if (regno == 0) { save_state_t ss; addr = HPPAH_OFFSETOF (save_state_t, ss_flags); len = sizeof (ss.ss_flags); /* Note that ss_flags is always an int, no matter what DEPRECATED_REGISTER_RAW_SIZE(0) says. Assuming all HP-UX PA machines are big-endian, put it at the least significant end of the value, and zap the rest of the buffer. */ offset = DEPRECATED_REGISTER_RAW_SIZE (0) - len; memset (buf, 0, sizeof (buf)); } /* Floating-point registers come from the ss_fpblock area. */ else if (regno >= HPPA_FP0_REGNUM) addr = (HPPAH_OFFSETOF (save_state_t, ss_fpblock) + (DEPRECATED_REGISTER_BYTE (regno) - DEPRECATED_REGISTER_BYTE (HPPA_FP0_REGNUM))); /* Wide registers come from the ss_wide area. I think it's more PC to test (ss_flags & SS_WIDEREGS) to select between ss_wide and ss_narrow than to use the raw register size. But checking ss_flags would require an extra ptrace call for every register reference. Bleah. */ else if (len == 8) addr = (HPPAH_OFFSETOF (save_state_t, ss_wide) + DEPRECATED_REGISTER_BYTE (regno)); /* Narrow registers come from the ss_narrow area. Note that ss_narrow starts with gr1, not gr0. */ else if (len == 4) addr = (HPPAH_OFFSETOF (save_state_t, ss_narrow) + (DEPRECATED_REGISTER_BYTE (regno) - DEPRECATED_REGISTER_BYTE (1))); else internal_error (__FILE__, __LINE__, "hppa-nat.c (fetch_register): unexpected register size"); for (i = 0; i < len; i += sizeof (int)) { errno = 0; /* Copy an int from the U area to buf. Fill the least significant end if len != raw_size. */ * (int *) &buf[offset + i] = call_ptrace (PT_RUREGS, PIDGET (inferior_ptid), (PTRACE_ARG3_TYPE) addr + i, 0); if (errno != 0) { /* Warning, not error, in case we are attached; sometimes the kernel doesn't let us at the registers. */ char *err = safe_strerror (errno); char *msg = alloca (strlen (err) + 128); sprintf (msg, "reading `%s' register: %s", REGISTER_NAME (regno), err); warning (msg); return; } } /* If we're reading an address from the instruction address queue, mask out the bottom two bits --- they contain the privilege level. */ if (regno == HPPA_PCOQ_HEAD_REGNUM || regno == HPPA_PCOQ_TAIL_REGNUM) buf[len - 1] &= ~0x3; supply_register (regno, buf); }
static void store_register (int tid, int regno) { struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); /* This isn't really an address. But ptrace thinks of it as one. */ CORE_ADDR regaddr = ppc_register_u_addr (regno); int i; size_t bytes_to_transfer; char buf[MAX_REGISTER_SIZE]; if (altivec_register_p (regno)) { store_altivec_register (tid, regno); return; } else if (spe_register_p (regno)) { store_spe_register (tid, regno); return; } if (regaddr == -1) return; /* First collect the register. Keep in mind that the regcache's idea of the register's size may not be a multiple of sizeof (long). */ memset (buf, 0, sizeof buf); bytes_to_transfer = align_up (register_size (current_gdbarch, regno), sizeof (long)); if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE) { /* Little-endian values always sit at the left end of the buffer. */ regcache_raw_collect (current_regcache, regno, buf); } else if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) { /* Big-endian values sit at the right end of the buffer. */ size_t padding = (bytes_to_transfer - register_size (current_gdbarch, regno)); regcache_raw_collect (current_regcache, regno, buf + padding); } for (i = 0; i < bytes_to_transfer; i += sizeof (long)) { errno = 0; ptrace (PTRACE_POKEUSER, tid, (PTRACE_TYPE_ARG3) regaddr, *(long *) &buf[i]); regaddr += sizeof (long); if (errno == EIO && regno == tdep->ppc_fpscr_regnum) { /* Some older kernel versions don't allow fpscr to be written. */ continue; } if (errno != 0) { char message[128]; sprintf (message, "writing register %s (#%d)", REGISTER_NAME (regno), regno); perror_with_name (message); } } }
static void fetch_register (int tid, int regno) { struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); /* This isn't really an address. But ptrace thinks of it as one. */ CORE_ADDR regaddr = ppc_register_u_addr (regno); int bytes_transferred; unsigned int offset; /* Offset of registers within the u area. */ char buf[MAX_REGISTER_SIZE]; if (altivec_register_p (regno)) { /* If this is the first time through, or if it is not the first time through, and we have comfirmed that there is kernel support for such a ptrace request, then go and fetch the register. */ if (have_ptrace_getvrregs) { fetch_altivec_register (tid, regno); return; } /* If we have discovered that there is no ptrace support for AltiVec registers, fall through and return zeroes, because regaddr will be -1 in this case. */ } else if (spe_register_p (regno)) { fetch_spe_register (tid, regno); return; } if (regaddr == -1) { memset (buf, '\0', register_size (current_gdbarch, regno)); /* Supply zeroes */ regcache_raw_supply (current_regcache, regno, buf); return; } /* Read the raw register using sizeof(long) sized chunks. On a 32-bit platform, 64-bit floating-point registers will require two transfers. */ for (bytes_transferred = 0; bytes_transferred < register_size (current_gdbarch, regno); bytes_transferred += sizeof (long)) { errno = 0; *(long *) &buf[bytes_transferred] = ptrace (PTRACE_PEEKUSER, tid, (PTRACE_TYPE_ARG3) regaddr, 0); regaddr += sizeof (long); if (errno != 0) { char message[128]; sprintf (message, "reading register %s (#%d)", REGISTER_NAME (regno), regno); perror_with_name (message); } } /* Now supply the register. Keep in mind that the regcache's idea of the register's size may not be a multiple of sizeof (long). */ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE) { /* Little-endian values are always found at the left end of the bytes transferred. */ regcache_raw_supply (current_regcache, regno, buf); } else if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) { /* Big-endian values are found at the right end of the bytes transferred. */ size_t padding = (bytes_transferred - register_size (current_gdbarch, regno)); regcache_raw_supply (current_regcache, regno, buf + padding); } else internal_error (__FILE__, __LINE__, _("fetch_register: unexpected byte order: %d"), gdbarch_byte_order (current_gdbarch)); }
/* Write given values into registers. The registers and values are given as pairs. The corresponding MI command is -data-write-register-values <format> [<regnum1> <value1>...<regnumN> <valueN>]*/ enum mi_cmd_result mi_cmd_data_write_register_values (char *command, char **argv, int argc) { int regnum; int i; int numregs; LONGEST value; char format; /* Note that the test for a valid register must include checking the REGISTER_NAME because NUM_REGS may be allocated for the union of the register sets within a family of related processors. In this case, some entries of REGISTER_NAME will change depending upon the particular processor being debugged. */ numregs = NUM_REGS + NUM_PSEUDO_REGS; if (argc == 0) { mi_error_message = xstrprintf ("mi_cmd_data_write_register_values: Usage: -data-write-register-values <format> [<regnum1> <value1>...<regnumN> <valueN>]"); return MI_CMD_ERROR; } format = (int) argv[0][0]; if (!target_has_registers) { mi_error_message = xstrprintf ("mi_cmd_data_write_register_values: No registers."); return MI_CMD_ERROR; } if (!(argc - 1)) { mi_error_message = xstrprintf ("mi_cmd_data_write_register_values: No regs and values specified."); return MI_CMD_ERROR; } if ((argc - 1) % 2) { mi_error_message = xstrprintf ("mi_cmd_data_write_register_values: Regs and vals are not in pairs."); return MI_CMD_ERROR; } for (i = 1; i < argc; i = i + 2) { regnum = atoi (argv[i]); if (regnum >= 0 && regnum < numregs && REGISTER_NAME (regnum) != NULL && *REGISTER_NAME (regnum) != '\000') { void *buffer; struct cleanup *old_chain; /* Get the value as a number */ value = parse_and_eval_address (argv[i + 1]); /* Get the value into an array */ buffer = xmalloc (DEPRECATED_REGISTER_SIZE); old_chain = make_cleanup (xfree, buffer); store_signed_integer (buffer, DEPRECATED_REGISTER_SIZE, value); /* Write it down */ deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (regnum), buffer, register_size (current_gdbarch, regnum)); /* Free the buffer. */ do_cleanups (old_chain); } else { mi_error_message = xstrprintf ("bad register number"); return MI_CMD_ERROR; } } return MI_CMD_DONE; }
/* Return a list of register number and value pairs. The valid arguments expected are: a letter indicating the format in which to display the registers contents. This can be one of: x (hexadecimal), d (decimal), N (natural), t (binary), o (octal), r (raw). After the format argumetn there can be a sequence of numbers, indicating which registers to fetch the content of. If the format is the only argument, a list of all the registers with their values is returned. */ enum mi_cmd_result mi_cmd_data_list_register_values (char *command, char **argv, int argc) { int regnum, numregs, format, result; int i; struct cleanup *list_cleanup, *tuple_cleanup; /* Note that the test for a valid register must include checking the REGISTER_NAME because NUM_REGS may be allocated for the union of the register sets within a family of related processors. In this case, some entries of REGISTER_NAME will change depending upon the particular processor being debugged. */ numregs = NUM_REGS + NUM_PSEUDO_REGS; if (argc == 0) { mi_error_message = xstrprintf ("mi_cmd_data_list_register_values: Usage: -data-list-register-values <format> [<regnum1>...<regnumN>]"); return MI_CMD_ERROR; } format = (int) argv[0][0]; list_cleanup = make_cleanup_ui_out_list_begin_end (uiout, "register-values"); if (argc == 1) /* No args, beside the format: do all the regs */ { for (regnum = 0; regnum < numregs; regnum++) { if (REGISTER_NAME (regnum) == NULL || *(REGISTER_NAME (regnum)) == '\0') continue; tuple_cleanup = make_cleanup_ui_out_tuple_begin_end (uiout, NULL); ui_out_field_int (uiout, "number", regnum); result = get_register (regnum, format); if (result == -1) { do_cleanups (list_cleanup); return MI_CMD_ERROR; } do_cleanups (tuple_cleanup); } } /* Else, list of register #s, just do listed regs */ for (i = 1; i < argc; i++) { regnum = atoi (argv[i]); if (regnum >= 0 && regnum < numregs && REGISTER_NAME (regnum) != NULL && *REGISTER_NAME (regnum) != '\000') { tuple_cleanup = make_cleanup_ui_out_tuple_begin_end (uiout, NULL); ui_out_field_int (uiout, "number", regnum); result = get_register (regnum, format); if (result == -1) { do_cleanups (list_cleanup); return MI_CMD_ERROR; } do_cleanups (tuple_cleanup); } else { do_cleanups (list_cleanup); mi_error_message = xstrprintf ("bad register number"); return MI_CMD_ERROR; } } do_cleanups (list_cleanup); return MI_CMD_DONE; }
void store_inferior_registers (register int regno) { thread_state_data_t state; kern_return_t ret; if (!MACH_PORT_VALID (current_thread)) error ("store inferior registers: Invalid thread"); /* Check for read only regs. * @@ If some of these is can be changed, fix this */ if (regno == ZERO_REGNUM || regno == PS_REGNUM || regno == BADVADDR_REGNUM || regno == CAUSE_REGNUM || regno == FCRIR_REGNUM) { message ("You can not alter read-only register `%s'", REGISTER_NAME (regno)); fetch_inferior_registers (regno); return; } if (regno == -1) { /* Don't allow these to change */ /* ZERO_REGNUM */ *(int *) registers = 0; fetch_inferior_registers (PS_REGNUM); fetch_inferior_registers (BADVADDR_REGNUM); fetch_inferior_registers (CAUSE_REGNUM); fetch_inferior_registers (FCRIR_REGNUM); } if (regno == -1 || (ZERO_REGNUM < regno && regno <= PC_REGNUM)) { #if 1 /* Mach 3.0 saves thread's FP to MACH_FP_REGNUM. * GDB wants assigns a pseudo register FP_REGNUM for frame pointer. * * @@@ Here I assume (!) that gdb's FP has the value that * should go to threads frame pointer. If not true, this * fails badly!!!!! */ memcpy (®isters[REGISTER_BYTE (MACH_FP_REGNUM)], ®isters[REGISTER_BYTE (FP_REGNUM)], REGISTER_RAW_SIZE (FP_REGNUM)); #endif /* Save gdb's regs 1..31 to thread saved regs 1..31 * Luckily, they are contiquous */ STORE_REGS (state, 1, 31); /* Save mdlo, mdhi */ STORE_REGS (state, LO_REGNUM, 2); /* Save PC */ STORE_REGS (state, PC_REGNUM, 1); ret = thread_set_state (current_thread, MIPS_THREAD_STATE, state, MIPS_FLOAT_STATE_COUNT); CHK ("store inferior regs : thread_set_state", ret); } if (regno == -1 || regno >= FP0_REGNUM) { /* If thread has floating state, save it */ if (read_register (PS_REGNUM) & MIPS_STATUS_USE_COP1) { /* Do NOT save FCRIR_REGNUM */ STORE_REGS (state, FP0_REGNUM, 33); ret = thread_set_state (current_thread, MIPS_FLOAT_STATE, state, MIPS_FLOAT_STATE_COUNT); CHK ("store inferior registers (floats): thread_set_state", ret); } else if (regno != -1) message ("Thread does not use floating point unit, floating regs not saved"); } }