Esempio n. 1
0
			STM_PAD_SYSCONF(SYSCONF(29), 2, 4, 0),
			/* ENMIIx */
			STM_PAD_SYSCONF(SYSCONF(29), 5, 5, 1),
		},
		.custom_claim	= stih415_gmac1_claim,
		.custom_release	= stih415_gmac1_release,
	},
};

static struct stm_pad_config stih415_ethernet_rgmii_pad_configs[] = {
	[0] =  {
		.gpios_num = 16,
		.gpios = (struct stm_pad_gpio []) {
			PHY_CLOCK(13, 5, 4, RET_NICLK(0, 1)),/* GTXCLK */

			DATA_OUT(13, 7, 2, RET_DE_IO(0, 0)),/* TXEN */

			DATA_OUT(14, 0, 2, RET_DE_IO(1000, 0)),/* TXD[0] */
			DATA_OUT(14, 1, 2, RET_DE_IO(1000, 0)),/* TXD[1] */
			DATA_OUT(14, 2, 2, RET_DE_IO(1000, 1)),/* TXD[2] */
			DATA_OUT(14, 3, 2, RET_DE_IO(1000, 1)),/* TXD[3] */

			/* TX Clock inversion is not set for 1000Mbps */
			CLOCK_IN(15, 0, 2, RET_NICLK(0, 0)),/* TXCLK */
			MDIO(15, 4, 2, RET_BYPASS(0)),/* MDIO */
			MDC(15, 5, 2, RET_NICLK(0, 1)),/* MDC */
			DATA_IN(15, 6, 2, RET_DE_IO(500, 0)),/* RXDV */

			DATA_IN(16, 0, 2, RET_DE_IO(500, 0)),/* RXD[0] */
			DATA_IN(16, 1, 2, RET_DE_IO(500, 0)),/* RXD[1] */
			DATA_IN(16, 2, 2, RET_DE_IO(500, 0)),/* RXD[2] */
Esempio n. 2
0
		.sysconfs = (struct stm_pad_sysconf []) {
			/* EN_GMAC1 */
			STM_PAD_SYS_CFG_BANK(4, 67, 0, 0, 1),
			/* MIIx_PHY_SEL */
			STM_PAD_SYS_CFG_BANK(4, 23, 2, 4, 0),
			/* ENMIIx */
			STM_PAD_SYS_CFG_BANK(4, 23, 5, 5, 1),
		},
	},
};

static struct stm_pad_config stx7108_ethernet_rgmii_pad_configs[] = {
	[0] =  {
		.gpios_num = 17,
		.gpios = (struct stm_pad_gpio []) {
			DATA_OUT(0, 6, 0, RET_DE_IO(0, 0)),/* TXD[0] */
			DATA_OUT(0, 6, 1, RET_DE_IO(0, 0)),/* TXD[1] */
			DATA_OUT(0, 6, 2, RET_DE_IO(0, 0)),/* TXD[2] */
			DATA_OUT(0, 6, 3, RET_DE_IO(0, 0)),/* TXD[3] */
			DATA_OUT(0, 7, 1, RET_DE_IO(0, 0)),/* TXEN */
			/* TX Clock inversion is not set for 1000Mbps */
			TX_CLOCK(0, 7, 2, RET_NICLK(0, 0)),/* TXCLK */
			DATA_IN(0, 7, 3, RET_BYPASS(0)),/* COL */
			DATA_OUT_PU(0, 7, 4, RET_BYPASS(3000)),/* MDIO */
			CLOCK_OUT(0, 7, 5, RET_NICLK(0, 0)),/* MDC */
			DATA_IN(0, 7, 7, RET_BYPASS(0)), /* MDINT */
			DATA_IN(0, 8, 0, RET_DE_IO(0, 0)),/* RXD[0] */
			DATA_IN(0, 8, 1, RET_DE_IO(0, 0)),/* RXD[1] */
			DATA_IN(0, 8, 2, RET_DE_IO(0, 0)),/* RXD[2] */
			DATA_IN(0, 8, 3, RET_DE_IO(0, 0)),/* RXD[3] */
			DATA_IN(0, 9, 0, RET_DE_IO(0, 0)),/* RXDV */