/******************************************************************************
* Outline : ConfigureOperatingFrequency
* Description : Configures the clock settings for each of the device clocks
* : The RX is clocked by a 12 MHz oscillator provided by
* EPSON. EPSON also provides the 32 kHz oscillator used by
* the Real-Time Clock (RTC) and the 25 MHz crystal that drives
* the PHY for Ethernet communications.
* Argument : none
* Return value : none
******************************************************************************/
void ConfigureOperatingFrequency(void)
{
/* Declare error flag */
bool err = true;
/* Modify the MCU clocks, all are based off Epson 12 MHz clock */
err &= R_CGC_Set
(
12E6,
96E6,
48E6,
24E6,
PDL_NO_DATA
);
/*
Clock Description Frequency
----------------------------------------
Input Clock Frequency..............12MHz
Internal Clock Frequency...........96MHz
Peripheral Clock Frequency.........48MHz
External Bus Clock Frequency.......24MHz */
/* Halt in while loop when RPDL errors detected */
while (!err);
}
/******************************************************************************
* ID :
*
* Include :
*
* Declaration : bool R_PG_Clock_Set(void)
*
* Function Name: R_PG_Clock_Set
*
* Description : Set up the clocks
*
* Arguments : None
*
* Return Value : true : Setting was made correctly.
* : false : Setting failed.
*
* Calling Functions : R_CGC_Set
*
* Details : Please refer to the Reference Manual.
******************************************************************************/
bool R_PG_Clock_Set(void)
{
return R_CGC_Set(
12000000,
96000000,
48000000,
24000000,
PDL_CGC_BCLK_DIV_1 | PDL_CGC_OSC_STOP_DISABLE
);
}
void ConfigureOperatingFrequency(void)
{
bool err = true;
//Configure the PLL to use the 20.0 MHz crystal as clock input
err &= R_CGC_Set
(
PDL_CGC_CLK_MAIN,
PDL_CGC_BCLK_DIV_1 | PDL_CGC_MAIN_RESONATOR,
20E6,
20E6,
20E6,
20E6,
20E6,
PDL_NO_DATA
);
/* Configure the clocks as follows -
Clock Description Frequency
----------------------------------------
PLL Clock frequency...............100MHz
System Clock Frequency.............50MHz
Peripheral Module Clock B..........25MHz
Peripheral Module Clock D..........50MHz
FlashIF Clock......................25MHz
External Bus Clock.................25MHz */
err &= R_CGC_Set
(
PDL_CGC_CLK_PLL,
PDL_CGC_BCLK_DIV_2,
100E6,
50E6,
50E6,
25E6,
25E6,
25E6
);
// Allow 100us for the main clock to stabilize
err &= R_CMT_CreateOneShot
(
0,
PDL_NO_DATA,
100E-6,
PDL_NO_FUNC,
0
);
// Change to high-speed operating mode
err &= R_LPC_Control(
PDL_LPC_CHANGE_HIGH_SPEED
);
// Select the PLL as the clock source
err &= R_CGC_Control
(
PDL_CGC_CLK_PLL,
PDL_CGC_SUB_CLOCK_CL_STANDARD,
PDL_CGC_SUB_CLOCK_ENABLE
);
while(!err)
;
}
