static int StateAction(StateMem *sm, int load, int data_only)
{
SFORMAT StateRegs[] =
{
SFVAR(z80_runtime),
SFARRAY(CPUExRAM, 16384),
SFVAR(FlashStatusEnable),
SFEND
};
SFORMAT TLCS_StateRegs[] =
{
SFVARN(pc, "PC"),
SFVARN(sr, "SR"),
SFVARN(f_dash, "F_DASH"),
SFARRAY32N(gpr, 4, "GPR"),
SFARRAY32N(gprBank[0], 4, "GPRB0"),
SFARRAY32N(gprBank[1], 4, "GPRB1"),
SFARRAY32N(gprBank[2], 4, "GPRB2"),
SFARRAY32N(gprBank[3], 4, "GPRB3"),
SFEND
};
if(!MDFNSS_StateAction(sm, load, data_only, StateRegs, "MAIN"))
return(0);
if(!MDFNSS_StateAction(sm, load, data_only, TLCS_StateRegs, "TLCS"))
return(0);
if(!MDFNNGPCDMA_StateAction(sm, load, data_only))
return(0);
if(!MDFNNGPCSOUND_StateAction(sm, load, data_only))
return(0);
if(!NGPGfx->StateAction(sm, load, data_only))
return(0);
if(!MDFNNGPCZ80_StateAction(sm, load, data_only))
return(0);
if(!int_timer_StateAction(sm, load, data_only))
return(0);
if(!BIOSHLE_StateAction(sm, load, data_only))
return(0);
if(!FLASH_StateAction(sm, load, data_only))
return(0);
if(load)
{
RecacheFRM();
changedSP();
}
return(1);
}
static void StateAction(StateMem *sm, const unsigned load, const bool data_only)
{
SFORMAT StateRegs[] =
{
SFVAR(z80_runtime),
SFARRAY(CPUExRAM, 16384),
SFVAR(FlashStatusEnable),
SFEND
};
SFORMAT TLCS_StateRegs[] =
{
SFVARN(pc, "PC"),
SFVARN(sr, "SR"),
SFVARN(f_dash, "F_DASH"),
SFARRAY32N(gpr, 4, "GPR"),
SFARRAY32N(gprBank[0], 4, "GPRB0"),
SFARRAY32N(gprBank[1], 4, "GPRB1"),
SFARRAY32N(gprBank[2], 4, "GPRB2"),
SFARRAY32N(gprBank[3], 4, "GPRB3"),
SFEND
};
MDFNSS_StateAction(sm, load, data_only, StateRegs, "MAIN");
MDFNSS_StateAction(sm, load, data_only, TLCS_StateRegs, "TLCS");
MDFNNGPCDMA_StateAction(sm, load, data_only);
MDFNNGPCSOUND_StateAction(sm, load, data_only);
NGPGfx->StateAction(sm, load, data_only);
MDFNNGPCZ80_StateAction(sm, load, data_only);
int_timer_StateAction(sm, load, data_only);
BIOSHLE_StateAction(sm, load, data_only);
FLASH_StateAction(sm, load, data_only);
if(load)
{
RecacheFRM();
changedSP();
}
}
static void* translate_address_write(uint32 address)
{
address &= 0xFFFFFF;
if (memory_unlock_flash_write)
{
//ROM (LOW)
if (address >= ROM_START && address <= ROM_END)
{
if (address < ROM_START + ngpc_rom.length)
return ngpc_rom.data + (address - ROM_START);
else
return NULL;
}
//ROM (HIGH)
if (address >= HIROM_START && address <= HIROM_END)
{
if (address < HIROM_START + (ngpc_rom.length - 0x200000))
return ngpc_rom.data + 0x200000 + (address - HIROM_START);
else
return NULL;
}
}
else
{
//ROM (LOW)
if (address >= ROM_START && address <= ROM_END)
{
//Ignore Flash commands
if (address == 0x202AAA || address == 0x205555)
{
// system_debug_message("%06X: Enable Flash command from %06X", pc, address);
memory_flash_command = TRUE;
return NULL;
}
//Set Flash status reading?
if (address == 0x220000 || address == 0x230000)
{
// system_debug_message("%06X: Flash status read from %06X", pc, address);
FlashStatusEnable = TRUE;
RecacheFRM();
return NULL;
}
if (memory_flash_command)
{
//Write the 256byte block around the flash data
flash_write(address & 0xFFFF00, 256);
//Need to issue a new command before writing will work again.
memory_flash_command = FALSE;
// system_debug_message("%06X: Direct Flash write to %06X", pc, address & 0xFFFF00);
// system_debug_stop();
//Write to the rom itself.
if (address < ROM_START + ngpc_rom.length)
return ngpc_rom.data + (address - ROM_START);
}
}
}
// ===================================
return NULL;
}