void PS_CPU::Power(void)
{
memset(GPR, 0, sizeof(GPR));
memset(&CP0, 0, sizeof(CP0));
LO = 0;
HI = 0;
gte_ts_done = 0;
BACKED_PC = 0xBFC00000;
BACKED_new_PC = 4;
BACKED_new_PC_mask = ~0U;
BACKED_LDWhich = 0x20;
BACKED_LDValue = 0;
CP0.SR |= (1 << 22); // BEV
CP0.SR |= (1 << 21); // TS
CP0.PRID = 0x300; // PRId: FIXME(test on real thing)
RecalcIPCache();
GTE_Power();
}
void PS_CPU::AssertIRQ(int which, bool asserted)
{
assert(which >= 0 && which <= 5);
CP0.CAUSE &= ~(1 << (10 + which));
if(asserted)
CP0.CAUSE |= 1 << (10 + which);
RecalcIPCache();
}
void PS_CPU::Power(void)
{
memset(GPR, 0, sizeof(GPR));
memset(&CP0, 0, sizeof(CP0));
LO = 0;
HI = 0;
gte_ts_done = 0;
BACKED_PC = 0xBFC00000;
BACKED_new_PC = 4;
BACKED_new_PC_mask = ~0U;
BACKED_LDWhich = 0x20;
BACKED_LDValue = 0;
CP0.SR |= (1 << 22); // BEV
CP0.SR |= (1 << 21); // TS
CP0.PRID = 0x2;
RecalcIPCache();
BIU = 0;
#if PS_CPU_EMULATE_ICACHE
// Not quite sure about these poweron/reset values:
for(unsigned i = 0; i < 1024; i++)
{
ICache[i].TV = 0x2 | ((BIU & 0x800) ? 0x0 : 0x1);
ICache[i].Data = 0;
}
#endif
GTE_Power();
}
void PS_CPU::SetHalt(bool status)
{
Halted = status;
RecalcIPCache();
}
