void s5p6440_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) { /* */ s3c_gpio_cfgrange_nopull(S5P6440_GPC(4), 2, S3C_GPIO_SFN(3)); /* */ s3c_gpio_cfgrange_nopull(S5P6440_GPH(6), 4, S3C_GPIO_SFN(3)); }
int s3c64xx_spi1_cfg_gpio(struct platform_device *dev) { if (soc_is_s5p6450()) s3c_gpio_cfgall_range(S5P6450_GPC(4), 3, S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); else s3c_gpio_cfgall_range(S5P6440_GPC(4), 3, S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); return 0; }
.ngpio = S5P6440_GPIO_A_NR, .label = "GPA", }, }, { .base = S5P64X0_GPB_BASE, .config = &s5p64x0_gpio_cfgs[1], .chip = { .base = S5P6440_GPB(0), .ngpio = S5P6440_GPIO_B_NR, .label = "GPB", }, }, { .base = S5P64X0_GPC_BASE, .config = &s5p64x0_gpio_cfgs[1], .chip = { .base = S5P6440_GPC(0), .ngpio = S5P6440_GPIO_C_NR, .label = "GPC", }, }, { .base = S5P64X0_GPG_BASE, .config = &s5p64x0_gpio_cfgs[1], .chip = { .base = S5P6440_GPG(0), .ngpio = S5P6440_GPIO_G_NR, .label = "GPG", }, }, }; static struct s3c_gpio_chip s5p6440_gpio_4bit2[] = {