void s5p6440_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) { /* */ s3c_gpio_cfgrange_nopull(S5P6440_GPC(4), 2, S3C_GPIO_SFN(3)); /* */ s3c_gpio_cfgrange_nopull(S5P6440_GPH(6), 4, S3C_GPIO_SFN(3)); }
void s5p64x0_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) { struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; /* */ if (soc_is_s5p6450()) s3c_gpio_cfgrange_nopull(S5P6450_GPH(0), 2, S3C_GPIO_SFN(2)); else s3c_gpio_cfgrange_nopull(S5P6440_GPH(0), 2 , S3C_GPIO_SFN(2)); switch (width) { case 8: /* */ if (soc_is_s5p6450()) s3c_gpio_cfgrange_nopull(S5P6450_GPH(6), 4, S3C_GPIO_SFN(2)); else s3c_gpio_cfgrange_nopull(S5P6440_GPH(6), 4, S3C_GPIO_SFN(2)); case 4: /* */ if (soc_is_s5p6450()) s3c_gpio_cfgrange_nopull(S5P6450_GPH(2), 4, S3C_GPIO_SFN(2)); else s3c_gpio_cfgrange_nopull(S5P6440_GPH(2), 4, S3C_GPIO_SFN(2)); default: break; } /* */ if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { if (soc_is_s5p6450()) { s3c_gpio_setpull(S5P6450_GPG(6), S3C_GPIO_PULL_UP); s3c_gpio_cfgpin(S5P6450_GPG(6), S3C_GPIO_SFN(3)); } else { s3c_gpio_setpull(S5P6440_GPG(6), S3C_GPIO_PULL_UP); s3c_gpio_cfgpin(S5P6440_GPG(6), S3C_GPIO_SFN(3)); } } }
.base = S5P64X0_GPG_BASE, .config = &s5p64x0_gpio_cfgs[1], .chip = { .base = S5P6440_GPG(0), .ngpio = S5P6440_GPIO_G_NR, .label = "GPG", }, }, }; static struct s3c_gpio_chip s5p6440_gpio_4bit2[] = { { .base = S5P64X0_GPH_BASE + 0x4, .config = &s5p64x0_gpio_cfgs[1], .chip = { .base = S5P6440_GPH(0), .ngpio = S5P6440_GPIO_H_NR, .label = "GPH", }, }, }; static struct s3c_gpio_chip s5p6440_gpio_rbank_4bit2[] = { { .base = S5P64X0_GPR_BASE + 0x4, .config = &s5p64x0_gpio_cfgs[2], .chip = { .base = S5P6440_GPR(0), .ngpio = S5P6440_GPIO_R_NR, .label = "GPR", },