/**
* @brief CPU L1-Cache enable.
* @param None
* @retval None
*/
static void CPU_CACHE_Enable(void)
{
/* Enable I-Cache */
SCB_EnableICache();
/* Enable D-Cache */
SCB_EnableDCache();
}
/**
* \brief usb_massstorage Application entry point.
*
* Configures UART,
* Configures TC0, USB MSD Driver and run it.
*
* \return Unused (ANSI-C compatibility).
*/
int main( void )
{
sSdCard *pSd = 0;
/* Disable watchdog */
WDT_Disable( WDT ) ;
SCB_EnableICache();
SCB_EnableDCache();
#if defined LUN_RAMDISK
/* Enable SDRAM */
BOARD_ConfigureSdram();
#endif
TRACE_INFO("-- USB Device Mass Storage Example %s --\n\r", SOFTPACK_VERSION);
TRACE_INFO("-- %s\n\r", BOARD_NAME);
TRACE_INFO("-- Compiled: %s %s --\n\r", __DATE__, __TIME__);
/* If they are present, configure Vbus & Wake-up pins */
PIO_InitializeInterrupts(0);
/* Initialize all USB power (off) */
_ConfigureUotghs();
/* Initialize PIO pins */
_ConfigurePIOs();
/* Initialize drivers */
_ConfigureDrivers();
_MemoriesInitialize(pSd);
/* BOT driver initialization */
MSDDriver_Initialize(&msdDriverDescriptors, luns, MAX_LUNS);
/* connect if needed */
USBD_Connect();
while (1) {
/* Mass storage state machine */
if (USBD_GetState() < USBD_STATE_CONFIGURED){}
else
{
MSDDriver_StateMachine();
if (msdRefresh)
{
msdRefresh = 0;
if (msdWriteTotal < 50 * 1000)
{
/* Flush Disk Media */
}
msdWriteTotal = 0;
}
}
}
}
/**
* \brief Application entry point for UART example.
*
* \return Unused (ANSI-C compatibility).
*/
extern int main(void)
{
uint8_t ucKey;
/* Disable watchdog */
WDT_Disable(WDT);
/* Output example information */
printf("-- UART Example %s --\n\r", SOFTPACK_VERSION);
printf("-- %s\n\r", BOARD_NAME);
printf("-- Compiled: %s %s With %s--\n\r", __DATE__, __TIME__, COMPILER_NAME);
/* Enable I and D cache */
SCB_EnableICache();
SCB_EnableDCache();
/* Display menu */
DisplayMenu();
while (1) {
ucKey = DBG_GetChar();
switch (ucKey) {
case 'h':
DisplayMenu();
break;
case 'i':
case 'I':
printf("\n\rSending Tx Buffer.. \n\r");
UartTransfer();
break;
case 'd':
case 'D':
memset(pRxBuffer,'X' ,30);
pRxBuffer[28] = '\n';
pRxBuffer[29] = '\r';
printf("\n\rRx Buffer before transfer is \n\r");
puts((char*)pRxBuffer);
_UartdConfigLB();
UARTD_EnableRxChannels(&Uartd, &UartRx);
UARTD_EnableTxChannels(&Uartd, &UartTx);
UARTD_RcvData(&Uartd);
UARTD_SendData(&Uartd);
printf("\n\rRx Buffer after transfer is \n\r");
while (Uartd.pRxChannel->sempaphore == 0);
puts((char*)pRxBuffer);
UARTD_DisableRxChannels(&Uartd, &UartRx);
UARTD_DisableTxChannels(&Uartd, &UartTx);
break;
default :
break;
}
}
}
static void prvSetupHardware( void )
{
/* Disable watchdog. */
WDT_Disable( WDT );
WDT_Disable( ( Wdt * ) RSWDT );
SCB_EnableICache();
SCB_EnableDCache();
LED_Configure( 0 );
LED_Configure( 1 );
}
/**
* @brief CPU L1-Cache enable.
* @param None
* @retval None
*/
static void CPU_CACHE_Enable(void)
{
/* Enable branch prediction */
SCB->CCR |= (1 <<18);
__DSB();
/* Enable I-Cache */
SCB_EnableICache();
/* Enable D-Cache */
SCB_EnableDCache();
}
void
SystemInit ()
{
#ifdef __USE_FPU__
/* Initialize FPU */
FpuInit ();
#endif
#ifdef __USE_CACHE__
/* Enable Instruction Cache */
SCB_EnableICache ();
/* Enable Data Cache */
SCB_EnableDCache ();
#endif
}
void system_init(void)
{
SCB_EnableICache();
SCB_EnableDCache();
DBG_INIT();
init_system_clock();
HAL_Init();
BSP_SDRAM_Init();
BSP_LED_Init(LED1);
BSP_PB_Init(BUTTON_KEY, BUTTON_MODE_GPIO);
MX_FATFS_Init();
FRESULT res = f_mount(&ctx.fs, SD_Path, 0);
ASSERT_WARN(res == FR_OK);
gui_init();
}
/**
* Initializes the DBGU and ISO7816 driver, and starts some tests.
* \return Unused (ANSI-C compatibility)
*/
extern int main( void )
{
uint8_t pAtr[MAX_ATR_SIZE];
uint8_t ucSize;
/* Disable watchdog*/
WDT_Disable(WDT);
SCB_EnableICache();
SCB_EnableDCache();
/* Initialize Atr buffer */
memset(pAtr, 0, sizeof(pAtr));
printf("-- USART ISO7816 Example %s --\n\r", SOFTPACK_VERSION);
printf("-- %s\n\r", BOARD_NAME);
printf("-- Compiled: %s %s With %s--\n\r", __DATE__, __TIME__, COMPILER_NAME);
/* Configure IT on Smart Card */
ConfigureCardDetection();
/* Configure ISO7816 driver */
PIO_Configure(pinsISO7816, PIO_LISTSIZE(pinsISO7816));
ISO7816_Init(USART, ID_USART, pinIso7816RstMC);
/* Read ATR */
ISO7816_warm_reset();
ISO7816_Datablock_ATR(pAtr, &ucSize);
/* Decode ATR */
ISO7816_Decode_ATR(pAtr);
/* Allow user to send some commands */
SendReceiveCommands();
return 0;
}
/**
* @brief CPU L1-Cache enable.
* Invalidate Data cache before enabling
* Enable Data & Instruction Cache
* @param None
* @retval None
*/
static void CPU_CACHE_Enable(void){
(*(uint32_t *) 0xE000ED94) &= ~0x5;
(*(uint32_t *) 0xE000ED98) = 0x0; //MPU->RNR
(*(uint32_t *) 0xE000ED9C) = 0x20010000 |1<<4; //MPU->RBAR
(*(uint32_t *) 0xE000EDA0) = 0<<28 | 3 <<24 | 0<<19 | 0<<18 | 1<<17 | 0<<16 | 0<<8 | 30<<1 | 1<<0 ; //MPU->RASE WT
(*(uint32_t *) 0xE000ED94) = 0x5;
/* Invalidate I-Cache : ICIALLU register*/
SCB_InvalidateICache();
/* Enable branch prediction */
SCB->CCR |= (1 <<18);
__DSB();
/* Enable I-Cache */
SCB_EnableICache();
/* Enable D-Cache */
SCB_InvalidateDCache();
SCB_EnableDCache();
}
// BSP functions =============================================================
void BSP::init(void) {
// NOTE: SystemInit() has been already called from the startup code
// but SystemCoreClock needs to be updated
SystemCoreClockUpdate();
// NOTE: The VFP (hardware Floating Point) unit is configured by FreeRTOS */
SCB_EnableICache(); // Enable I-Cache
SCB_EnableDCache(); // Enable D-Cache
// Configure Flash prefetch and Instr. cache through ART accelerator
#if (ART_ACCLERATOR_ENABLE != 0)
__HAL_FLASH_ART_ENABLE();
#endif // ART_ACCLERATOR_ENABLE
/* Configure the LEDs */
BSP_LED_Init(LED1);
BSP_LED_Init(LED2);
BSP_LED_Init(LED3);
// Configure the User Button in GPIO Mode
BSP_PB_Init(BUTTON_KEY, BUTTON_MODE_GPIO);
//...
BSP::randomSeed(1234U);
// initialize the QS software tracing...
if (!QS_INIT((void *)0)) {
Q_ERROR();
}
QS_OBJ_DICTIONARY(&l_TickHook);
QS_OBJ_DICTIONARY(&l_EXTI0_IRQHandler);
QS_USR_DICTIONARY(PHILO_STAT);
QS_USR_DICTIONARY(PAUSED_STAT);
QS_USR_DICTIONARY(COMMAND_STAT);
}
/**
* \brief Application entry point for PWM with PDC example.
*
* Outputs a PWM on LED1.
* Channel #0 is configured as synchronous channels.
* The update of the duty cycle values is made automatically by the Peripheral DMA Controller.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
uint32_t i;
/* Disable watchdog */
WDT_Disable( WDT ) ;
/* Enable I and D cache */
SCB_EnableICache();
SCB_EnableDCache();
/* Output example information */
printf("-- PWM with DMA Example %s --\n\r", SOFTPACK_VERSION);
printf("-- %s\n\r", BOARD_NAME);
printf("-- Compiled: %s %s --\n\r", __DATE__, __TIME__);
/* PIO configuration */
PIO_Configure(pinPwm, PIO_LISTSIZE(pinPwm));
for (i= 0; i< DUTY_BUFFER_LENGTH; i++) dwDutys[i] = i/2;
/* Enable PWMC peripheral clock */
PMC_EnablePeripheral(ID_PWM0);
/* Configure interrupt for PWM transfer */
NVIC_DisableIRQ(PWM0_IRQn);
NVIC_ClearPendingIRQ(PWM0_IRQn);
NVIC_SetPriority(PWM0_IRQn, 0);
/* Configure DMA channel for PWM transfer */
_ConfigureDma();
/* Set clock A to run at PWM_FREQUENCY * MAX_DUTY_CYCLE (clock B is not used) */
PWMC_ConfigureClocks(PWM0, PWM_FREQUENCY * MAX_DUTY_CYCLE , 0, BOARD_MCK);
/* Configure PWMC channel for LED0 (left-aligned, enable dead time generator) */
PWMC_ConfigureChannel( PWM0,
0, /* channel */
PWM_CMR_CPRE_CLKA, /* prescaler, CLKA */
0, /* alignment */
0 /* polarity */
);
PWMC_ConfigureSyncChannel(PWM0,
(1 << CHANNEL_PWM_LED0), /* Define the synchronous channels by the bits SYNCx */
PWM_SCM_UPDM_MODE2, /* Select the manual write of duty-cycle values and the automatic update by setting the field UPDM to 鈥�1鈥� */
0,
0);
/* Configure channel 0 period */
PWMC_SetPeriod(PWM0, 0, DUTY_BUFFER_LENGTH);
/* Configure channel 0 duty cycle */
PWMC_SetDutyCycle(PWM0, 0, MIN_DUTY_CYCLE);
/* Define the update period by the field UPR in the PWM_SCUP register*/
PWMC_SetSyncChannelUpdatePeriod(PWM0, 8);
/* Enable the synchronous channels by writing CHID0 in the PWM_ENA register */
PWMC_EnableChannel(PWM0, 0);
/* Enable PWM interrupt */
PWMC_EnableIt(PWM0, 0, PWM_IER2_WRDY);
NVIC_EnableIRQ(PWM0_IRQn);
_PwmDmaTransfer();
while(1);
}
/**
* \brief Application entry point.
*
* \return Unused (ANSI-C compatibility).
*/
extern int main(void)
{
uint8_t ucKey;
/* Disable watchdog */
WDT_Disable(WDT);
SCB_EnableICache();
SCB_EnableDCache();
/* Output example information */
printf("-- USART LON Example %s --\n\r", SOFTPACK_VERSION);
printf("-- %s\n\r", BOARD_NAME);
printf("-- Compiled: %s %s With %s--\n\r", __DATE__, __TIME__, COMPILER_NAME);
/* Configure pins */
PIO_Configure(pins, PIO_LISTSIZE(pins));
/* PB4 function selected */
MATRIX->MATRIX_WPMR = MATRIX_WPMR_WPKEY_PASSWD;
MATRIX->CCFG_SYSIO |= CCFG_SYSIO_SYSIO4;
/* Display menu */
_DisplayMenu();
/* Configure DMA with IRQ */
_ConfigureDma();
Buffer[0] = sizeof(palette) - 1; /* LON Data Length: */
Buffer[1] = US_LONL2HDR_BLI(2);
memcpy(&Buffer[2], palette, sizeof(palette));
/* configure USART in LON mode*/
_ConfigureUsart();
NVIC_EnableIRQ(XDMAC_IRQn);
while (1) {
ucKey = DBG_GetChar();
switch (ucKey) {
case 't':
case 'T':
printf("-I- LON Transmitting ... \n\r");
USART->US_CR = US_CR_RSTSTA; /* Reset Status Bits */
_DmaUsartTx();
while (!transDone);
printf("-I- LON Transmitting completed \n\r");
transDone = 0;
break;
case 'r':
case 'R':
printf("-I- LON receiving ... \n\r");
USART->US_CR = US_CR_RSTSTA; /* Reset Status Bits */
recvDone = 0;
_DmaUsartRx();
while (!recvDone);
/* successfully received */
_DumpInfo(pRecvBufferUSART, BUFFER_SIZE - 1);
printf("\n\r-I- LON Receiving completed \n\r");
memset(pRecvBufferUSART, 0, sizeof(pRecvBufferUSART));
break;
case 'm':
case 'M':
_DisplayMenu();
break;
}
}
}
/**
* \brief usart-hw-handshaking Application entry point..
*
* Configures USART in hardware handshaking mode and
* Timer Counter 0 to generate an interrupt every second. Then, start the first
* transfer on the USART and wait in an endless loop.
*
* \return Unused (ANSI-C compatibility).
*/
int main( void )
{
char pbaud_time[8];
uint32_t BytesRead, BytesToRead, baudrate, timeout, TxBytesLeft;
uint8_t AppBufferRollOver = 0;
uint8_t *pTxBuff;
/* Disable watchdog*/
WDT_Disable(WDT);
printf("-- USART Hardware Handshaking Example %s --\n\r", SOFTPACK_VERSION);
printf("-- %s\n\r", BOARD_NAME);
printf("-- Compiled: %s %s With %s--\n\r", __DATE__, __TIME__, COMPILER_NAME);
/* Enable I and D cache */
SCB_EnableICache();
SCB_EnableDCache();
/* Configure USART pins*/
PIO_Configure(pins, PIO_LISTSIZE(pins));
/* Configure systick for 1 ms. */
TimeTick_Configure();
NVIC_SetPriority(XDMAC_IRQn , XDMA_NVIC_PRIO);
printf("\n\rEnter required baudrate:");
gets(pbaud_time);
baudrate = (atoi(pbaud_time)) ? (atoi(pbaud_time)): 921600;
printf("\n\rEnter required timeout (in microsec):");
gets(pbaud_time);
timeout = atoi(pbaud_time);
if (timeout > 1000) {
timeout /= 1000;
timeout = ((timeout * baudrate) / 1000);
} else {
timeout = (timeout * baudrate) / 1000000;
}
timeout = (timeout) ? ((timeout > MAX_RX_TIMEOUT) ? MAX_RX_TIMEOUT : timeout) \
: MAX_RX_TIMEOUT;
printf("\n\r");
/* Configure USART */
_ConfigureUsart(baudrate, timeout);
printf("\n\r");
/*Enable Rx channel of USART */
USARTD_EnableRxChannels(&Usartd, &UsartRx);
#ifdef FULL_DUPLEX
/*Enable Tx channel of USART */
USARTD_EnableTxChannels(&Usartd, &UsartTx);
#endif
/* Start receiving data and start timer*/
USARTD_RcvData(&Usartd);
/*Initialize Ring buffer */
pUsartBuffer = (RignBuffer_t *)malloc(sizeof(RignBuffer_t));
_initCircularBuffer(pUsartBuffer);
pTxBuff = &FirstAppBuff[0];
TxBytesLeft = 0;
#ifdef USE_MD5_CHECK
md5_init(&pms);
#endif //USE_MD5_CHECK
#ifdef FULL_DUPLEX
printf( "\n\r-I- USART is in Full Duplex mode \n\r");
#else
printf( "\n\r-I- USART is in Half Duplex mode \n\r");
#endif
printf( "\n\r-I- Please send a file to serial port (USART0) \n\r");
BytesToRead = MIN_FREE_BYTES; // Bytes to read from ring-buffer
while (1) {
#ifdef USE_MD5_CHECK
if (DBG_IsRxReady()) {
ch = DBG_GetChar();
if (ch == 'm') {
uint8_t i;
md5_finish(&pms, md5);
printf("\r\nmd5:");
for (i = 0; i < sizeof(md5);i++)
printf("%.2x",md5[i]);
printf("\r\n");
md5_init(&pms);
TotalbytesReceived = 0;
}
}
#endif
/* Check Application buffer (100 KB)overflow */
if (((PingPongBufferFlag == 0) &&
(pTxBuff+BytesToRead) >= &FirstAppBuff[APP_BUFFER]) ||
(( PingPongBufferFlag == 1) && (pTxBuff+BytesToRead) >=
&SecondAppBuff[APP_BUFFER])) {
AppBufferRollOver = 1;
// Roll over and start copying to the beginning of Application buffer to avoid errors
if (PingPongBufferFlag)
BytesToRead = (&SecondAppBuff[APP_BUFFER] - pTxBuff);
else
BytesToRead = (&FirstAppBuff[APP_BUFFER] - pTxBuff);
memory_barrier();
}
/* Read ring buffer */
BytesRead = RingBufferRead(pUsartBuffer, pTxBuff, BytesToRead);
memory_sync();
TxBytesLeft += BytesRead; // number of bytes to send via USART Tx
#ifdef USE_MD5_CHECK
if (BytesRead > 0)
md5_append(&pms,pTxBuff,BytesRead);
#endif
/* check if one of the application buffer is full and ready to send */
if (AppBufferRollOver && (TxBytesLeft == APP_BUFFER)) {
AppBufferRollOver = 0;
TxBytesLeft = 0;
BytesRead = 0;
BytesToRead = MIN_FREE_BYTES; // Bytes to read from ring-buffer
while (!UsartTx.dmaProgress);
if (PingPongBufferFlag) {
PingPongBufferFlag = 0;
pTxBuff = &FirstAppBuff[0];
} else {
PingPongBufferFlag = 1;
pTxBuff = &SecondAppBuff[0];
}
memory_sync();
#ifdef FULL_DUPLEX
USARTD_SendData(&Usartd);
#endif
}
/* otherwise keep storing in same application buffer from Rx DMA's ring
buffer */
else {
BytesToRead = MIN_FREE_BYTES; // Bytes to read from ring-buffer
pTxBuff += BytesRead;
#ifdef FULL_DUPLEX
/* Check for Tx timeout, if there is timeout then send the bytes left
(less than 100 KB) in application buffer */
if ((GetDelayInTicks(TimeOutTimer, GetTicks()) == USART_TX_TIMEOUT)
&& TxBytesLeft) {
// wait for any eventual USART Tx in progress
while (!UsartTx.dmaProgress);
FlushTxBuffer(TxBytesLeft);
TimeOutTimer = GetTicks();
PingPongBufferFlag = 0;
TxBytesLeft = 0;
BytesRead = 0;
BytesToRead = MIN_FREE_BYTES; // Bytes to read from ring-buffer
pTxBuff = &FirstAppBuff[0];
_UpdateTxConfig((uint32_t)&FirstAppBuff[0], APP_BUFFER);
TRACE_INFO_WP(" TX Tiemout \n\r");
}
#endif
}
}
}
/**
* \brief periph-protect Application entry point.
*
* \return Unused (ANSI-C compatibility).
*/
extern int main(void)
{
uint8_t cmd;
uint32_t wpsr;
uint32_t *pReg;
const uint32_t dummy = 0x12345678;
/* Disable watchdog */
WDT_Disable(WDT);
/* Enable I and D cache */
SCB_EnableICache();
SCB_EnableDCache();
/* Output example information */
printf("-- Peripheral Protect Example %s --\n\r", SOFTPACK_VERSION);
printf("-- %s\n\r", BOARD_NAME);
printf("-- Compiled: %s %s --\n\r", __DATE__, __TIME__);
_DisplayMenu();
/* Enable PIO controller peripheral clock */
PMC_EnablePeripheral(pinwp.id);
/* Get the address of PIO controller to be write-protected */
pReg = _GetPioFromPin(&pinwp);
while (1) {
cmd = DBG_GetChar();
switch (cmd) {
case 'm':
_DisplayMenu();
break;
case 'l':
PIO_EnableWriteProtect(&pinwp);
printf("The Write Protect is enabled.\r\n");
break;
case 'u':
PIO_DisableWriteProtect(&pinwp);
printf("The Write Protect is disabled.\r\n");
break;
case '0':
case '1':
case '2':
case '3':
case '4':
case '5':
case '6':
case '7':
case '8':
case '9':
*(pReg + offset[cmd - '0'] / 4) = dummy;
break;
case 'a':
case 'b':
case 'c':
case 'd':
case 'e':
case 'f':
*(pReg + offset[cmd - 'a' + 10] / 4) = dummy;
break;
default:
cmd = 'x';
break;
}
if ((cmd != 'x') && (cmd != 'm') && (cmd != 'l') && (cmd != 'u')) {
/* A write access has been attempted */
wpsr = PIO_GetWriteProtectViolationInfo(&pinwp);
if ((wpsr & PIO_WPMR_WPEN_EN) == PIO_WPMR_WPEN_EN) {
/* Write protect violation is detected */
printf("Write protect violation is detected!\r\n");
printf("The offset of the write-protected register is 0x%04x.\r\n", (unsigned int)((wpsr & 0x00FFFF00) >> 8));
} else {
/**
* \brief gmac_uip_telnetd example entry point.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
uip_ipaddr_t ipaddr;
struct timer periodic_timer, arp_timer;
uint32_t i;
struct uip_eth_addr OrigiGMacAddr;
/* Disable watchdog */
WDT_Disable(WDT);
SCB_EnableICache();
SCB_EnableDCache();
TimeTick_Configure();
printf("-- GMAC uIP Telnetd Example %s --\n\r", SOFTPACK_VERSION);
printf("-- %s\n\r", BOARD_NAME);
printf("-- Compiled: %s %s With %s--\n\r", __DATE__, __TIME__ ,
COMPILER_NAME);
/* Configure systick for 1 ms. */
TimeTick_Configure();
/* Configure TWI pins. */
PIO_Configure(twiPins, PIO_LISTSIZE(twiPins));
/* Enable TWI */
PMC_EnablePeripheral(BOARD_ID_TWI_EEPROM);
TWI_ConfigureMaster(BOARD_BASE_TWI_EEPROM, TWCK, BOARD_MCK);
TWID_Initialize(&twid, BOARD_BASE_TWI_EEPROM);
/* Display MAC & IP settings */
TWID_Read(&twid, AT24MAC_SERIAL_NUM_ADD, 0x9A, 1, OrigiGMacAddr.addr, PAGE_SIZE,
0);
if ((OrigiGMacAddr.addr[0] == 0xFC) && (OrigiGMacAddr.addr[1] == 0xC2)
&& (OrigiGMacAddr.addr[2] == 0x3D)) {
for (i = 0; i < 6; i++)
GMacAddress.addr[i] = OrigiGMacAddr.addr[i];
}
printf("-- MAC %x:%x:%x:%x:%x:%x\n\r",
GMacAddress.addr[0], GMacAddress.addr[1], GMacAddress.addr[2],
GMacAddress.addr[3], GMacAddress.addr[4], GMacAddress.addr[5]);
#ifndef __DHCPC_H__
printf(" - Host IP %d.%d.%d.%d\n\r",
HostIpAddress[0], HostIpAddress[1], HostIpAddress[2], HostIpAddress[3]);
printf(" - Router IP %d.%d.%d.%d\n\r",
RoutIpAddress[0], RoutIpAddress[1], RoutIpAddress[2], RoutIpAddress[3]);
printf(" - Net Mask %d.%d.%d.%d\n\r",
NetMask[0], NetMask[1], NetMask[2], NetMask[3]);
#endif
/* System devices initialize */
gmac_tapdev_setmac((uint8_t *)GMacAddress.addr);
gmac_tapdev_init();
clock_init();
timer_set(&periodic_timer, CLOCK_SECOND / 2);
timer_set(&arp_timer, CLOCK_SECOND * 10);
/* Init uIP */
uip_init();
#ifdef __DHCPC_H__
printf("P: DHCP Supported\n\r");
uip_ipaddr(ipaddr, 0, 0, 0, 0);
uip_sethostaddr(ipaddr);
uip_ipaddr(ipaddr, 0, 0, 0, 0);
uip_setdraddr(ipaddr);
uip_ipaddr(ipaddr, 0, 0, 0, 0);
uip_setnetmask(ipaddr);
#else
/* Set the IP address of this host */
uip_ipaddr(ipaddr, HostIpAddress[0], HostIpAddress[1],
HostIpAddress[2], HostIpAddress[3]);
uip_sethostaddr(ipaddr);
uip_ipaddr(ipaddr, RoutIpAddress[0], RoutIpAddress[1],
RoutIpAddress[2], RoutIpAddress[3]);
uip_setdraddr(ipaddr);
uip_ipaddr(ipaddr, NetMask[0], NetMask[1], NetMask[2], NetMask[3]);
uip_setnetmask(ipaddr);
#endif
uip_setethaddr(GMacAddress);
_app_init();
while (1) {
uip_len = gmac_tapdev_read();
if (uip_len > 0) {
if (BUF->type == htons(UIP_ETHTYPE_IP)) {
uip_arp_ipin();
uip_input();
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if (uip_len > 0) {
uip_arp_out();
gmac_tapdev_send();
}
} else if (BUF->type == htons(UIP_ETHTYPE_ARP)) {
uip_arp_arpin();
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if (uip_len > 0)
gmac_tapdev_send();
}
} else if (timer_expired(&periodic_timer)) {
timer_reset(&periodic_timer);
for (i = 0; i < UIP_CONNS; i++) {
uip_periodic(i);
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if (uip_len > 0) {
uip_arp_out();
gmac_tapdev_send();
}
}
#if UIP_UDP
for (i = 0; i < UIP_UDP_CONNS; i++) {
uip_udp_periodic(i);
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if (uip_len > 0) {
uip_arp_out();
gmac_tapdev_send();
}
}
#endif /* UIP_UDP */
/* Call the ARP timer function every 10 seconds. */
if (timer_expired(&arp_timer)) {
timer_reset(&arp_timer);
uip_arp_timer();
}
}
}
}
/**
* \brief hsmci_multimedia_card Application entry point.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
uint8_t connected = 0;
/* Disable watchdog */
WDT_Disable( WDT ) ;
SCB_EnableICache();
SCB_EnableDCache();
TimeTick_Configure();
/* Output example information*/
printf("-- MultiMedia Card Example %s --\n\r", SOFTPACK_VERSION);
printf("-- %s\n\r", BOARD_NAME);
printf("-- Compiled: %s %s --\n\r", __DATE__, __TIME__);
bMciID = 0;
/* Initialize PIO pins */
_ConfigurePIOs();
/* Initialize drivers */
_ConfigureDrivers();
/* Card insert detection loop */
for(;;) {
if (CardIsConnected(bMciID)) {
if (connected == 0) {
connected = 1;
/* Delay before card initialize */
Wait(300);
/* Do card test */
CardInit(bMciID);
DumpMenu();
}
}
else if (connected) {
connected = 0;
printf("** Card Disconnected\n\r");
}
if (DBG_IsRxReady())
{
uint8_t key = DBG_GetChar();
switch(key)
{
/* Change performance test block size */
case 'c':
case 'C':
{
if (performanceMultiBlock >= NB_MULTI_BLOCKS)
performanceMultiBlock = 1;
else
performanceMultiBlock <<= 1;
printf("-!- Performance Multi set to %d\n\r", (int)performanceMultiBlock);
}
break;
/* Show help information */
default:
if (!connected)
{
DumpMenu();
}
else
{
switch(key){
/* Dump block contents */
case 'd':
case 'D':
BlockDump(bMciID);
break;
/* Initialize the card again */
case 'I':
case 'i':
CardInit(bMciID);
break;
/* Run test on whole disk */
case 't':
case 'T':
if (SD_GetCardType(&sdDrv[bMciID]) & CARD_TYPE_bmSDIO)
SdioTest(bMciID);
if (SD_GetCardType(&sdDrv[bMciID]) & CARD_TYPE_bmSDMMC)
DiskTest(bMciID, 1, 1, 1);
printf("\n\r");
break;
/* Run performance test */
case 'P':
case 'p':
if (SD_GetCardType(&sdDrv[bMciID]) & CARD_TYPE_bmSDIO)
SdioPerformanceTest(bMciID);
if (SD_GetCardType(&sdDrv[bMciID]) & CARD_TYPE_bmSDMMC)
DiskPerformanceTest(bMciID, 1, 1, 0);
printf("\n\r");
break;
/* Read/Verify ONLY test */
case 'r':
case 'R':
DiskTest(bMciID, 0, 0, 1);
printf("\n\r");
break;
/* Read/Verify ONLY performance test */
case 'V':
case 'v':
DiskPerformanceTest(bMciID, 0, 1, 1);
printf("\n\r");
break;
/* Show help information */
default:
DumpMenu();
}
}
break;
}
}
}
}
/**
* \brief usart_spi Application entry point.
*
* \return Unused (ANSI-C compatibility).
*/
extern int main(void)
{
uint8_t ucKey, i;
/* Disable watchdog */
WDT_Disable(WDT);
SCB_EnableICache();
SCB_EnableDCache();
/* Configure systick for 1 ms. */
TimeTick_Configure();
/* Output example information */
printf("-- USART SPI Example %s --\n\r", SOFTPACK_VERSION);
printf("-- %s\n\r", BOARD_NAME);
printf("-- Compiled: %s %s With %s--\n\r", __DATE__, __TIME__, COMPILER_NAME);
/* Display menu */
_DisplayMainmenu();
while (1) {
ucKey = DBG_GetChar();
switch (ucKey) {
/*usart as spi master*/
case 'm':
case 'M':
/* Configure pins*/
PIO_Configure(pins1, PIO_LISTSIZE(pins1));
/* Configure USART as SPI master */
_ConfigureUsartAsSpiMaster();
/* Configure SPi slave */
_ConfigureSpiSlave();
printf("-I- Configure USART as spi master ...\n\r");
SPI_EnableIt(SPI, SPI_IER_RDRF);
SPI_Enable(SPI);
USART_EnableIt(USART, UART_IER_RXRDY);
for (i = 0; (pTxBuffer1[i]!='\0' && pTxBuffer2[i]!='\0'); i++) {
while ((SPI->SPI_SR & SPI_SR_TXEMPTY) == 0);
SPI->SPI_TDR = ((uint16_t)pTxBuffer2[i]) | SPI_PCS( 0 );
USART_Write( USART, pTxBuffer1[i], 0);
}
break;
/*usart as spi slave*/
case 's':
case 'S':
printf("-I- Configure USART as spi slave...\n\r");
/* Configure pins*/
PIO_Configure(pins2, PIO_LISTSIZE(pins2));
/* Configure USART as SPI slave */
_ConfigureUsartAsSpiSlave();
/* Configure SPI master */
_ConfigureSpiMaster();
USART_EnableIt(USART, UART_IER_RXRDY);
SPI_EnableIt(SPI, SPI_IER_RDRF);
SPI_Enable(SPI);
for (i = 0; (pTxBuffer1[i]!='\0' && pTxBuffer2[i]!='\0'); i++) {
USART_Write(USART, (uint16_t)pTxBuffer2[i], 0);
SPI_Write( SPI, 1, (uint16_t)pTxBuffer1[i]);
}
break;
case 'h':
case 'H':
_DisplayMainmenu();
break;
}
}
}
int main(void)
{
uint32_t i;
uint32_t deviceId;
uint8_t ucKey;
uint8_t TestPassed = 0;
/* Disable watchdog */
WDT_Disable(WDT);
/* Output example information */
printf("-- QSPI Serialflash Example %s --\n\r", SOFTPACK_VERSION);
printf("-- %s\n\r", BOARD_NAME);
printf("-- Compiled: %s %s With %s--\n\r", __DATE__, __TIME__ , COMPILER_NAME);
SCB_EnableICache();
SCB_EnableDCache();
TimeTick_Configure();
PIO_Configure(Qspi_pins, PIO_LISTSIZE(Qspi_pins));
ENABLE_PERIPHERAL(ID_QSPI);
QSPI_UserMenu();
while (1) {
ucKey = DBG_GetChar();
switch (ucKey) {
case '1' :
S25FL1D_InitFlashInterface(1);
TRACE_INFO("QSPI drivers initialized ");
/* enable quad mode */
S25FL1D_QuadMode(ENABLE);
PeripheralInit = 1;
break;
case '2' :
S25FL1D_InitFlashInterface(0);
TRACE_INFO("QSPI Initialized in SPI mode");
S25FL1D_QuadMode(DISABLE);
PeripheralInit = 2;
break;
case '3' :
QSPI_UserMenu();
PeripheralInit = 0;
break;
default:
break;
}
if (PeripheralInit) {
while (1) {
deviceId = S25FL1D_ReadJedecId();
printf("ID read: Manufacture ID = 0x%x, Device Type = 0x%x, \
Capacity = 0x%x\n\r",
(uint8_t)(deviceId), (uint8_t)(deviceId >> 8), (uint8_t)(deviceId >> 16));
break;
}
/* erase entire chip */
S25FL1D_EraseChip();
/* fill up the buffer*/
_fillupbuffer(TestBuffer, BUFFER_SIZE);
printf("Writing buffer to Flash memory...... \n\r");
/* write the buffer to flash memory */
for (i = 0; i < 0x200000; ) {
S25FL1D_Write(TestBuffer, BUFFER_SIZE, i, 0);
i += BUFFER_SIZE;
}
TestPassed = _VerifyData(0, 0x200000, TestBuffer, 0);
printf("Erasing a block(64 KB) @ Add 0x10000 \n\r");
S25FL1D_Erase64KBlock(0x10000);
memset(TestBuffer, 0xFFFFFF, BUFFER_SIZE);
SCB_CleanDCache_by_Addr((uint32_t *)TestBuffer, sizeof(TestBuffer));
TestPassed = _VerifyData(0x10000, (0x10000 + 64 * 1024), TestBuffer, 0);
if (TestPassed)
printf(" \n\r**** Test Failed ***** \n\r");
else
printf(" \n\r### Test Passed ###\n\r");
}
PeripheralInit = 0;
QSPI_UserMenu();
}
}
TM_RCC_Result_t TM_RCC_InitSystem(void) {
RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct;
#if defined(STM32F7xx)
/* Invalidate I-Cache : ICIALLU register */
SCB_InvalidateICache();
/* Enable branch prediction */
SCB->CCR |= (1 <<18);
__DSB();
/* Enable I-Cache */
SCB_EnableICache();
/* Invalidate I-Cache */
SCB_InvalidateDCache();
/* Enable D-Cache */
SCB_EnableDCache();
#endif
/* Enable Power Control clock */
__HAL_RCC_PWR_CLK_ENABLE();
#if !defined(STM32F0xx)
/* Set voltage scaling */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
#endif
/* Enable HSE Oscillator and activate PLL with HSE as source */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE;
/* Select proper PLL input clock */
if (RCC_OSCILLATORTYPE == RCC_OSCILLATORTYPE_HSE) {
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
#if defined(STM32F0xx)
RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1;
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
#endif
} else {
RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
#if defined(STM32F0xx)
RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1;
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
#endif
}
/* Set PLL parameters */
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
#if !defined(STM32F0xx)
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM;
RCC_OscInitStruct.PLL.PLLN = RCC_PLLN;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP;
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ;
#endif
#if defined(STM32F446xx)
#if defined(RCC_PLLR)
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR;
#else
RCC_OscInitStruct.PLL.PLLR = 7;
#endif
#endif
/* Try to init */
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
return TM_RCC_Result_Error;
}
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) || defined(STM32F7xx)
/* Activate the Over-Drive mode */
HAL_PWREx_EnableOverDrive();
#endif
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1);
#if !defined(STM32F0xx)
RCC_ClkInitStruct.ClockType |= RCC_CLOCKTYPE_PCLK2;
#endif
#if defined(STM32F405xx) || \
defined(STM32F415xx) || \
defined(STM32F407xx) || \
defined(STM32F417xx) || \
defined(STM32F427xx) || \
defined(STM32F437xx) || \
defined(STM32F429xx) || \
defined(STM32F439xx) || \
defined(STM32F446xx) || \
defined(STM32F7xx)
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
#elif defined(STM32F0xx)
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
#else
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
#endif
/* Try to init */
#if defined(STM32F0xx)
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
#else
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
#endif
return TM_RCC_Result_Error;
}
/* Return OK */
return TM_RCC_Result_Ok;
}
/**
* \brief usb_iad_hid_aud Application entry point.
*
* Starts the driver and waits for an audio input stream to forward to the DAC.
*/
int main(void)
{
volatile uint8_t usbConn = 0;
volatile uint8_t audioOn = 0;
int32_t numDiff = 0, prevDiff = 0;
int8_t clockAdjust = 0;
/* Disable watchdog */
WDT_Disable(WDT);
SCB_EnableICache();
SCB_EnableDCache();
printf("-- USB HID + Audio Device Example %s --\n\r", SOFTPACK_VERSION);
printf("-- %s\n\r", BOARD_NAME);
printf("-- Compiled: %s %s With %s--\n\r", __DATE__, __TIME__ ,
COMPILER_NAME);
TimeTick_Configure();
/* Interrupt priority */
NVIC_SetPriority(USBHS_IRQn, 2);
/* If they are present, configure Vbus & Wake-up pins */
PIO_InitializeInterrupts(0);
/* Initialize all USB power (off) */
_ConfigureUsbhs();
/* ----- HID Function Initialize */
#ifdef NO_PUSHBUTTON
printf("-- : DBG key 1 2 used as buttons\n\r");
printf("-- : 1st press to push, 2nd press to release\n\r");
#else
/* Initialize key statuses and configure push buttons */
PIO_Configure(pinsPushButtons, PIO_LISTSIZE(pinsPushButtons));
#endif
memset(keyStatus, 1, NUM_KEYS);
//LED_Configure(LED_NUMLOCK);
/* Audio STREAM LED */
LED_Configure(USBD_LEDOTHER);
/* Configure Audio */
_ConfigureAudioPlay(AUDDevice_SAMPLERATE, BOARD_MCK);
/* Configure DMA */
_ConfigureDma();
/* USB audio driver initialization */
HIDAUDDDriver_Initialize(&hidauddDriverDescriptors);
/* connect if needed */
USBD_Connect();
/* Infinite loop */
while (1) {
if (USBD_GetState() < USBD_STATE_CONFIGURED) {
usbConn = 0;
continue;
}
if (audioOn) {
if (isDacActive == 0) {
AudioPlayEnable(0);
printf("audE ");
isFirstFrame = 1;
audioOn = 0;
} else {
numDiff = numBuffersToSend - DAC_DELAY;
if (prevDiff != numDiff) {
prevDiff = numDiff;
if (numDiff > 1 && clockAdjust != 1) {
printf("+");
/* USB too fast or SSC too slow: faster clock */
clockAdjust = 1;
_SyncAdjust(1);
}
if (numDiff < -1 && clockAdjust != -1) {
printf("-");
/* USB too slow or SSC too fast: slower clock */
clockAdjust = -1;
_SyncAdjust(-1);
}
if (numDiff == 0 && clockAdjust != 0) {
clockAdjust = 0;
_SyncAdjust(0);
}
}
}
} else if (isDacActive) {
printf("audS ");
audioOn = 1;
}
if (usbConn == 0) {
usbConn = 1;
/* Start Reading the incoming audio stream */
AUDDFunction_Read(buffers[inBufferIndex],
AUDDevice_BYTESPERFRAME,
(TransferCallback) FrameReceived,
0); // No optional argument
}
HIDDKeyboardProcessKeys();
}
}
/**
* Initializes drivers and start the USB CDCMSD device.
*/
int main(void)
{
uint8_t usbConnected = 0, serialON = 0;
/* Disable watchdog */
WDT_Disable(WDT);
SCB_EnableICache();
SCB_EnableDCache();
printf("-- USB CDCMSD Device Project %s --\n\r", SOFTPACK_VERSION);
printf("-- %s\n\r", BOARD_NAME);
printf("-- Compiled: %s %s With %s--\n\r", __DATE__, __TIME__ ,
COMPILER_NAME);
/* If they are present, configure Vbus & Wake-up pins */
PIO_InitializeInterrupts(0);
/* If there is on board power, switch it off */
_ConfigureUotghs();
/* ----- MSD Function Initialize */
/* Configure memories */
_MemoriesInitialize();
/* USB CDCMSD driver initialization */
CDCMSDDriver_Initialize(&cdcmsddDriverDescriptors, luns, MAX_LUNS);
/* connect if needed */
USBD_Connect();
/* Driver loop */
while (1) {
/* Device is not configured */
if (USBD_GetState() < USBD_STATE_CONFIGURED) {
if (usbConnected) {
printf("-I- USB Disconnect/Suspend\n\r");
usbConnected = 0;
/* Serial port closed */
isSerialPortON = 0;
}
} else {
if (usbConnected == 0) {
printf("-I- USB Connect\n\r");
usbConnected = 1;
}
if (!serialON && isSerialPortON) {
printf("-I- SerialPort ON\n\r");
/* Start receiving data on the USART */
/* Start receiving data on the USB */
CDCDSerial_Read(usbSerialBuffer0, DATAPACKETSIZE, 0, 0);
serialON = 1;
} else if (serialON && !isSerialPortON) {
printf("-I- SeriaoPort OFF\n\r");
serialON = 0;
}
MSDFunction_StateMachine();
if (msdRefresh) {
msdRefresh = 0;
if (msdWriteTotal < 50 * 1000) {
/* Flush Disk Media */
}
msdWriteTotal = 0;
}
}
}
}
/*! \brief Main function. Execution starts here.
*/
int main(void)
{
uint8_t isUsbConnected = 0;
/* Disable watchdog */
WDT_Disable(WDT);
SCB_EnableICache();
SCB_EnableDCache();
/* Output example information */
printf("-- USB Device CDC Serial Project %s --\n\r", SOFTPACK_VERSION);
printf("-- %s\n\r", BOARD_NAME);
printf("-- Compiled: %s %s With %s--\n\r", __DATE__, __TIME__ ,
COMPILER_NAME);
/* Initialize PIO interrupts */
PIO_InitializeInterrupts(0);
/* Interrupt priority */
NVIC_SetPriority(USBHS_IRQn, 2);
/* Configure DMA driver */
_ConfigureDma();
/* Configure USART */
_ConfigureUsart();
_UsartDmaRxSetup();
/* Initialize OTG clocks */
_ConfigureUotghs();
/* CDC serial driver initialization */
CDCDSerialDriver_Initialize(&cdcdSerialDriverDescriptors);
/* Help information */
_DebugHelp();
// Start USB stack to authorize VBus monitoring
USBD_Connect();
/* Driver loop */
while (1) {
/* Device is not configured */
if (USBD_GetState() < USBD_STATE_CONFIGURED) {
if (isUsbConnected) {
isUsbConnected = 0;
isCdcSerialON = 0;
}
} else if (isUsbConnected == 0)
isUsbConnected = 1;
/* Serial port ON/OFF */
if (CDCDSerialDriver_GetControlLineState() & CDCControlLineState_DTR) {
if (!isCdcSerialON) {
isCdcSerialON = 1;
/* Start receiving data on the USART */
_UsartDmaRx();
USART_EnableIt(BASE_USART, US_CSR_FRAME | US_CSR_OVRE | US_IER_TIMEOUT);
USART_EnableRecvTimeOut(BASE_USART, USART_TIMEOUT);
/* Start receiving data on the USB */
CDCDSerialDriver_Read(usbBuffer,
DATAPACKETSIZE,
(TransferCallback) _UsbDataReceived,
0);
}
} else if (isCdcSerialON)
isCdcSerialON = 0;
if (DBG_IsRxReady()) {
uint8_t key = DBG_GetChar();
/* ESC: CDC Echo ON/OFF */
if (key == 27) {
printf("** CDC Echo %s\n\r",
isCdcEchoON ? "OFF" : "ON");
isCdcEchoON = !isCdcEchoON;
}
/* 't': Test CDC writing */
else if (key == 't')
_SendText();
else {
printf("Alive\n\r");
while (CDCDSerialDriver_Write((char *)"Alive\n\r", 8, 0, 0)
!= USBD_STATUS_SUCCESS);
_DebugHelp();
}
}
}
}
int main(void)
{
uint8_t MemVerify = 0;
uint32_t __Start_SP, idx;
uint32_t (*__Start_New)(void);
uint8_t *pMemory = (uint8_t *)( QSPIMEM_ADDR );
/* Disable watchdog */
WDT_Disable(WDT);
SCB_EnableICache();
SCB_EnableDCache();
/* Output example information */
printf("-- QSPI XIP Example %s --\n\r", SOFTPACK_VERSION);
printf("-- %s\n\r", BOARD_NAME);
printf("-- Compiled: %s %s With %s--\n\r", __DATE__, __TIME__, COMPILER_NAME);
/* Configure systick */
TimeTick_Configure();
/* Initialize the QSPI and serial flash */
PIO_Configure(pins, PIO_LISTSIZE(pins));
/* Enable the clock of QSPI */
ENABLE_PERIPHERAL(ID_QSPI);
S25FL1D_InitFlashInterface(1);
printf("QSPI drivers initialized\n\r");
/* enable quad mode */
S25FL1D_QuadMode(ENABLE);
/* get the code at the beginning of QSPI, run the code directly if it's valid */
S25FL1D_ReadQuadIO(Buffer, sizeof(Buffer), 0, 1, 0);
printf("-I- data at the beginning of QSPI: %08x %08x %08x %08x\n\r",
(unsigned int)Buffer[0], (unsigned int)Buffer[1],
(unsigned int)Buffer[2], (unsigned int)Buffer[3]);
if ((IRAM_ADDR <= Buffer[0]) && (IRAM_ADDR + IRAM_SIZE > Buffer[0]) &&
(QSPIMEM_ADDR < Buffer[1]) && (1 == (Buffer[1]&0x3))) {
__Start_New = (uint32_t(*)(void)) Buffer[1];
__Start_SP = Buffer[0];
printf("-I- a valid application is already in QSPI, run it from QSPI\n\r");
printf("========================================================= \n\r");
__set_MSP(__Start_SP);
__Start_New();
} else {
printf("-I- there isn't a valid application in QSPI, program first\n\r");
}
if (S25FL1D_Unprotect()) {
printf("Unprotect QSPI Flash failed!\n\r");
while (1);
}
/* erase entire chip */
S25FL1D_EraseChip();
/* Flash the code to QSPI flash */
printf("Writing to Memory\n\r");
S25FL1D_Write((uint32_t *)pBuffercode, sizeof(pBuffercode), 0, 0);
printf("Example code written 0x%x to Memory\n\r", sizeof(pBuffercode));
printf("Verifying \n\r");
/* Update QSPI Region to Full Access and cacheable*/
MPU_UpdateRegions(MPU_QSPIMEM_REGION, QSPI_START_ADDRESS, \
MPU_AP_FULL_ACCESS |
INNER_NORMAL_WB_NWA_TYPE( NON_SHAREABLE ) |
MPU_CalMPURegionSize(QSPI_END_ADDRESS - QSPI_START_ADDRESS) |
MPU_REGION_ENABLE);
/* Start continuous read mode to enter in XIP mode*/
S25FL1D_ReadQuadIO(Buffer, sizeof(Buffer), 0, 1, 0);
for (idx = 0; idx < sizeof(pBuffercode); idx++) {
if (*pMemory == pBuffercode[idx]) {
pMemory++;
} else {
MemVerify = 1;
printf("Data does not match at 0x%x \n\r", (unsigned)pMemory);
break;
}
}
if (!MemVerify) {
printf("Everything is OK \n\r");
/* set PC and SP */
__Start_New = (uint32_t(*) (void) ) Buffer[1];
__Start_SP = Buffer[0];
printf("\n\r Starting getting started example from QSPI flash \n\r");
printf("========================================================= \n\r");
__set_MSP(__Start_SP);
__Start_New();
}
while (1);
}
int main(void)
{
uint8_t oldRelease = 0;
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* Enable I-Cache-------------------------------------------------------------*/
SCB_EnableICache();
/* Enable D-Cache-------------------------------------------------------------*/
SCB_EnableDCache();
/* MCU Configuration----------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* Configure the system clock */
SystemClock_Config();
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_ADC1_Init();
MX_DMA_Init();
MX_CAN1_Init();
MX_CAN2_Init();
MX_DAC_Init();
MX_DMA2D_Init();
MX_FMC_Init();
MX_I2C2_Init();
MX_SDMMC1_SD_Init();
MX_SPI2_Init();
MX_TIM6_Init();
MX_TIM7_Init();
MX_USART2_UART_Init();
MX_USART3_UART_Init();
MX_USART6_UART_Init();
MX_FATFS_Init();
MX_USB_HOST_Init();
MX_TIM11_Init();
MX_TIM13_Init();
MX_TIM14_Init();
/* USER CODE BEGIN 2 */
//MPU_Config();
InitPeriph();
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while(1){
/* USER CODE END WHILE */
MX_USB_HOST_Process();
/* USER CODE BEGIN 3 */
RoutineFast(); // get and run deals from medium queue
if(oldRelease && Touch_Data.status == TOUCH_RELEASED){
ReleaseFunction();
}
else
{oldRelease = 1;}
if(UpdateScreen|| DISP.ReleaseFlag || TimeIsReady){
Run_GUI();
Show_GUI();
UpdateScreen = 0;
DISP.ReleaseFlag = 0;
}
}
/* USER CODE END 3 */
}
/**
* \brief Application entry point for RTT example.
*
* Initializes the RTT, displays the current time and allows the user to
* perform several actions: clear the timer, set an alarm, etc.
*
* \return Unused (ANSI-C compatibility).
*/
extern int main( void )
{
unsigned char c;
/* Disable watchdog */
WDT_Disable(WDT);
SCB_EnableICache();
SCB_EnableDCache();
/* Output example information */
printf("-- RTT Example %s --\n\r", SOFTPACK_VERSION);
printf("-- %s\n\r", BOARD_NAME);
printf("-- Compiled: %s %s With %s--\n\r", __DATE__, __TIME__, COMPILER_NAME);
/* Configure RTT */
_ConfigureRtt();
/* Initialize state machine */
state = STATE_MAINMENU;
alarmed = 0;
_RefreshDisplay();
/* User input loop */
while (1) {
/* Wait for user input */
c = DBG_GetChar();
/* Main menu mode */
if (state == STATE_MAINMENU) {
/* Reset timer */
if (c == 'r') {
_ConfigureRtt();
_RefreshDisplay();
}
/* Set alarm */
else
if (c == 's') {
state = STATE_SETALARM;
newAlarm = 0;
_RefreshDisplay();
}
/* Clear alarm */
else {
if ((c == 'c') && alarmed) {
alarmed = 0;
_RefreshDisplay();
}
}
}
/* Set alarm mode */
else {
if (state == STATE_SETALARM) {
/* Number */
if ((c >= '0') && (c <= '9')) {
newAlarm = newAlarm * 10 + c - '0';
_RefreshDisplay();
}
/* Backspace */
else {
if (c == 8) {
newAlarm /= 10;
_RefreshDisplay();
}
/* Enter key */
else {
if (c == 13) {
/* Avoid newAlarm = 0 case */
if (newAlarm != 0) {
RTT_SetAlarm(RTT, newAlarm);
}
state = STATE_MAINMENU;
_RefreshDisplay();
}
}
}
}
}
}
}
/* MPU configuration. */
void BOARD_ConfigMPU(void)
{
/* Disable I cache and D cache */
if (SCB_CCR_IC_Msk == (SCB_CCR_IC_Msk & SCB->CCR)) {
SCB_DisableICache();
}
if (SCB_CCR_DC_Msk == (SCB_CCR_DC_Msk & SCB->CCR)) {
SCB_DisableDCache();
}
/* Disable MPU */
ARM_MPU_Disable();
/* MPU configure:
* Use ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size)
* API in core_cm7.h.
* param DisableExec Instruction access (XN) disable bit,0=instruction fetches enabled, 1=instruction fetches disabled.
* param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
* Use MACROS defined in core_cm7.h: ARM_MPU_AP_NONE/ARM_MPU_AP_PRIV/ARM_MPU_AP_URO/ARM_MPU_AP_FULL/ARM_MPU_AP_PRO/ARM_MPU_AP_RO
* Combine TypeExtField/IsShareable/IsCacheable/IsBufferable to configure MPU memory access attributes.
* TypeExtField IsShareable IsCacheable IsBufferable Memory Attribtue Shareability Cache
* 0 x 0 0 Strongly Ordered shareable
* 0 x 0 1 Device shareable
* 0 0 1 0 Normal not shareable Outer and inner write through no write allocate
* 0 0 1 1 Normal not shareable Outer and inner write back no write allocate
* 0 1 1 0 Normal shareable Outer and inner write through no write allocate
* 0 1 1 1 Normal shareable Outer and inner write back no write allocate
* 1 0 0 0 Normal not shareable outer and inner noncache
* 1 1 0 0 Normal shareable outer and inner noncache
* 1 0 1 1 Normal not shareable outer and inner write back write/read acllocate
* 1 1 1 1 Normal shareable outer and inner write back write/read acllocate
* 2 x 0 0 Device not shareable
* Above are normal use settings, if your want to see more details or want to config different inner/outter cache policy.
* please refer to Table 4-55 /4-56 in arm cortex-M7 generic user guide <dui0646b_cortex_m7_dgug.pdf>
* param SubRegionDisable Sub-region disable field. 0=sub-region is enabled, 1=sub-region is disabled.
* param Size Region size of the region to be configured. use ARM_MPU_REGION_SIZE_xxx MACRO in core_cm7.h.
*/
/* Region 0 setting: Memory with Device type, not shareable, non-cacheable. */
MPU->RBAR = ARM_MPU_RBAR(0, 0xC0000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_512MB);
/* Region 1 setting: Memory with Device type, not shareable, non-cacheable. */
MPU->RBAR = ARM_MPU_RBAR(1, 0x80000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1GB);
/* Region 2 setting */
#if defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)
/* Setting Memory with Normal type, not shareable, outer/inner write back. */
MPU->RBAR = ARM_MPU_RBAR(2, 0x60000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_512MB);
#else
/* Setting Memory with Device type, not shareable, non-cacheable. */
MPU->RBAR = ARM_MPU_RBAR(2, 0x60000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_512MB);
#endif
/* Region 3 setting: Memory with Device type, not shareable, non-cacheable. */
MPU->RBAR = ARM_MPU_RBAR(3, 0x00000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1GB);
/* Region 4 setting: Memory with Normal type, not shareable, outer/inner write back */
MPU->RBAR = ARM_MPU_RBAR(4, 0x00000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB);
/* Region 5 setting: Memory with Normal type, not shareable, outer/inner write back */
MPU->RBAR = ARM_MPU_RBAR(5, 0x20000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB);
/* Region 6 setting: Memory with Normal type, not shareable, outer/inner write back */
MPU->RBAR = ARM_MPU_RBAR(6, 0x20200000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_256KB);
/* The define sets the cacheable memory to shareable,
* this suggestion is referred from chapter 2.2.1 Memory regions,
* types and attributes in Cortex-M7 Devices, Generic User Guide */
#if defined(SDRAM_IS_SHAREABLE)
/* Region 7 setting: Memory with Normal type, shareable, outer/inner write back, write/read allocate */
MPU->RBAR = ARM_MPU_RBAR(7, 0x80000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 1, 1, 1, 1, 0, ARM_MPU_REGION_SIZE_32MB);
#else
/* Region 7 setting: Memory with Normal type, not shareable, outer/inner write back, write/read allocate */
MPU->RBAR = ARM_MPU_RBAR(7, 0x80000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 1, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_32MB);
#endif
/* Region 8 setting, set last 2MB of SDRAM can't be accessed by cache, glocal variables which are not expected to be
* accessed by cache can be put here */
/* Memory with Normal type, not shareable, non-cacheable */
MPU->RBAR = ARM_MPU_RBAR(8, 0x81E00000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 1, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_2MB);
/* Enable MPU */
ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk);
/* Enable I cache and D cache */
SCB_EnableDCache();
SCB_EnableICache();
}
/**
* \brief getting-started Application entry point.
*
* \return Unused (ANSI-C compatibility).
*/
extern int main(void)
{
uint32_t id_offset = 0;
uint32_t fifo_entries;
uint32_t button_state = BUTTON_PUSHED;
uint32_t button_state2 = BUTTON_NOT_PUSHED;
uint32_t can_mode = CAN_STANDARD;
/* Disable watchdog */
WDT_Disable(WDT);
/* Output example information */
printf("\n\r-- Controller Area Network (CAN) Example %s --\n\r",
SOFTPACK_VERSION);
printf("-- %s\n\r", BOARD_NAME);
printf("-- Compiled: %s %s --\n\r\n\r", __DATE__, __TIME__);
printf("-- LED0 toggles on CAN message reception\n\r");
printf("-- LED1 toggles on CAN message transmission\n\r");
printf("-- CAN message transmission stopped while SW0 is pushed\n\r");
printf("-- SW1 pushes alternate between standard CAN and CAN-FD\n\r");
SCB_EnableICache();
SCB_EnableDCache();
/* Configure systick for 1 ms. */
TimeTick_Configure();
/* Configure Board LED's */
LED_Configure(0);
#if 2 == LED_NUM
LED_Configure(1);
#endif
/* Configure Timer/Counter for 250msec Tick */
_ConfigureTc();
/* Configure Board Push-buttons */
// SW1 is a ERASE system function, switch it to port function
MATRIX->CCFG_SYSIO |= (1u << 12);
/* have to disable the pull down on PB12 for SW1 before the pull up can be
enabled */
PIOB->PIO_PPDDR = 1 << 12;
PIO_Configure(pushbutton, PIO_LISTSIZE(pushbutton));
/* Adjust pio denounce filter parameters, uses 10 Hz filter. */
PIO_SetDebounceFilter(&pushbutton[0], 10);
#if 2 == BUTTON_NUM
PIO_SetDebounceFilter(&pushbutton[1], 10000);
#endif
SystemCoreClockUpdate();
MCAN_Init(&mcan1Config);
MCAN_InitFdBitRateSwitchEnable(&mcan1Config);
MCAN_InitTxQueue(&mcan1Config);
MCAN_InitLoopback(&mcan1Config); // remove to disable loop back mode
MCAN_Enable(&mcan1Config);
MCAN_IEnableMessageStoredToRxDedBuffer(&mcan1Config, CAN_INTR_LINE_1);
txMailbox0 = (uint32_t *)MCAN_ConfigTxDedBuffer(&mcan1Config, TX_BUFFER_0,
MSG_ID_0, CAN_STD_ID, CAN_DLC_1);
txMailbox1 = (uint32_t *)MCAN_ConfigTxDedBuffer(&mcan1Config, TX_BUFFER_1,
MSG_ID_1, CAN_EXT_ID, CAN_DLC_8);
MCAN_ConfigRxBufferFilter(&mcan1Config, RX_BUFFER_0, FILTER_0, MSG_ID_0,
CAN_STD_ID);
MCAN_ConfigRxBufferFilter(&mcan1Config, RX_BUFFER_1, FILTER_0, MSG_ID_1,
CAN_EXT_ID);
MCAN_ConfigRxClassicFilter(&mcan1Config, CAN_FIFO_0, FILTER_1, MSG_ID_2,
CAN_STD_ID, MSG_ID_2_MASK);
while (1) {
if (tick) {
tick = 0;
if (PIO_Get(&pushbutton[0]) == BUTTON_NOT_PUSHED) {
if (button_state2 == BUTTON_NOT_PUSHED) {
/* periodically transmit messages while SW0 is not pushed */
// send standard ID from a dedicated buffer
*txMailbox0 = MSG_ID_0_DATA1; // write data into CAN mailbox
MCAN_SendTxDedBuffer(&mcan1Config, TX_BUFFER_0); // send data
txdCntr++;
// send extended ID from a dedicated buffer
*txMailbox1 = MSG_ID_1_DATA1_4; // write data into CAN mailbox
*(txMailbox1 + 1) = MSG_ID_1_DATA5_8; // write data into CAN mailbox
MCAN_SendTxDedBuffer(&mcan1Config, TX_BUFFER_1); // send the data
txdCntr++;
// send from Tx Queue
MCAN_AddToTxFifoQ(&mcan1Config, MSG_ID_2 + id_offset, CAN_STD_ID,
CAN_DLC_1, &txData[0]);
txdCntr++;
// increment the offset so we send different ID's within the
// range defined by the mask
id_offset = (id_offset + 1) & (uint32_t) ~MSG_ID_2_MASK;
// update data being sent for next time
txData[0]++;
button_state2 = BUTTON_NOT_PUSHED;
}
} else {
if (button_state2 == BUTTON_NOT_PUSHED)
button_state2 = BUTTON_PUSHED;
else
button_state2 = BUTTON_NOT_PUSHED;
}
}
/* poll for TX'd message complete */
if (MCAN_IsTxComplete(&mcan1Config)) {
MCAN_ClearTxComplete(&mcan1Config);
if (MCAN_IsBufferTxd(&mcan1Config, TX_BUFFER_0)) {
#if 2 == LED_NUM
LED_Toggle(1);
#endif
}
}
/* Poll for new CAN messages in RX FIFO */
do {
fifo_entries = MCAN_GetRxFifoBuffer(&mcan1Config, CAN_FIFO_0,
(Mailbox64Type *) &rxMailbox2);
if (fifo_entries > 0) rxdCntr++;
} while (fifo_entries > 1);
/* SW1 used to alternate between standard CAN and CAN-FD operation */
#if 2 == BUTTON_NUM
if (PIO_Get(&pushbutton[1]) == BUTTON_NOT_PUSHED) {
#else
if (1) {
#endif
button_state = BUTTON_NOT_PUSHED;
} else {
if (button_state == BUTTON_NOT_PUSHED ) {
// Switch on a NOT PUSHED to PUSHED edge
button_state = BUTTON_PUSHED;
if (can_mode == CAN_STANDARD) {
can_mode = CAN_FD;
MCAN_RequestFdBitRateSwitch( &mcan1Config );
} else {
can_mode = CAN_STANDARD;
MCAN_RequestIso11898_1( &mcan1Config );
}
}
}
#ifdef POLLKEYBOARD
/* poll for keyboard entry */
if (DBG_IsRxReady()) {
keyboard = DBG_GetChar();
if (((char) keyboard == 'L' ) || ( (char) keyboard == 'l')) {
if (loopback == 1) {
MCAN_LoopbackOff(&mcan1Config);
loopback = 0;
} else {
MCAN_LoopbackOn(&mcan1Config);
loopback = 1;
}
}
}
#endif
}
}
int_t main(void)
{
error_t error;
NetInterface *interface;
OsTask *task;
MacAddr macAddr;
#if (APP_USE_DHCP == DISABLED)
Ipv4Addr ipv4Addr;
#endif
#if (APP_USE_SLAAC == DISABLED)
Ipv6Addr ipv6Addr;
#endif
//MPU configuration
MPU_Config();
//HAL library initialization
HAL_Init();
//Configure the system clock
SystemClock_Config();
//Enable I-cache and D-cache
SCB_EnableICache();
SCB_EnableDCache();
//Initialize kernel
osInitKernel();
//Configure debug UART
debugInit(115200);
//Start-up message
TRACE_INFO("\r\n");
TRACE_INFO("**********************************\r\n");
TRACE_INFO("*** CycloneTCP FTP Client Demo ***\r\n");
TRACE_INFO("**********************************\r\n");
TRACE_INFO("Copyright: 2010-2015 Oryx Embedded SARL\r\n");
TRACE_INFO("Compiled: %s %s\r\n", __DATE__, __TIME__);
TRACE_INFO("Target: STM32F746\r\n");
TRACE_INFO("\r\n");
//LED configuration
BSP_LED_Init(LED1);
//Clear LEDs
BSP_LED_Off(LED1);
//Initialize user button
BSP_PB_Init(BUTTON_KEY, BUTTON_MODE_GPIO);
//Initialize LCD display
BSP_LCD_Init();
BSP_LCD_LayerDefaultInit(0, LCD_FRAME_BUFFER_LAYER0);
BSP_LCD_SelectLayer(0);
BSP_LCD_SetBackColor(LCD_COLOR_BLUE);
BSP_LCD_SetTextColor(LCD_COLOR_WHITE);
BSP_LCD_SetFont(&Font24);
BSP_LCD_DisplayOn();
//Clear LCD display
BSP_LCD_Clear(LCD_COLOR_BLUE);
//Welcome message
lcdSetCursor(0, 0);
printf("FTP Client Demo\r\n");
//TCP/IP stack initialization
error = netInit();
//Any error to report?
if(error)
{
//Debug message
TRACE_ERROR("Failed to initialize TCP/IP stack!\r\n");
}
//Configure the first Ethernet interface
interface = &netInterface[0];
//Set interface name
netSetInterfaceName(interface, "eth0");
//Set host name
netSetHostname(interface, "FTPClientDemo");
//Select the relevant network adapter
netSetDriver(interface, &stm32f7xxEthDriver);
netSetPhyDriver(interface, &lan8742PhyDriver);
//Set host MAC address
macStringToAddr(APP_MAC_ADDR, &macAddr);
netSetMacAddr(interface, &macAddr);
//Initialize network interface
error = netConfigInterface(interface);
//Any error to report?
if(error)
{
//Debug message
TRACE_ERROR("Failed to configure interface %s!\r\n", interface->name);
}
#if (IPV4_SUPPORT == ENABLED)
#if (APP_USE_DHCP == ENABLED)
//Get default settings
dhcpClientGetDefaultSettings(&dhcpClientSettings);
//Set the network interface to be configured by DHCP
dhcpClientSettings.interface = interface;
//Disable rapid commit option
dhcpClientSettings.rapidCommit = FALSE;
//DHCP client initialization
error = dhcpClientInit(&dhcpClientContext, &dhcpClientSettings);
//Failed to initialize DHCP client?
if(error)
{
//Debug message
TRACE_ERROR("Failed to initialize DHCP client!\r\n");
}
//Start DHCP client
error = dhcpClientStart(&dhcpClientContext);
//Failed to start DHCP client?
if(error)
{
//Debug message
TRACE_ERROR("Failed to start DHCP client!\r\n");
}
#else
//Set IPv4 host address
ipv4StringToAddr(APP_IPV4_HOST_ADDR, &ipv4Addr);
ipv4SetHostAddr(interface, ipv4Addr);
//Set subnet mask
ipv4StringToAddr(APP_IPV4_SUBNET_MASK, &ipv4Addr);
ipv4SetSubnetMask(interface, ipv4Addr);
//Set default gateway
ipv4StringToAddr(APP_IPV4_DEFAULT_GATEWAY, &ipv4Addr);
ipv4SetDefaultGateway(interface, ipv4Addr);
//Set primary and secondary DNS servers
ipv4StringToAddr(APP_IPV4_PRIMARY_DNS, &ipv4Addr);
ipv4SetDnsServer(interface, 0, ipv4Addr);
ipv4StringToAddr(APP_IPV4_SECONDARY_DNS, &ipv4Addr);
ipv4SetDnsServer(interface, 1, ipv4Addr);
#endif
#endif
#if (IPV6_SUPPORT == ENABLED)
#if (APP_USE_SLAAC == ENABLED)
//Get default settings
slaacGetDefaultSettings(&slaacSettings);
//Set the network interface to be configured
slaacSettings.interface = interface;
//SLAAC initialization
error = slaacInit(&slaacContext, &slaacSettings);
//Failed to initialize SLAAC?
if(error)
{
//Debug message
TRACE_ERROR("Failed to initialize SLAAC!\r\n");
}
//Start IPv6 address autoconfiguration process
error = slaacStart(&slaacContext);
//Failed to start SLAAC process?
if(error)
{
//Debug message
TRACE_ERROR("Failed to start SLAAC!\r\n");
}
#else
//Set link-local address
ipv6StringToAddr(APP_IPV6_LINK_LOCAL_ADDR, &ipv6Addr);
ipv6SetLinkLocalAddr(interface, &ipv6Addr);
//Set IPv6 prefix
ipv6StringToAddr(APP_IPV6_PREFIX, &ipv6Addr);
ipv6SetPrefix(interface, &ipv6Addr, APP_IPV6_PREFIX_LENGTH);
//Set global address
ipv6StringToAddr(APP_IPV6_GLOBAL_ADDR, &ipv6Addr);
ipv6SetGlobalAddr(interface, &ipv6Addr);
//Set router
ipv6StringToAddr(APP_IPV6_ROUTER, &ipv6Addr);
ipv6SetRouter(interface, &ipv6Addr);
//Set primary and secondary DNS servers
ipv6StringToAddr(APP_IPV6_PRIMARY_DNS, &ipv6Addr);
ipv6SetDnsServer(interface, 0, &ipv6Addr);
ipv6StringToAddr(APP_IPV6_SECONDARY_DNS, &ipv6Addr);
ipv6SetDnsServer(interface, 1, &ipv6Addr);
#endif
#endif
//Create user task
task = osCreateTask("User Task", userTask, NULL, 500, 1);
//Failed to create the task?
if(task == OS_INVALID_HANDLE)
{
//Debug message
TRACE_ERROR("Failed to create task!\r\n");
}
//Create a task to blink the LED
task = osCreateTask("Blink", blinkTask, NULL, 500, 1);
//Failed to create the task?
if(task == OS_INVALID_HANDLE)
{
//Debug message
TRACE_ERROR("Failed to create task!\r\n");
}
//Start the execution of tasks
osStartKernel();
//This function should never return
return 0;
}
extern int main( void )
{
volatile uint32_t delay;
uint8_t i;
uint8_t SNo[16];
Async async;
/* Disable watchdog */
WDT_Disable( WDT ) ;
/* Enable I and D cache */
SCB_EnableICache();
SCB_EnableDCache();
CallBackFired = 0;
/* Output example information */
printf("-- TWI EEPROM Example %s --\n\r", SOFTPACK_VERSION);
printf("-- %s\n\r", BOARD_NAME);
printf("-- Compiled: %s %s --\n\r", __DATE__, __TIME__);
TimeTick_Configure();
/* Configure TWI pins. */
PIO_Configure(pins, PIO_LISTSIZE(pins));
PMC_EnablePeripheral(BOARD_ID_TWI_EEPROM);
/* Configure TWI */
twi_dma.pTwid = malloc(sizeof(Twid));
twi_dma.pTwiDma = malloc(sizeof(sXdmad));
TWI_ConfigureMaster(BOARD_BASE_TWI_EEPROM, TWCK, BOARD_MCK);
TWID_Initialize(&twid, BOARD_BASE_TWI_EEPROM);
TWID_DmaInitialize(&twi_dma, BOARD_BASE_TWI_EEPROM, 0);
TWID_Read(&twid, AT24MAC_SERIAL_NUM_ADD, 0x80, 1, SNo, PAGE_SIZE, 0);
/* Erase all page */
memset(pData, 0, PAGE_SIZE);
for(i=0; i< EEPROM_PAGES; i++)
{
printf("-I- Filling page #%d with zeroes ...\r\n", i);
TWID_Write(&twid, AT24MAC_ADDRESS, i*PAGE_SIZE, 1, pData, PAGE_SIZE, 0);
/* Wait at least 10 ms */
Wait(10);
}
printf("\r\n");
_fillBuffer(pData);
/* Synchronous operation */
for(i=0; i< EEPROM_PAGES; i++)
{
printf("\n\r-I- Filling page #%d with checkerboard pattern ...\r", i);
TWID_DmaWrite(&twi_dma, AT24MAC_ADDRESS, i*PAGE_SIZE, 1, pData, PAGE_SIZE, 0);
/* Wait at least 10 ms */
Wait(10);
}
printf("\r\n");
/* Read back data */
memset(pData, 0, PAGE_SIZE);
for(i=0; i< EEPROM_PAGES; i++)
{
printf("-I- Reading page #%d... ", i);
TWID_DmaRead(&twi_dma, AT24MAC_ADDRESS, i*PAGE_SIZE, 1, pData, PAGE_SIZE, 0);
/* Wait at least 10 ms */
Wait(10);
_checkReadBuffer(pData);
}
printf("\r\n");
/* Configure TWI interrupts */
NVIC_ClearPendingIRQ(TWIHS0_IRQn);
NVIC_EnableIRQ(TWIHS0_IRQn);
/* Asynchronous operation */
printf("-I- Read/write on page #0 (IRQ mode)\n\r");
/* Write checkerboard pattern in first page */
_fillBuffer(pData);
memset(&async, 0, sizeof(async));
async.callback = (void *) TestCallback;
for(i=0; i< EEPROM_PAGES; i++)
{
printf("-I- Filling page #%d with checkerboard pattern ...\r", i);
TWID_Write(&twid, AT24MAC_ADDRESS, i*PAGE_SIZE, 1, pData, PAGE_SIZE, &async);
while (!ASYNC_IsFinished(&async));
/* Wait at least 10 ms */
Wait(10);
}
printf("\r\n");
/* Read back data */
memset(pData, 0, PAGE_SIZE);
memset(&async, 0, sizeof(async));
async.callback = (void *) TestCallback;
for(i=0; i< EEPROM_PAGES; i++)
{
printf("-I- Reading page # %d...\r", i);
TWID_Read(&twid, AT24MAC_ADDRESS, i*PAGE_SIZE, 1, pData, PAGE_SIZE, &async);
while ( !ASYNC_IsFinished( &async ) ) ;
/* Wait at least 10 ms */
Wait(10);
_checkReadBuffer(pData);
}
printf("\r\n Callback Fired %d times", CallBackFired);
return 0 ;
}
/**
* @brief CPU L1-Cache enable.
*/
static void CPU_CACHE_Enable(void)
{
SCB_EnableICache();
SCB_EnableDCache();
}
