void asm_thumb_end_pass(asm_thumb_t *as) { (void)as; // could check labels are resolved... #if defined(MCU_SERIES_F7) if (as->base.pass == MP_ASM_PASS_EMIT) { // flush D-cache, so the code emitted is stored in memory MP_HAL_CLEAN_DCACHE(as->base.code_base, as->base.code_size); // invalidate I-cache SCB_InvalidateICache(); } #endif }
/** * @brief CPU L1-Cache enable. * Invalidate Data cache before enabling * Enable Data & Instruction Cache * @param None * @retval None */ static void CPU_CACHE_Enable(void){ (*(uint32_t *) 0xE000ED94) &= ~0x5; (*(uint32_t *) 0xE000ED98) = 0x0; //MPU->RNR (*(uint32_t *) 0xE000ED9C) = 0x20010000 |1<<4; //MPU->RBAR (*(uint32_t *) 0xE000EDA0) = 0<<28 | 3 <<24 | 0<<19 | 0<<18 | 1<<17 | 0<<16 | 0<<8 | 30<<1 | 1<<0 ; //MPU->RASE WT (*(uint32_t *) 0xE000ED94) = 0x5; /* Invalidate I-Cache : ICIALLU register*/ SCB_InvalidateICache(); /* Enable branch prediction */ SCB->CCR |= (1 <<18); __DSB(); /* Enable I-Cache */ SCB_EnableICache(); /* Enable D-Cache */ SCB_InvalidateDCache(); SCB_EnableDCache(); }
TM_RCC_Result_t TM_RCC_InitSystem(void) { RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct; #if defined(STM32F7xx) /* Invalidate I-Cache : ICIALLU register */ SCB_InvalidateICache(); /* Enable branch prediction */ SCB->CCR |= (1 <<18); __DSB(); /* Enable I-Cache */ SCB_EnableICache(); /* Invalidate I-Cache */ SCB_InvalidateDCache(); /* Enable D-Cache */ SCB_EnableDCache(); #endif /* Enable Power Control clock */ __HAL_RCC_PWR_CLK_ENABLE(); #if !defined(STM32F0xx) /* Set voltage scaling */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); #endif /* Enable HSE Oscillator and activate PLL with HSE as source */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE; /* Select proper PLL input clock */ if (RCC_OSCILLATORTYPE == RCC_OSCILLATORTYPE_HSE) { RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.HSIState = RCC_HSI_OFF; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; #if defined(STM32F0xx) RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6; #endif } else { RCC_OscInitStruct.HSEState = RCC_HSE_OFF; RCC_OscInitStruct.HSIState = RCC_HSI_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; #if defined(STM32F0xx) RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6; #endif } /* Set PLL parameters */ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; #if !defined(STM32F0xx) RCC_OscInitStruct.PLL.PLLM = RCC_PLLM; RCC_OscInitStruct.PLL.PLLN = RCC_PLLN; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP; RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ; #endif #if defined(STM32F446xx) #if defined(RCC_PLLR) RCC_OscInitStruct.PLL.PLLR = RCC_PLLR; #else RCC_OscInitStruct.PLL.PLLR = 7; #endif #endif /* Try to init */ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { return TM_RCC_Result_Error; } #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) || defined(STM32F7xx) /* Activate the Over-Drive mode */ HAL_PWREx_EnableOverDrive(); #endif /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1); #if !defined(STM32F0xx) RCC_ClkInitStruct.ClockType |= RCC_CLOCKTYPE_PCLK2; #endif #if defined(STM32F405xx) || \ defined(STM32F415xx) || \ defined(STM32F407xx) || \ defined(STM32F417xx) || \ defined(STM32F427xx) || \ defined(STM32F437xx) || \ defined(STM32F429xx) || \ defined(STM32F439xx) || \ defined(STM32F446xx) || \ defined(STM32F7xx) RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; #elif defined(STM32F0xx) RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; #else RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; #endif /* Try to init */ #if defined(STM32F0xx) if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { #else if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { #endif return TM_RCC_Result_Error; } /* Return OK */ return TM_RCC_Result_Ok; }